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| Number | Title | Issue Date |
| 8129202 | Plasma doping method and apparatus It is intended to provide a plasma doping method and apparatus which are superior in the controllability of the concentration of an impurity that is introduced into a surface layer of a sample. A prescribed gas is introduced into a vacuum container 1 f... | 03/06/2012 |
| 7993937 | DC and RF hybrid processing system The invention can provide apparatus and methods for processing substrates and/or wafers in real-time using at least one Direct Current (DC)/Radio Frequency (RF) Hybrid (DC/RFH) processing system and associated Direct Current/Radio Frequency Hybrid (DC/RFH) procedure... | 08/09/2011 |
| 7989227 | Method of manufacturing semiconductor chip and semiconductor module An FOM (figure of merit) enabling evaluation from a cost aspect, as well as evaluation of electrical performance, is newly proposed to provide a method of manufacturing based on the FOM a semiconductor chip intended for a lower cost production in addition to satisfy... | 08/02/2011 |
| 7960188 | Polishing method A method for polishing a substrate having a metal film thereon is described. The substrate has metal interconnects formed from part of the metal film. The polishing method includes performing a first polishing process of removing the metal film, after the first poli... | 06/14/2011 |
| 7871830 | End point detection method for plasma etching of semiconductor wafers with low exposed area A method for controlling the plasma etching of semiconductor wafers determines the impedance of a plasma chamber using values representing voltage, current, and the phase angle between them, as provided by a sensor. All or less than all of the data during a first ti... | 01/18/2011 |
| 7851234 | System and method for enhanced control of copper trench sheet resistance uniformity A method is disclosed for controlling the sheet resistance of copper trenches formed on semiconductor wafers. The method includes forming a plurality of copper-filled trenches on a wafer, measuring the sheet resistance of each of the plurality of copper-filled trenc... | 12/14/2010 |
| 7790478 | Manufacturing method of semiconductor integrated circuit device In remote plasma cleaning, it is difficult to locally excite a plasma because the condition is not suitable for plasma excitation different from that at the time of film formation and a method using light has a problem of fogginess of a detection window that cannot ... | 09/07/2010 |
| 7781234 | Semiconductor process evaluation methods including variable ion implanting conditions Semiconductor process evaluation methods perform multiple scans of a test semiconductor substrate (e.g., test wafer) using ion beams under different ion implanting conditions. Parameters of the test semiconductor substrate that was scanned using the ion beams under ... | 08/24/2010 |
| 7772015 | Observation method of wafer ion implantation defect An analysis method of wafer ion implant is presented, the steps of the method comprises: (a) cleave a wafer for analysis, and (b) from these pieces of wafers determine which ones are wafer with defect and set an insulator on the wafer with defect, (c) finally, use s... | 08/10/2010 |
| 7736915 | Method for neutralizing trapped charge in a charge accumulation layer of a semiconductor structure A method for neutralizing trapped charges in a buried oxide layer. The method includes providing a semiconductor structure which includes (a) a semiconductor layer, (b) a charge accumulation layer on top of the semiconductor layer, and (c) a doped region in direct p... | 06/15/2010 |
| 7704757 | Method for adjusting an electrical parameter on an integrated electronic component A method is provided for manufacturing an integrated electronic component arranged on a substrate wafer. According to the method, at least one metallization step is performed, and a value of an electrical parameter of the integrated electronic component is determine... | 04/27/2010 |
| 7682843 | Semiconductor fabrication system, and flow rate correction method and program for semiconductor fabrication system Zero point shift based on thermal siphon effect occurring actually when a substrate is processed is detected accurately and corrected suitably. The semiconductor fabrication system comprises a gas supply passage (210) for supplying gas into a heat treatment u... | 03/23/2010 |
| 7622308 | Process control using process data and yield data A method for monitoring a manufacturing process features acquiring metrology data for semiconductor wafers at the conclusion of a final process step for the manufacturing process (“Step a”). Data is acquired for a plurality of process variables for a first proce... | 11/24/2009 |
| 7582490 | Controlled fabrication of gaps in electrically conducting structures A method for controlling a gap in an electrically conducting solid state structure provided with a gap. The structure is exposed to a fabrication process environment conditions of which are selected to alter an extent of the gap. During exposure of the structure to ... | 09/01/2009 |
| 7422913 | Method for checking a condition of a heat treatment A method for connecting terminals is provided. The method includes steps of a) providing a board having a first terminal thereon; b) performing a check of a heat treatment by using a thermal sensitive paper in order to determine a optimal condition of the heat treat... | 09/09/2008 |
| 7421358 | Method and system for measurement data evaluation in semiconductor processing by correlation-based data filtering By performing a contingency-based correlation test of measurement data, such as defect data, with respect to electrical test data after progressively filtering the measurement data, an enhanced analysis of process flow characteristics may be accomplished. Consequent... | 09/02/2008 |
| 7407874 | Plasma doping method A plasma doping method that can control a dose precisely is realized. In-plane uniformity of the dose is improved. It has been found that, if a bias is applied by irradiating B2H6/He plasma onto a silicon substrate, there is a time at wh... | 08/05/2008 |
| 7402801 | Inspecting method of a defect inspection device An inspecting method comprises the following steps. A plurality of defect inspection devices is formed on a wafer. Each defect inspection device comprises an insulating layer and a conductive layer stacked over the insulating layer. A defect inspection parameter is ... | 07/22/2008 |
| 7397047 | Technique for tuning an ion implanter system A technique for tuning an ion implanter system is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for tuning an ion implanter system having multiple beam-line elements. The method may comprise establishing one or more rel... | 07/08/2008 |
| 7395170 | Methods and apparatus for data analysis A method and apparatus for data analysis according to various aspects of the present invention is configured to automatically select one or more outlier identification algorithms for identifying statistical outliers in test data for components. ... | 07/01/2008 |
| 7384802 | ESD protection device for high voltage An electrostatic discharge (ESD) protection structure and a method for forming the same are provided. The structure includes a substrate having a buried layer, and a first and a second high-voltage well region on the buried layer. The first and second high-voltage w... | 06/10/2008 |
| 7372147 | Supporting a circuit package including a substrate having a solder column array A method supports, on a printed circuit board, a circuit package including a substrate having a solder column array. The method comprises providing the circuit package with an over-sized lid that extends outwardly over an edge of the substrate. The circuit package i... | 05/13/2008 |
| 7368933 | Method for testing standby current of semiconductor package A system and method for testing standby current of a semiconductor package is provided. The method includes testing semiconductor chips formed on a wafer having a predetermined wafer run number, collecting measured values of standby current of the semiconductor chip... | 05/06/2008 |
| 7364276 | Continuous ink jet apparatus with integrated drop action devices and control circuitry A continuous liquid drop emission apparatus is provided. The liquid drop emission apparatus is comprised of a liquid chamber containing a positively pressurized liquid in flow communication with at least one nozzle for emitting a continuous stream of liquid and a je... | 04/29/2008 |
| 7354778 | Method for determining the end point for a cleaning etching process A method is provided for determining the end point during cleaning etching of processing chambers by means of plasma etching, which is used for carrying out coating or etching processes during the manufacture of semiconductor components. The invention provides a met... | 04/08/2008 |
| 7351596 | Method and system for operating a physical vapor deposition process A method for fabricating semiconductor wafers using physical vapor deposition. The method includes maintaining a substrate on a susceptor in a chamber. The substrate has a face positioned within a vicinity of a target material, which is within the chamber. The targe... | 04/01/2008 |
| 7351595 | Method for manufacturing semiconductor device In a manufacturing method for a semiconductor device, a main body wafer having an interlayer insulating film is formed, and a monitor wafer on which a monitor element is formed is provided. Characteristics of the main body wafer are copied onto the monitor element b... | 04/01/2008 |
| 7351639 | Increasing an electrical resistance of a resistor by oxidation or nitridization A method and structure for increasing an electrical resistance of a resistor that is within a semiconductor structure, by oxidizing or nitridizing a fraction of a surface layer of the resistor with oxygen/nitrogen (i.e., oxygen or nitrogen) particles, respectively. ... | 04/01/2008 |
| 7348264 | Plasma doping method A plasma doping method that can control a dose precisely is realized. In-plane uniformity of the dose is improved. It has been found that, if a bias is applied by irradiating B2H6/He plasma onto a silicon substrate, there is a time at which a d... | 03/25/2008 |
| 7350163 | System and method for automatically calculating parameters of an MOSFET A system for automatically calculating parameters of an MOSFET is disclosed. The parameter calculating system runs in a computer. The parameter calculating system is used for receiving values inputted, and for calculating parameters of the MOSFET according to the in... | 03/25/2008 |
| 7348260 | Method for forming a relaxed or pseudo-relaxed useful layer on a substrate A method for forming a relaxed or pseudo-relaxed useful layer on a substrate is described. The method includes growing a strained semiconductor layer on a donor substrate, bonding a receiver substrate to the strained semiconductor layer by a vitreous layer of a mate... | 03/25/2008 |
| 7338817 | Body bias compensation for aged transistors Embodiments of the invention include on-chip transistor degradation detection and compensation. In one embodiment of the invention, an integrated circuit is provided including a circuit with a body bias terminal coupled to a body of one or more transistors to receiv... | 03/04/2008 |
| 7335602 | Charge-free layer by layer etching of dielectrics A method for etching a dielectric film is provided herein. In accordance with the method, a device (201) is provided which comprises a first chamber (203) equipped with a first gas supply (209) and a second chamber (205) equipped with a s... | 02/26/2008 |
| 7337088 | Intelligent measurement modular semiconductor parametric test system An intelligent measurement modular semiconductor parametric test system comprises an engine control module. The engine control module is operable to communicate with a user via a user interface, and is further operable to communicate with and to control the state of... | 02/26/2008 |
| 7332368 | Light guide for image sensor A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but n... | 02/19/2008 |
| 7332358 | MOSFET temperature sensing A MOSFET has its gate voltage controlled to provide a constant drain current of the MOSFET, for example to limit inrush current for charging a capacitance of a power supply arrangement. A decrease in the gate voltage supplied to the MOSFET, corresponding to an incre... | 02/19/2008 |
| 7323350 | Method of fabricating thin film calibration features for electron/ion beam image based metrology A method of making and using thin film calibration features is described. To fabricate a calibration standard according to the invention raised features are first formed from an electrically conductive material with a selected atomic number. A conformal thin film la... | 01/29/2008 |
| 7314778 | Wafer-level processing of chip-packaging compositions including bis-maleimides A process of packaging a microelectronic chip includes wafer-level application of a chip-packaging composition that includes a polymer of a bis-maleimide. A process includes wafer-level addition of the chip-packaging compositions that include adding particulate fill... | 01/01/2008 |
| 7312125 | Fully depleted strained semiconductor on insulator transistor and method of making the same An integrated circuit includes multiple layers. A semiconductor-on-insulator (SOI) wafer can be used to house transistors. Two substrates or wafers can be bonded to form the multiple layers. A strained semiconductor layer can be between a silicon germanium layer and... | 12/25/2007 |
| 7303929 | Reloading of die carriers without removal of die carriers from sockets on test boards A method of testing microelectronic dies is described. A respective set of dies is inserted into die carrier bodies releasably held within a set of sockets secured to a burn-in board. A set of die carrier covers is closed, each die carrier cover being secured to a r... | 12/04/2007 |
