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| Number | Title | Issue Date |
| 8178286 | Double patterning method A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern comprising a first grid, rendering the first photoresist pattern insoluble to a solvent, formi... | 05/15/2012 |
| 8158334 | Methods for forming a composite pattern including printed resolution assist features An underlayer to be patterned with a composite pattern is formed on a substrate. The composite pattern is decomposed into a first pattern and a second pattern, each having reduced complexity than the composite pattern. A hard mask layer is formed directly on the und... | 04/17/2012 |
| 8129095 | Methods, photomasks and methods of fabricating photomasks for improving damascene wire uniformity without reducing performance A method of improving damascene wire uniformity without reducing performance. The method includes simultaneously forming a multiplicity of damascene wires and a multiplicity of metal dummy shapes in a dielectric layer of a wiring level of an integrated circuit chip,... | 03/06/2012 |
| 8129094 | Method for manufacturing a semiconductor device A spacer is formed on side and top portions of a photoresist pattern after a mask process is performed so that the spacer may be used as an etching mask. The spacer is formed using a polymer deposition layer which is a low temperature oxide or nitride that can be de... | 03/06/2012 |
| 8124323 | Method for patterning a photosensitive layer The method of patterning a photosensitive layer includes providing a substrate including a first layer formed thereon, treating the substrate including the first layer with cations, forming a first photosensitive layer over the first layer, patterning the first phot... | 02/28/2012 |
| 8119334 | Method of making a semiconductor device using negative photoresist Negative photoresist over an insulating layer is exposed to radiation according to a pattern for an opening in the insulating layer for filling conductive material. A post of the negative photoresist is left over the location where the opening in the insulating laye... | 02/21/2012 |
| 8084191 | Thermoelectric module and manufacturing method for same A thermoelectric module and method of manufacture thereof, capable of preventing short-circuits between electrodes due to solder without causing increases in size or cost. A thermoelectric module is configured with lower electrodes formed on the inside surface of a ... | 12/27/2011 |
| 8080366 | In-line process for making thin film electronic devices An in-line process for making a thin film electronic device on a substrate is described comprising the steps of: a) depositing a structurable layer onto a substrate; b) depositing a patternable material onto the structurable layer in a first pattern; and c) etching ... | 12/20/2011 |
| 8012674 | Efficient pitch multiplication process Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a substrate through a mask. The mask is formed by patterning a photoresist lay... | 09/06/2011 |
| 8003305 | Method for patterning a semiconductor wafer A method for etching a pattern on a surface is disclosed. A mask layer is disposed over a surface and a resist is disposed over the mask layer. The resist is exposed to light through the mask exposing primary pattern and sidelobe regions. The resist is developed and... | 08/23/2011 |
| 8003304 | Method for manufacturing a perpendicular magnetic write pole using an electrical lapping guide for tight write pole flare point control A method for manufacturing a magnetic write head for perpendicular magnetic recording. The method provides for accurate definition of a device feature such as a write pole flare point. A functional lapping guide is formed to determine when a lapping operation should... | 08/23/2011 |
| 7989146 | Component fabrication using thermal resist materials A method for producing a patterned material for electronic or photonic circuits, comprising the steps of: p) providing a substrate; q) coating the substrate with a polymer layer; r) coating a therm... | 08/02/2011 |
| 7985530 | Etch-enhanced technique for lift-off patterning An enhanced process forming a material pattern on a substrate deposits the material anisotropically on resist material patterned to correspond to an image of the material pattern. The material is etched isotropically to remove a thickness of the material on sidewall... | 07/26/2011 |
| 7981591 | Semiconductor buried grating fabrication method Methods for forming grating profiles in semiconductor laser structures comprise the steps of providing a semiconductor wafer comprising a wafer substrate, an etch stop layer disposed over the wafer substrate, a grating layer disposed over the etch stop layer, an etc... | 07/19/2011 |
| 7981592 | Double patterning method A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern comprising a first grid, rendering the first photoresist pattern insoluble to a solvent, formi... | 07/19/2011 |
| 7960097 | Methods of minimizing etch undercut and providing clean metal liftoff A method of minimizing etch undercut and providing clean metal liftoff in subsequent metal deposition is provided. In one embodiment a bilayer resist mask is employed and used for etching of underlying substrate material and subsequent metal liftoff. In one embodime... | 06/14/2011 |
| 7862988 | Method for forming patterns of semiconductor device Provided is a method for forming patterns of a semiconductor device. According to the method, first mask patterns may be formed on a substrate, and second mask patterns may be formed on sidewalls of each first mask pattern. Third mask patterns may fill spaces formed... | 01/04/2011 |
| 7858294 | Method to restore hydrophobicity in dielectric films and materials Silica dielectric films, whether nanoporous foamed silica dielectrics or nonporous silica dielectrics are readily damaged by fabrication methods and reagents that reduce or remove hydrophobic properties from the dielectric surface. The invention provides for methods... | 12/28/2010 |
| 7833695 | Methods of fabricating metal contact structures for laser diodes using backside UV exposure Methods of fabricating a metal contact structure for a laser diodes are provided, wherein the method comprises providing a UV transparent semiconductor substrate, a UV transparent semiconductor epilayer defining a ridge disposed between etched epilayer edges, the ep... | 11/16/2010 |
| 7807336 | Method for manufacturing semiconductor device Disclosed herein is a method for manufacturing a semiconductor device that includes performing an O2 plasma treatment step after forming a Si-containing anti-reflection film. ... | 10/05/2010 |
| 7803519 | Method for manufacturing a semiconductor device A method for manufacturing a semiconductor device using a photoresist polymer comprising a fluorine component, a photoresist composition containing the photoresist polymer and an organic solvent to reduce surface tension, by forming a photoresist film uniformly on t... | 09/28/2010 |
| 7682778 | Methods of forming contact plugs in semiconductor devices Provided are contact photomasks and methods using such photomasks for fabricating semiconductor devices and forming contact plugs on portions of active regions exposed between gate lines. The elongated active regions are arrayed in a series of parallel groups with e... | 03/23/2010 |
| 7678535 | Method for fabricating semiconductor device with recess gate A method for fabricating a semiconductor device includes forming a mask pattern over a substrate; etching a certain portion of the substrate using the mask pattern as an etch mask to form a first recess having sidewalls; forming a polymer-based layer over the sidewa... | 03/16/2010 |
| 7666578 | Efficient pitch multiplication process Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a substrate through a mask. The mask is formed by patterning a photoresist lay... | 02/23/2010 |
| 7655387 | Method to align mask patterns Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pit... | 02/02/2010 |
| 7598024 | Method and system for enhanced lithographic alignment A method for alignment mark preservation includes a step of preparing a lower alignment mark structure on a substrate. In one configuration of the invention, the alignment mark structure includes a lower trench. In a further step, a hard mask coating is applied to a... | 10/06/2009 |
| 7485411 | Method for manufacturing printed circuit board with thin film capacitor embedded therein In a method for manufacturing a printed circuit board with a thin film capacitor embedded therein, a conductive metal is sputtered via a first mask to form a lower electrode. A dielectric material is sputtered via a second mask to form a dielectric layer. The conduc... | 02/03/2009 |
| 7482111 | Negative radiation-sensitive resin composition It is an object of the present invention to provide a process capable of precisely producing a plated shaped article of a large thickness such as a bump or a wiring, a negative radiation-sensitive resin composition which is preferably used for the process and has ex... | 01/27/2009 |
| 7465532 | Image transfer process for thin film component definition A method for fabricating a thin film component according to one embodiment comprises forming a wafer having a thin film layer, a release layer, and a patterned layer of photoresist; transferring the pattern of the layer of photoresist to the release layer and the th... | 12/16/2008 |
| 7435536 | Method to align mask patterns Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pit... | 10/14/2008 |
| 7419768 | Methods of fabricating integrated circuitry The invention includes methods of fabricating integrated circuitry and semiconductor processing polymer residue removing solutions. In one implementation, a method of fabricating integrated circuitry includes forming a conductive metal line over a semiconductor subs... | 09/02/2008 |
| 7419763 | Near-field exposure photoresist and fine pattern forming method using the same A near-field photoresist for formation of a fine pattern with by near-field exposure includes an alkali-soluble novalac resin, a diazyde-type photosensitizer which is photoreactive by near-field exposure, a photoacid generator which generates acid by the near-field ... | 09/02/2008 |
| 7416837 | Resist pattern-improving material and a method for preparing a resist pattern by using the same The present invention provided an improvement to reduce an edge roughness during forming a small and fine pattern. Such and objective is to accomplish that after patterning a resist film, a coating film is formed on the resist film, so as to intermix the resist film... | 08/26/2008 |
| 7415761 | Method of manufacturing multilayered circuit board An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 μm) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an... | 08/26/2008 |
| 7407738 | Fabrication and use of superlattice This disclosure relates to a system and method for fabricating and using a superlattice. A superlattice can be fabricated by applying alternating material layers on a ridge and then removing some of the alternating layers to expose edges. These exposed edges can be ... | 08/05/2008 |
| 7390616 | Method for post lithographic critical dimension shrinking using post overcoat planarization A method for post lithographic critical dimension shrinking of a patterned semiconductor feature includes forming an overcoat layer over a patterned photoresist layer, and removing portions of the overcoat layer initially formed over top surfaces of the patterned ph... | 06/24/2008 |
| 7381285 | Manufacturing method of a device In a manufacturing method of a flexible device, when a protective material is adhered onto a surface of a substrate, the adhesion is performed at only a part of the substrate. Since being adhered to the part of the substrate, the protective material is easily peeled... | 06/03/2008 |
| 7381508 | Integrated circuit semiconductor device with overlay key and alignment key and method of fabricating the same An integrated circuit semiconductor device including a cell region formed in a first portion of a silicon substrate, the cell region including a first trench formed in the silicon substrate, a first buried insulating layer filled in the first trench, a first insulat... | 06/03/2008 |
| 7375308 | Garment incorporating functional electrical circuit Disclosed is a breathable heater element for a garment or for the lining of a garment such as an outdoor jacket, e.g. a waterproof jacket. The heater element is formed from porous metallised fabric such a nickel plated woven polyester fabric by photochemical etching... | 05/20/2008 |
| 7371970 | Rigid-flex circuit board system A rigid-flex circuit board system that can be manufactured using less expensive and more reliable rigid circuit board methods and equipment, and can maintain rigidity and dimensional stability until the time when it is first desired to flex. ... | 05/13/2008 |
