Did You Know...
...that Kleenex tissue was originally designed to be a gas mask filter? It was developed at the beginning of World War I to replace cotton, which was then in short supply as a surgical dressing.
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| Number | Title | Issue Date |
| 4019153 | Digital phase-locked loop filter A phase processing system which includes at least one digital phase-locked loop wherein the phase of the input signal to the loop is compared with the phase of the loop output signal to produce a pulse-width modulated phase error signal. The error signal ... | 04/19/1977 |
| 4017803 | Data recovery system resistant to frequency deviations The data stream input to the recovery logic is taken from a point at which its transitions are timecoincident with those of the data stream input to the phase comparator of the phase locked oscillator loop used to control the generation of the recovery wi... | 04/12/1977 |
| 4015083 | Timing recovery circuit for digital data A timing recovery circuit receives a timing component signal and generates a signal having a frequency varying in response to a control signal. In response to a difference between the phase of the variable frequency signal and the phase of the timing comp... | 03/29/1977 |
| 4009449 | Frequency locked loop A frequency locked loop that provides an output voltage waveform locked in frequency with an input voltage waveform. The output waveform is provided by a voltage controlled oscillator that is resettable to permit adjustment of the frequency of its output ... | 02/22/1977 |
| 4006303 | Filtered transition distortion channel quality monitor A system for measurement of teletype or other communication channel quality herein the bit signal element duration is divided into m subintervals. A plurality of transition counters are provided such that each transition counter counts the number of DC tra... | 02/01/1977 |
| 3999130 | Automatic frequency translator for use with a delay/amplitude equalizer Apparatus for use with a controller of a delay/amplitude equalizer. The disclosed apparatus supplies a reference signal with a frequency offset component identical in amplitude and phase to an offset frequency of the received signal. The availability of a... | 12/21/1976 |
| 3988696 | Phase lock detector for digital frequency synthesizer A phase lock detector for a digital frequency synthesizer. The frequency synthesizer includes a programmable digital frequency divider for the output signal, a reference frequency Fr oscillator and a phase lock loop which controls the frequency of the syn... | 10/26/1976 |
| 3983498 | Digital phase lock loop A fast responding, low jitter, digital phase lock loop which is especially suited for synchronous, non return to zero, digitally encoded clock recovery applications. Both leading and trailing transitions of the digital waveform triggers a monostable multi... | 09/28/1976 |
| 3973212 | Phase detection in phase lock loop circuit Phase detection in a phase lock loop circuit is performed by periodically sampling the A. C. carrier communication signal applied thereto in response to a sample timing signal having a periodic frequency twice that of the carrier and a polarity check sign... | 08/03/1976 |
| 3962541 | Frequency sample-and-hold circuit A method and apparatus are described for reproducing the frequency of an incoming reference signal that persists for only a limited period of time. This is accomplished by counting, during the duration of the reference signal, the number of cycles of a lo... | 06/08/1976 |
| 3962635 | Transmission system for pulse signals of fixed clock frequency using a frequency selective circuit in a clock frequency recovery circuit to avoid phase jitter A transmission system for pulse signals of fixed clock frequency with regenerative repeaters located in the transmission path, each being provided with a pulse regenerator and a clock extraction circuit recovering the clock frequency for the control of th... | 06/08/1976 |
| 3959601 | Variable rate clock signal recovery circuit A circuit for use in a digital data receiver to recover a clock signal, of variable rate, from the signal received by the receiver. A typical digital data receiver includes demodulating or other means for converting the received signal to a binary data si... | 05/25/1976 |
| 3947634 | System for synchronizing local pseudo-noise sequence to a received baseband signal The present system generates a local PN (Pseudo Noise) sequence demodulation bit stream in synchronism with the modulation sequence of a received baseband signal. The system is comprised of a PN sequence generator for generating a local PN sequence signal... | 03/30/1976 |
| 3946323 | Digital circuit for generating output pulses synchronized in time to zero crossings of incoming waveforms A digital phase locked loop circuit for use in synchronizing output timing pulses with the positive going zero-crossings of an input data signal by quantitizing the input analog data signal as digital information, storing the digital information at given ... | 03/23/1976 |
| 3944940 | Versatile phase-locked loop for read data recovery A clock pulse generating system is disclosed for recovery of read data from magnetic record media comprised of a phase-locked loop for tracking data pulses. The loop employs simple digital logic gates for phase error detection, third-order filtering for t... | 03/16/1976 |
| 3936603 | Digital communication systems A digital phase locked loop is described which includes a first gate through which incoming pulses are passed to subsequent data processing circuits, a second gate through which reference pulses having a predetermined pulse repetition rate equal to the re... | 02/03/1976 |
| 3936762 | Digital phase-lock loop systems for phase processing of signals A digital phase-locked loop in which an error signal representing the difference between the phases of an input signal and an output signal is converted to a digital signal having a time-varying value. A programmable divider means is provided to produce a... | 02/03/1976 |
| 3932705 | PSK telemetering synchronization and demodulation apparatus including an ambiguity eliminating device A PSK synchronizer and demodulator with message coded in biphase, modulated in phase by a subcarrier, having three chains I, II, III of identical general structure, the first operating on twice the frequency fo of the subcarrier, the second on ... | 01/13/1976 |
