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| Number | Title | Issue Date |
| 4146841 | Technique for combatting jitter in multiple phase transmission system To eliminate the effects of phase jitter, successively measured phase values received in an N-phase transmission system are stored and compared with a phase node reference plot to derive values representative of the respective phase nodes to which the mea... | 03/27/1979 |
| 4066964 | Communication system This invention relates to a communication system wherein a plurality of stations can communicate with each other, without going through a central switchboard; and more particularly to such a communication system that is as private as possible -- the commm... | 01/03/1978 |
| 4064361 | Correlative timing recovery in digital data transmission systems A sample timing recovery arrangement for synchronous amplitude and phase modulated digital data transmission systems correlates present and delayed samples of received digital data signals to obtain a spectral line at the sampling rate using digital techn... | 12/20/1977 |
| 4048563 | Carrier-modulated coherency monitoring system A radio information system is described which uses the exact mathematical tios and the unique periodic angular coherence of the residual RF carrier and the digitally encoded modulation spectral components of the electromagnetic wave as emitted by a source... | 09/13/1977 |
| 4012591 | Circuit arrangement for the phase control of a clock signal Apparatus for controlling the phase of a clock signal in a data transmission system is described. In the latter system the data signal is pulse amplitude modulated, routed to a receiver-demodulator over a transmission path, the data signal retrieved by me... | 03/15/1977 |
| 4012598 | Method and means for pulse receiver synchronization A receiver is disclosed which operates for synchronously receiving pulses of a serial stream without synchronizing the receiver clock to the clock at a transmitting site. Circuitry is provided for generating multiple delayed pulse signals in response to e... | 03/15/1977 |
| 4010323 | Digital timing recovery Sample timing recovery in a differentially coherent phase-shift keyed data transmission system is accomplished through the use of digital techniques. Samples of received phase-modulated signal waves taken at a rate high with respect to the carrier frequen... | 03/01/1977 |
| 4004090 | Bit synchronization circuit A bit synchronization circuit which comprises a pulse generator for producing a pulse corresponding to a data signal received; a clock pulse oscillator for supplying a clock pulse having a frequency as high as four times the data speed of said data signal... | 01/18/1977 |
| 4001775 | Automatic bit synchronization method and apparatus for a logging-while-drilling receiver In a system for logging while drilling, an uphole receiver demodulates a received acoustic signal to produce a synchronously rectified signal with a polarity representative of the phase state of the acoustic signal. A detector produces a bit value pulse i... | 01/04/1977 |
| 3984777 | Carrier wave reproducer device for use in the reception of a multi-phase phase-modulated wave A carrier wave reproducer device for use in the reception of a multi-phase digital phase-modulated waves for rapidly extracting the carrier wave without the generation of frequencies higher than the carrier frequency is disclosed. In its simplest embodime... | 10/05/1976 |
| 3983499 | Multi-phase PSK demodulator A synchronized carrier recovery circuit for a PSK modulated signal includes a plurality of phase detectors supplied with the PSK input signal and phase shifted outputs from a voltage controlled oscillator. The detector outputs are rectified and alternatel... | 09/28/1976 |
| 3980820 | Clock phasing circuit A clock phasing circuit for aligning data which is transmitted by a first clock, running at a particular frequency, with a second clock running at the same frequency as the first clock but in a different and undetermined phase relationship. The incoming d... | 09/14/1976 |
| 3978285 | Frame synchronizing device The frame holding time can be materially extended without increasing the counter size by insertion of a delay circuit and an AND gate between the framing detector and hunting means. Hunting operation is performed under control of the logical AND of the de... | 08/31/1976 |
| 3953674 | Telemetry Synchronizer Simultaneous phase lock and synchronization acquisition of an L format biphase input signal having a pseudorandom sequence are obtained with a delay lock loop including a feedback shift register for deriving a first non-return to zero (NRZ) output signal ... | 04/27/1976 |
| 3952254 | Timing signal regenerating circuit The resultant sum value of the output signal of the counter of a timing signal regenerating circuit is provided at the point at which rising and falling edges of a two level received signal cross a threshold level. The resultant sum is utilized to slice t... | 04/20/1976 |
