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| Number | Title | Issue Date |
| 8175192 | Method and system for determining and removing DC offset in communication signals According to one exemplary embodiment, a method and system for determining and removing DC offset in an AC signal includes receiving an AC signal having a first-channel and a second-channel, e.g. an I-channel and a Q-channel, receiving a plurality of first-channel a... | 05/08/2012 |
| 8170147 | Apparatus for cancelling DC offset and method thereof An apparatus and method for canceling a DC offset efficiently removes the DC offset by calculating the DC offset after acquiring synchronization in a terminal receiver used for an orthogonal frequency division multiplexing system. The apparatus for canceling the DC ... | 05/01/2012 |
| 8126086 | System and method for in-phase/quadrature-phase (I/Q) mismatch measurement and compensation A system for determining in-phase and quadrature-phase mismatch in a multiple-input, multiple-output (MIMO) communication architecture includes at least one transmitter coupled to at least one receiver and an in-phase (I) signal, quadrature-phase (Q) signal mismatch... | 02/28/2012 |
| 8126087 | DC offset correction circuit for canceling a DC offset in a real time and a receiving system having the same A DC offset correction circuit includes a DC offset detector generating a detection voltage based on a result of a comparison of a first reference voltage and a voltage difference between signals input to the DC offset detector, a comparator comparing a second refer... | 02/28/2012 |
| 8098768 | Compensation of ethernet transmit baseline wander Compensation of transmit baseline wander in data transmission on a network. In one aspect, compensating for baseline wander includes receiving a signal to be transmitted by a transmitter, where the transmitter is operable with a higher-speed transmission standard re... | 01/17/2012 |
| 8059757 | Signal processing device and method A test signal is generated and supplied to a signal processing circuit for making frequency conversion. A signal outputted from the signal processing circuit is detected to generate a detected signal including a detected positive signal corresponding to the positive... | 11/15/2011 |
| 8036316 | Method and system for independent I and Q loop amplitude control for quadrature generators Certain aspects of a method and system for independent in-phase (I) and quadrature (Q) loop amplitude control for quadrature generators may include determining an amplitude voltage associated with an in-phase (I) component and a quadrature (Q) component of a generat... | 10/11/2011 |
| 8031811 | Dynamic DC offset canceling apparatus and dynamic DC offset canceling method The dynamic DC offset canceling apparatus includes: section 104 that detects dynamic DC offset in longest overlapping part sequences from the differences between the sampling values of a first longest overlapping part sequence and the sampling values of a sec... | 10/04/2011 |
| 8019019 | DC balance compensation for AC-coupled circuits A receiver has a first input port and a second input port both coupled to a differential amplifier through first and second input capacitors. A bias circuit coupled to the core side of the first input capacitor and to the core side of the second input capacitor is c... | 09/13/2011 |
| 7978788 | Method and arrangement for estimating DC offset A method and arrangement for estimating a DC offset for a signal received in a radio receiver. The received signal includes a digitally modulated signal component, a DC offset component, and a noise component. When the signal is of a known type, such as a Gaussian M... | 07/12/2011 |
| 7903761 | UWB radio interface with DC offset The present invention provides a method and apparatus for correcting direct current (DC) offsets in radio output signals. The invention comprises a radio processor and a baseband processor. During a calibration routine, the baseband processor measures DC offset prod... | 03/08/2011 |
| 7839956 | Method and apparatus for DC offset compensation in a digital communication system A method of compensating for dc offset of a received signal transmitted over a channel having a plurality of paths, the received signal comprising a modulated data signal and a modulated known training sequence signal, the method comprising the steps of: constructin... | 11/23/2010 |
| 7835467 | DC offset correction for high gain complex filter A DC voltage offset correction circuit that provides for correction of a DC offset voltage of an output of a filter stage of a complex filter circuit includes a DC offset sensing device that is connected to an output of a filter stage of a complex filter to generate... | 11/16/2010 |
| 7778358 | Receiver, wireless device and method for cancelling a DC offset component A receiver includes a memory for storing DC offset amounts generated by an analog circuit; an amplifier; a DC offset amount generator for generating a first offset value and a second offset value to be removed from the received signal amplified at the amplifier; a f... | 08/17/2010 |
| 7756221 | System and method for DC offset compensation and bit synchronization A system and method for compensating for DC offset and/or clock drift on a wireless-enabled device is described. One embodiment includes a radio module, an A/D converter connected to the radio module, a DC tracking loop connected to the A/D converter, and a multi-hy... | 07/13/2010 |
| 7711072 | Receiving method and receiver Baseband (BB) input units input baseband received signals. An initial weight data setting unit sets weighting coefficients to be utilized in the interval of a training signal as initial weighting coefficients. A gap compensating unit compensates control weighting co... | 05/04/2010 |
| 7702037 | Method and apparatus for estimating DC offset in an orthogonal frequency division multiplexing system Methods and apparatus are disclosed for DC offset estimation and for DC offset compensation that collectively reduce or eliminate the distortion of subcarriers due to DC offset in an OFDM receiver. The DC offset estimation is obtained by subtracting a sum of time do... | 04/20/2010 |
| 7684519 | Method and system for adjusting DC offset slice point in an RF receiver A method for adjusting a DC offset slice point in an RF receiver is provided and may comprise estimating DC offset using a combination of fast tracking of an input signal and slow tracking of an input signal. If both are used, the fast tracking may be executed prior... | 03/23/2010 |
| 7675997 | Dynamic DC offset removal apparatus and dynamic DC offset removal method A dynamic DC offset removal apparatus and a dynamic DC offset removal method capable of accurately estimating a change position of a dynamic DC offset and a DC offset value before the change and a DC offset value after the change, thereby carrying out equalization p... | 03/09/2010 |
| 7634027 | Method and system for independent I and Q loop amplitude control for quadrature generators Certain aspects of a method and system for independent in-phase (I) and quadrature (Q) loop amplitude control for quadrature generators may include determining an amplitude voltage associated with an in-phase (I) component and a quadrature (Q) component of a generat... | 12/15/2009 |
| 7620121 | DC balance compensation for AC-coupled circuits A receiver has a first input port and a second input port both coupled to a differential amplifier through first and second input capacitors. A bias circuit coupled to the core side of the first input capacitor and to the core side of the second input capacitor is c... | 11/17/2009 |
| 7602861 | Wireless receiver for removing direct current offset component A wireless receiver includes a hardware (HW) block, a converter block and a digital signal processor (DSP). The HW block receives a wireless signal having a first DC Offset Component (DCOC), removes a portion of the first DCOC to produce a residual DCOC centered at ... | 10/13/2009 |
| 7593485 | Wireless receiver for removing direct current offset component A wireless receiver includes a hardware (HW) block, a converter block and a digital signal processor (DSP). The HW block receives a wireless signal having a first DC Offset Component (DCOC), removes a portion of the first DCOC to produce a residual DCOC centered at ... | 09/22/2009 |
| 7529319 | Speed estimation method for telecommunication system A speed estimation method is provided, detecting relative speed of a transmitter and a receiver transmitting symbols by OFDM sub-carriers through a channel. First, a first correlation table is established, indicating conceptual relationships between the relative spe... | 05/05/2009 |
| 7474711 | Method and system for I/Q imbalance and DC offset correction A method for correcting I/Q imbalance in a received signal is disclosed. The method includes the steps of grouping (202) the received signal into a predetermined number of clusters, and determining (204) at least one coefficient value by feeding the pr... | 01/06/2009 |
| 7466766 | Processing servo data having DC level shifts A read channel component of a magnetic recording system employs equalization of a signal received from the magnetic recording channel, the equalization being modified depending upon the presence or absence of DC shifts in the signal. Equalization corrects for DC shi... | 12/16/2008 |
| 7457374 | DC offset cancellation for WLAN communication devices A method of transmitting information in a WLAN (Wireless Local Area Network) network and corresponding WLAN communication devices and integrated circuit chips are provided. A correction signal is used for compensating for a dc offset in a data signal containing at l... | 11/25/2008 |
| 7450665 | Method and apparatus to implement DC offset correction in a sigma delta converter A sigma delta converter configured for DC offset correction is presented. The sigma delta modulator has integrator circuitry including an integrator input and an integrator output. An input signal received at the integrator input has an input AC voltage component an... | 11/11/2008 |
| 7426245 | DC compensation in direct conversion radio receivers A direct conversion receiver uses an algorithm implemented by a DSP to cancel residual DC offsets during demodulation of a GMSK modulated signal. The algorithm exploits the characteristics of GMSK modulation by determining the. modulation extremes within sampled I/Q... | 09/16/2008 |
| 7409189 | Calibration and testing architecture for receivers A method and apparatus are provided to generate calibration signals to multiple stages in a receiver channel. The multiple stages are calibrated using multiple calibration circuits, where a controller controls each calibration circuit. The controller is coupled to t... | 08/05/2008 |
| 7409014 | System and method for DC offset compensation and bit synchronization A system and method for compensating for DC offset and/or clock drift on a wireless-enabled device is described. One embodiment includes a radio module, an A/D converter connected to the radio module, a DC tracking loop connected to the A/D converter, and a multi-hy... | 08/05/2008 |
| 7403751 | DC offset calibration system A division ratio of a first frequency divider that generates a local signal and a division ratio of a second frequency divider that generates a RF interfering signal are different, and a first frequency synthesizer that generates the local signal and a second freque... | 07/22/2008 |
| 7388936 | Digital data receiver for edge cellular standard with DC offset correction, channel impulse response estimation, I/Q phase imbalance compensation, interference estimation, and selective equalization A receiver unit includes a prefilter that receives as one of the inputs a channel impulse response (CIR) estimation data set and removes unnecessary data information from the CIR estimation data set and filters input signal so to form a first output data set. An equ... | 06/17/2008 |
| 7379511 | Method for reducing DC offset error for single ended and differential signals A feedback signal generated as a function of a peak amplitude detected in an input signal provides bias to reduce DC offset. A peak in the input signal is compared with a selected signal level to align an output signal relative to a reference signal level. The outpu... | 05/27/2008 |
| 7366489 | Mobile communication apparatus A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF b... | 04/29/2008 |
| 7365671 | Communication channel with undersampled interpolative timing recovery Method and apparatus for processing transmitted data. A sampling circuit preferably performs lossy sampling of a continuous signal to provide a corresponding sequence of discrete samples at a sampling rate less than a Nyquist rate of the continuous signal. A process... | 04/29/2008 |
| 7359458 | Structures and methods for capturing data from data bit streams Structures and methods are provided for capturing data from a data bit stream. They primarily generate successive bit sample sequences that each comprise N interleaved bit sample phases, identify subsampling strings formed of less than N consecutive bit samples with... | 04/15/2008 |
| 7359692 | Method of and device for antennae diversity switching The invention relates to the field of wireless communications, more particularly to a method of and device for switching between antennae in communication with a diversity receiver, each of the antennae receiving signals transmitted from a single source. A packet fr... | 04/15/2008 |
| 7356317 | Adaptive-biased mixer A system or method for a circuit network that receives an RF signal, and where a plurality of switching transistors receive an RF signal output by the circuit network and perform mixing with a local oscillation (LO) signal received on a LO input. An active bias circ... | 04/08/2008 |
| 7356320 | Apparatus and method for removing DC offset in a frequency direct-conversion device An apparatus for removing a DC offset during frequency direct conversion in a reception device of a wireless communication system. In the apparatus, an adder receives a digital baseband signal comprising a DC component, receives an estimated DC offset value, and cal... | 04/08/2008 |
