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| Number | Title | Issue Date |
| 8144755 | Method and apparatus for determining a skew The invention provides a method and an apparatus for determining a skew of each data bit of an encoded data word received by a receiver via an interface from a transmitter comprising the steps of performing an error check and correction of the received and sampled e... | 03/27/2012 |
| 8144756 | Jitter measuring system and method The present invention relates to a jitter measuring system, comprising: a delay circuit for receiving a clock signal and delaying the clock signal to generate a delay signal; a jitter amplifier for receiving the clock signal and delay signal to generate a first sign... | 03/27/2012 |
| 8139627 | DC offset estimation in received signals A scheme for deducing a DC offset in a received signal burst acquired through a particular channel, wherein the received signal burst corresponds to a transmitted signal burst. An impulse response estimate of the channel is used to model how a known or recovered par... | 03/20/2012 |
| 8126041 | Circuit and method for on-chip jitter measurement Disclosed herein are embodiments of an improved built-in self-test (BIST) circuit and an associated method for measuring phase and/or cycle-to-cycle jitter of a clock signal. The embodiments of the BIST circuit implement a Variable Vernier Digital Delay Locked Line ... | 02/28/2012 |
| 8090010 | All digital implementation of clock spectrum spreading (dither) for low power/die area A digital circuit configured to spread a clock train spectrum includes a clock configured to generate the clock train, and a variable divider configured to divide the frequency of the clock train by a temporally-varying-divider value to modulate the clock train and ... | 01/03/2012 |
| 8090011 | Measuring apparatus, measuring method, recording medium, and test apparatus Provided is a measuring apparatus which measures a quadrature modulator, including a supplying section supplying the quadrature modulator with a reference I signal having a predetermined frequency and a reference Q signal whose phase is shifted by 90 degrees from th... | 01/03/2012 |
| 8085837 | Characterizing non-compensable jitter in an electronic signal One embodiment of the present invention processes a signal of interest through an optional reference channel, combines the resulting signal with white noise, and then processes the noisy signal through a reference receiver. Two metrics are calculated from the result... | 12/27/2011 |
| 8085836 | Robustness improvement for bandwidth limited communication system A method and apparatus for the transmission of multiple control characters of the same type to a receiver to improve the retention of transmitter to receiver synchronization in a noisy environment having receiver code that is less complex and does not require an inc... | 12/27/2011 |
| 8073043 | Method for reliable injection of deterministic jitter for high speed transceiver simulation A method and a corresponding system for characterizing the performance of a clock and data recovery circuit in a digital transceiver is presented. The method comprises phase modulating a jitter-free data signal by a testing signal having added data jitter and measur... | 12/06/2011 |
| 8068538 | Jitter measuring apparatus, jitter measuring method and test apparatus There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a pulse generator for outputting a pulse signal having a pulse width set in advance corresponding to edges-under-measurement from which the timing jitter is to ... | 11/29/2011 |
| 8045605 | Jitter amplifier circuit, signal generation circuit, semiconductor chip, and test apparatus There is provided a jitter amplifier circuit for amplifying jitter included in an input signal. The jitter amplifier circuit includes a distorting circuit that receives the input signal, and distorts a waveform of the input signal so as to generate a harmonic compon... | 10/25/2011 |
| 8018990 | Apparatus for measuring in-phase and quadrature (IQ) imbalance The present general inventive concept relates to apparatuses and/or methods for measuring an in-phase and quadrature (IQ) imbalance. In one embodiment, a detector can measure an error caused by an IQ imbalance using a first IQ signal including a desired signal and a... | 09/13/2011 |
| 7995646 | Communication test circuit, communication interface circuit, and communication test method A communication test circuit for allowing a tolerance test to be carried out in a general testing environment. The communication test circuit includes an adder and a second clock generation block. When an offset is input to the adder, the adder adds the offset to a ... | 08/09/2011 |
| 7991044 | System and method for automatic diagnosis of impairments in a digital quadrature amplitude modulated signal A device and methods for automatically diagnosing impairments in a digital quadrature amplitude modulated signal is disclosed. The impairments include phase noise, compression, coherent interference, and non-coherent interference. The device comprises a phase noise ... | 08/02/2011 |
| 7991045 | Device and method for testing signal-receiving sensitivity of an electronic subassembly A device and a method for testing signal-receiving sensitivity of an electronic subassembly are provided. The device includes a control board and a computer. The control board is connected to the electronic subassembly. The computer is connected to the control board... | 08/02/2011 |
| 7991046 | Calibrating jitter Calibrating jitter in a communication channel between test equipment and a connection for a device under test (DUT) includes sampling test data in the communication channel at about a point of the connection to produce sampled data, where the test data travels throu... | 08/02/2011 |
| 7983332 | Eye violation and excess jitter trigger An eye violation and excess jitter trigger for a digital signal uses a mask within a unit interval of the digital signal, such as a rectangular mask having corners defined by a high threshold, a low threshold, an early clock and a late clock, the early and late cloc... | 07/19/2011 |
| 7965763 | Determining a bit error rate (BER) using interpolation and superposition In one embodiment, the present invention includes a method for receiving a jitter profile and a step response of a channel coupled between a transmitter and a receiver and a bit pattern to be transmitted, transmitting the bit pattern along the channel from the trans... | 06/21/2011 |
| 7961778 | Data-dependent jitter pre-emphasis for high-speed serial link transmitters In the context of high-speed serial links, data-dependent jitter compensation techniques performed using phase pre-distortion. Broadly contemplated is an expansion of the notion of pre-emphasis beyond conventional amplitude compensation of ISI, whereby phase pre-emp... | 06/14/2011 |
| 7957461 | Calibrating automatic test equipment Calibrating automatic test equipment (ATE) includes determining an offset between a reference timing event and a channel event, where the channel event is associated with a communication channel of the ATE, and adjusting signal transmission over the communication ch... | 06/07/2011 |
| 7957462 | Integrated compact eye pattern analyzer for next generation networks A portable hand-held battery powered eye pattern analyzer is provided that can analyze signal quality of a high speed digital communication network. The system is 10 times smaller in volume and 4 times lighter than the bench-top equivalent instruments. The system in... | 06/07/2011 |
| 7944963 | Method and apparatus for jitter compensation in receiver circuits using nonlinear dynamic phase shifting technique based on bit history pattern The present invention provides a simple, easy to implement method and apparatus to reduce jitter in a channel and expand the eye width and eye height of the eye pattern of the signal. The method and apparatus of the present invention reduces jitter specific to a cha... | 05/17/2011 |
| 7933321 | Measuring system with a reference signal between a signal generator and a signal analyzer A measuring system (1) comprises a signal generator (2), generating a digital modulated high frequency measuring signal (MS), for supplying to the input (4) of a test unit (4). A signal analyser (5) connected to the output (6 | 04/26/2011 |
| 7933322 | Timing lock detection apparatus and method for digital broadcasting receiver A timing lock detection apparatus and method for digital broadcasting receiver are provided. The apparatus includes: a discrete value generator for cyclically selecting a discrete signal value from a continuous timing error signal; a differential calculator for obta... | 04/26/2011 |
| 7912117 | Transport delay and jitter measurements A method of measuring transport delay and jitter with a realtime oscilloscope using cross-correlation acquires waveforms from two test points in a system under test. Clock recovery is run on both waveforms to obtain respective rates and offsets. A time offset betwee... | 03/22/2011 |
| 7907661 | Testability technique for phase interpolators A method and circuit for testing phase interpolators is provided. The method performs a sweep over a phase interpolator delay range and detects if the phase interpolators experience an unacceptably large non-linearity which leads to inaccurate clock timing. The test... | 03/15/2011 |
| 7894512 | System and method for automatic recovery and covariance adjustment in linear filters A communications device includes a time/frequency error measurement circuit that receives a communications signal and measures its timing and frequency errors. A Kalman filter receives the communications signal from the time/frequency error measurement circuit and p... | 02/22/2011 |
| 7885322 | Jitter measuring circuit A jitter measuring circuit that is capable of measuring the amount of clock jitter and the amount of logic circuit delay jitter separately is provided. The jitter measuring circuit comprises a variable logic delaying section, a data holding section and a controller.... | 02/08/2011 |
| 7869492 | Frequency-locking device and frequency-locking method thereof The invention proposes a simple method suitable for automatically locking frequency during USB data communication. Based on the soft plug/unplug concept proposed in the contents and the error handling mechanism defined in the USB specification, we can calibrate the ... | 01/11/2011 |
| 7864834 | Estimating digital frequency synthesizer jitter A method of estimating jitter for a DFS can include determining a plurality of linear equations, wherein each linear equation corresponds to, at least in part, a combination of multiplier and divisor attributes for setting an output frequency of the DFS, identifying... | 01/04/2011 |
| 7848399 | Semiconductor integrated circuit A semiconductor integrated circuit has first and second delay circuits that have n (n is an integer equal to or larger than 2) delay elements connected in series, respectively, and in which an identical input signal is inputted to delay elements at a first stage and... | 12/07/2010 |
| 7809052 | Test circuit, system, and method for testing one or more circuit components arranged upon a common printed circuit board A test circuit, system, and method are provided herein for testing one or more circuit components arranged upon a monolithic substrate. According to one embodiment, the system may include a test circuit and one or more circuit components, all of which are arranged u... | 10/05/2010 |
| 7804890 | Method and system for response determinism by synchronization A discussion of improving integrated device deterministic response to test vectors. For example, limiting the transmission delay for an integrated device's response within known bounds by synchronizing an initialization training sequence to a reset deassertion. Spec... | 09/28/2010 |
| 7801205 | Jitter injection circuit, electronics device, and test apparatus Provided is a jitter injection circuit that injects jitter having a predetermined amplitude to a transmission signal outputted from a transmission circuit, and inputs the resulting transmission signal to a reception circuit, the jitter injection circuit including: a... | 09/21/2010 |
| 7778319 | Jitter measuring apparatus, jitter measuring method and test apparatus There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement having a first pulse generator for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding... | 08/17/2010 |
| 7760796 | Transceiver for receiving and transmitting data over a network and method for testing the same The present invention provides a transceiver for receiving and transmitting data over a network, and a method for testing the same. In particular, the present invention provides a physical layer transceiver having a built-in-self-test (BIST) device that allows for, ... | 07/20/2010 |
| 7746922 | Apparatus and method for frequency calibration between two radios Wireless devices transmit and receive radio signals based upon reference frequencies generated by crystal oscillators. If the reference frequencies of the transmitter and the receiver are different, the radio signals may not be received properly or may not be receiv... | 06/29/2010 |
| 7729418 | Testing circuit for measuring a frequency of signal output from clock generator A testing circuit measures a center frequency of a clock signal outputted by a clock generator. The clock generator has a frequency modulator capable of (1) performing a frequency sampling accurately for the duration of modulation frequency and reducing the duration... | 06/01/2010 |
| 7724812 | Method and apparatus for de-jittering a clock signal The present invention discloses a de-jittering method for a clock signal, which is implemented by adopting a controllable frequency divider and includes: taking the clock signal to be de-jittered as a reference signal, and comparing a feedback clock signal outputted... | 05/25/2010 |
| 7702009 | Timing analysis apparatus and method of timing analysis A timing analysis apparatus in an integrated logical circuit according to the present invention includes a jitter information generation unit for generating period jitter information of an operational clock in response to a power supply/ground noise, a jitter inform... | 04/20/2010 |
