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Pizza Pie With Concentric Rings of Crust
A pizza mold for forming a plurality of concentric raised ridges of dough (i.e., crust) on the surface of a pizza pie.
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| Number | Title | Issue Date |
| 7796587 | Methods and apparatus for storage and processing of routing information Methods and apparatus for processing a plurality of sets of routing information received from corresponding ones of a plurality of neighbor nodes connectable to a router, the router having a plurality of memory units accessible via separate paths. The method compris... | 09/14/2010 |
| 7701932 | Distributed automatically-configuring switching system A distributed switching system comprising a call controller, multiple source modules, and multiple destination modules provides circuit switching functionality without using a centralized circuit switch. When a source module of the multiple source modules receives i... | 04/20/2010 |
| 7558259 | System and method for transmitting analyzed data on a network An instrumentation network data system that transmits periodically measured instrument parameters or data to workstations residing on a computer network. A laboratory workstation residing on the network periodically collects and processes data from the instruments a... | 07/07/2009 |
| 7535898 | Distributed switch memory architecture A distributed memory switch system for transmitting packets from source ports to destination ports, comprising: a plurality of ports including a source port and a destination port wherein a packet is transmitted from the source port to the destination port; a memory... | 05/19/2009 |
| 7362756 | Fast handoff method with CoA pre-reservation and routing in use of access point in wireless networks A fast handoff method of an Access Router includes receiving and storing at an Access Point a Router Advertisement message periodically sent from the Access Router to which the Access Point is connected, the Access Point being connected to at least one mobile node i... | 04/22/2008 |
| 7352739 | Method and apparatus for storing tree data structures among and within multiple memory channels Tree data structures are stored among and within multiple memory channels, which may be of particular use with, but not limited to tree bitmap data structures. A subtree (or entire tree) typically includes one or more leaf arrays and multiple tree arrays. One or mor... | 04/01/2008 |
| 7333442 | Apparatus and method for applying ciphering in universal mobile telecommunications system Apparatus and a method for ciphering messages in mobile telecommunications system user equipment are disclosed. The apparatus is arranged to receive ciphering configuration parameters in a Radio Resource Control (RRC) layer; forward ciphering configuration parameter... | 02/19/2008 |
| 7330916 | Graphic controller to manage a memory and effective size of FIFO buffer as viewed by CPU can be as large as the memory A system for providing a command stream that includes a controller chip is disclosed. The controller chip includes an engine operative to manage a memory. The engine includes an interface. A storage element is coupled to the engine and the storage element is accessi... | 02/12/2008 |
| 7324539 | Method and apparatus for processing channelized and unchannelized data within a signal A method and apparatus for processing channelized and unchannelized data within a signal are described. In one embodiment, a method comprises receiving in a network element, data packets within a number of channels, wherein each of the number of channels are channel... | 01/29/2008 |
| 7324540 | Network protocol off-load engines The disclosure describes techniques for coordinating operation of multiple network protocol off-load engines (e.g., Transport Control Protocol (TCP) off-load engines). ... | 01/29/2008 |
| 7319695 | Deficit-based striping algorithm Roughly described, a striping algorithm selects a route on which to transmit each next data segment, pseudorandomly from among a subset of eligible routes, the subset being chosen in dependence upon relative channel loading so far. Preferably each ingress node to a ... | 01/15/2008 |
| 7286842 | Method and apparatus for supporting direct link communication in TDD CDMA system A method for supporting P2P communication between two user equipments in TDD CDMA systems, performed by user equipment, comprising: receiving signals transferred via the downlink control channel from network system; acquiring the timeslot allocation information and ... | 10/23/2007 |
| 7274689 | Packet switch with one-stop buffer in memory with massive parallel access A broadband packet switch that handles all packets that arrive within the same frame time by simultaneously bit-pipelining the packets into different sections of the one-stop packet buffer through an input switch. Each packet remains in is selected section until its... | 09/25/2007 |
| 7269168 | Host bus adaptor-based virtualization switch Placing virtualization agents in the switches which comprise the SAN fabric. Higher level virtualization management functions are provided in an external management server. Conventional HBAs can be utilized in the hosts and storage units. In a first embodiment, a se... | 09/11/2007 |
| 7269180 | System and method for prioritizing and queuing traffic A system is provided for prioritizing and queuing traffic from a plurality of data streams. The system includes a queuing structure, processing circuitry, and a search engine. The queuing structure has a plurality of queues. The search engine is implemented on the p... | 09/11/2007 |
| 7266128 | Time-slot interchange switches having efficient block programming and on-chip bypass capabilities and methods of operating same Time-slot interchange (TSI) switches include a data memory having first entries therein that contain serial data received by the switch and a connection memory having second entries therein. When programmed, these second entries contain addresses of a plurality of t... | 09/04/2007 |
| 7263204 | Blind watermarking method by grouping codewords for VQ-quantized images A blind watermarking method by grouping codewords for VQ-quantized images is disclosed. Especially there is provided a watermark insertion method in which a codebook is divided into three groups satisfying specific standards and a codeword is allocated based on the ... | 08/28/2007 |
| 7260093 | Time-slot interchange switches having group-based output drive enable control and group-based rate matching and output enable indication capability Time-slot interchange (TSI) switches include an input buffer that is configured to receive at least first and second groups of serial input data streams and an output driver that is configured to generate at least first and second groups of serial output data stream... | 08/21/2007 |
| 7260092 | Time slot interchanger A digital cross connect comprises plural switching stages. Each stage has plural switches which receive plural frames of time multiplexed input data and which switch the data in time and space. Configurations of the switches change in frame synchronization at the st... | 08/21/2007 |
| 7254128 | Channel data extracting circuit and extracting method A channel data extracting circuit for extracting data for each channel from a frame in which byte data of channels are multiplexed includes a Banyan unit and data control unit. The Banyan unit distributes data for respective channels by Banyan switches of planes cor... | 08/07/2007 |
| 7211863 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each o... | 05/01/2007 |
| 7206328 | SONET/SDH transmission control device A transmission device far efficient synchronous multiplexing control for downsizing and reducing power consumption. A count control performs channel management control on a cross-connect basis using count control of channels of high-bit-rate and low-bit-rare multipl... | 04/17/2007 |
| 7188013 | Method for cross-linking of regulation-and/or control functions for a motor vehicle A method for interlinking regulation and/or control functions for a motor vehicle, the communication structure of the control or regulation functions is defined by way of graphs containing nodes and directed gridlines, the nodes of the graph representing control or ... | 03/06/2007 |
| 7187673 | Technique for creating a machine to route non-packetized digital signals using distributed RAM A signal router routes N inputs to M outputs. All inputs signals are ultimately applied to a data buss by spreading across multiple buss lines and time multiplexing. The data are read from the buss and written in identical images to K random access memories. The mem... | 03/06/2007 |
| 7120155 | Switch having virtual shared memory A network of switches having a first switch having a first memory interface and a first expansion port. The network also has an expansion bus having a first expansion bus interface and a second expansion bus interface. The first expansion bus interface is connected ... | 10/10/2006 |
| 7103038 | Systems and methods for converting a packet/cycle datapath to a packet/cycle datapath A packet processing system converts a wide bus carrying P packets to a narrower bus that can carry only Q packets, where Q | 09/05/2006 |
| 7082127 | Synchronous dynamic register updating across a distributed system A switch for a network. The switch comprises a memory mechanism in which portions of packets are stored. The switch comprises a mechanism for instituting changes to the memory mechanism while the memory mechanism continuously operating on packets. A method for switc... | 07/25/2006 |
| 7079555 | Integrated digital loop carrier system with virtual tributary mapper circuit An integrated digital loop carrier (IDLC) system includes digital line feeders and signal processors to interface with the feeders an to ultimately provide data to subscriber instruments. The system can be employed as a central office terminal (COT) or remote digita... | 07/18/2006 |
| 7069407 | Method and apparatus for a multi-channel high speed framer A method and apparatus for a multi-channel high speed framer is described. In one embodiment, the invention is an apparatus. The apparatus includes a first plurality of pipeline stages suitable for data framing between a link layer and a network interface. The appar... | 06/27/2006 |
| 7068653 | Data packet switching node accommodating very high bit rate interfaces A data packet switching node, for use in an asynchronous digital network, that has an input stage that cuts data packets into segments of constant length, a switching matrix having input ports and output ports supporting identical bit rates B switching the segments ... | 06/27/2006 |
| 7062671 | Apparatus and method for buffering data in a communication system An apparatus and method for buffering data in a communication system. The apparatus includes a first and a second storage unit. The first storage unit is configured to store first data in a first mode and retrieve the first data in a second mode. The second storage ... | 06/13/2006 |
| 7054311 | Methods and apparatus for storage and processing of routing information Method, apparatus and software for processing sets of routing information in a router having a plurality of memory units accessible via separate access paths. The sets of routing information are typically routes received from neighbour nodes. The method includes cre... | 05/30/2006 |
| 7051110 | Data reception/playback method and apparatus and data transmission method and apparatus for providing playback control functions A data reception/playback apparatus includes sending means for sending a transmission request to a transmission apparatus, reception means for receiving stream data transmitted from the transmission apparatus in response to the transmission request, selection means ... | 05/23/2006 |
| 7042910 | Clock signal decoupling for synchronous operation Method and apparatus is described for decoupling data from a clock signal and recoupling the data to a different clock signal for subsequent synchronous processing by a pointer processor. More particularly, on a receive or drop side, one buffer is configured to stor... | 05/09/2006 |
| 7042874 | Digital switching system and method of switching data of same A digital switching system includes a multiplexer for multiplexing time slots from a plurality of circuits, a switching memory for storing and switching the multiplexed data for one frame period, switching control equipment for directing the interchange of the time ... | 05/09/2006 |
| 7009964 | Rotator switch data path structures Several rotator switch architectures are provided that enhance performance of a basic rotator switch. The rotator switches having double buffered tandem nodes, multiplexing two or more sources onto each tandem node, partitioning the rotator into two or more parallel... | 03/07/2006 |
| 7006525 | Hybrid data transport scheme over optical networks A frame configured to (i) be transmitted on a network and (ii) store data packets in a plurality of channels. One or more of the plurality of channels may be configured to store one or more fragments of the data packets. ... | 02/28/2006 |
| 6965991 | Methods and apparatus for power control in a scalable array of processor elements A reconfigurable register file system is described. The reconfigurable register file system includes an instruction register for storing an instruction specifying an operational requirement, a reconfigurable register file comprising an odd register file having at le... | 11/15/2005 |
| 6965602 | Switch fabric capable of aggregating multiple chips and links for high bandwidth operation A switching fabric capable of supporting high bandwidth switching operations is disclosed. In one aspect, multiple switching chips and multiple links thereto are used to provide a high bandwidth switching fabric. In another aspect, payload data is transmitted follow... | 11/15/2005 |
| 6961338 | Demultiplexer for handling different multiplexed data formats A demultiplexer for separating different format packets from a multiplexed data stream. Each packet format has a different type of header which is analyzed based on micro-codes read out in sequence from a command memory. By using micro-codes, the demultiplexer minim... | 11/01/2005 |
