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| Number | Title | Issue Date |
| 8005079 | Network switch having virtual input queues for flow control A network switching device includes a plurality of ports to receive data frames over a plurality of communication channels. The plurality of ports selectively store the data frames in blocks of a shared memory. A receiving port of the plurality of ports stores a fir... | 08/23/2011 |
| 7916719 | Apparatus and method for controlling hybrid ARQ memory in broadband wireless access communication system A method and HARQ memory apparatus in a BWA communication system are provided where the HARQ memory apparatus includes a memory configured to partition the entire memory area in units of slots corresponding to the size of a concatenation block, to input/output a plu... | 03/29/2011 |
| 7916718 | Flow and congestion control in switch architectures for multi-hop, memory efficient fabrics A shared memory switch and switch fabric architecture are described which employ partitions of the shared memory to implement multiple, independent virtual congestion domains, thereby allowing congestion to be handled for different classes of traffic independently. | 03/29/2011 |
| 7778244 | Storage system management with diplexing using USB signal conversion A system for management of storage devices includes compatibility with either or both of COM/RS232 port and USB port connectivity using, for example, Fibre Channel (FC) signal transmission. A USB to serial RS232 bridge device allows a storage processor (SP) to commu... | 08/17/2010 |
| 7738450 | System architecture for very fast ethernet blade The system of the present invention provides data transmission speeds at or in excess of 10 gigabits per second between one or more source devices and one or more destination devices. The system comprises a media access control (MAC) interface to facilitate receipt ... | 06/15/2010 |
| 7706360 | Disk device for loading and unloading disks of different sizes An optical disk drive of a slot-in type is loadable with any of two optical disks different in the diameter, and has an insertion slot formed in a case chassis for disk loading. A disk entered through the insertion slot is received by a disk support arm set in a rea... | 04/27/2010 |
| 7646766 | Signal-processing device with improved triggering A digital signal-processing device is described which comprises a recording controller for control of recording in the memories drives a trigger-switching element arranged in the trigger line downstream of the two parallel-operating signal-processing units in such a... | 01/12/2010 |
| 7639676 | SIP server The number of simultaneous connections to a SIP server is increased without degrading overall performance. If it is judged that, when a newly requested call is accepted, the number of calls whose call control data is stored in a call processing memory or the amount ... | 12/29/2009 |
| 7492760 | Memory egress self selection architecture A method of time division multiplex switching reduces the implementation area by reducing the area required for both memory storage at each egress port and the multiplexing circuitry required. Ingress and egress processors are implemented to control the storage and ... | 02/17/2009 |
| 7408878 | System packet interface An apparatus including a first integrated circuit (IC), a second IC, and an interface coupling the first IC to the second IC. The interface transfers payload control information between the first IC and the second IC utilizing a number of data transmission lines. On... | 08/05/2008 |
| 7379453 | Method and apparatus for transferring multiple packets from hardware A method and apparatus for facilitating transfer of packets from communication hardware to a host computing device or software. After receiving s set of packets at a communication interface, the system writes in a hybrid buffer a type II completion line configured t... | 05/27/2008 |
| 7372856 | Method for real-time transport protocol (RTP) packet authentication A method for Real-time Transport Protocol (RTP) packet authentication on a packet data network. In particular, the invention relates to a method for preventing toll fraud, privacy compromise, voice quality degradation, or denial of service (DoS) on Voice over IP net... | 05/13/2008 |
| 7366803 | Integrated circuit for buffering data by removing idle blocks to create a modified data stream when memory device is not near empty A circuit for buffering data is disclosed. The circuit comprises a first circuit which is coupled to receive a stream of data blocks using a first clock signal. The first circuit removes data blocks, such as idle data blocks or a sequence ordered set of a pair of co... | 04/29/2008 |
| 7353320 | Memory hub and method for memory sequencing A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics—for example, page hit rate, prefetch hits, and/or cache hit rate. The performance counter commu... | 04/01/2008 |
| 7353035 | Method and system for selective display of the origination address and the call-back number of the originator of an electronic message A method and system for selectively displaying an origination address of a mobile message, e.g., an SMS message, includes the steps of: (1) determining that a mobile message includes an origination address that should not be displayed on a recipient device; and (2) ... | 04/01/2008 |
| 7353418 | Method and apparatus for updating serial devices The present invention provides a method and apparatus for updating serial devices. The apparatus includes a plurality of serial registers. The apparatus further includes a device adapted to provide a signal and a plurality of parallel registers, wherein each of the ... | 04/01/2008 |
| 7350059 | Managing stack transfers in a register-based processor The present invention is generally directed to a method and apparatus for emulating a portion of a stack. Certain embodiments of the invention manage data transfers between processor registers that are configured to emulate a top portion of a stack and memory, which... | 03/25/2008 |
| 7333489 | System and method for storing frame header data A system and method for storing header information in parallel with corresponding frames of data, wherein the frames of data are stored in a first-in-first-out buffer and wherein the header information is accessed to make routing decisions for the frames of data whi... | 02/19/2008 |
| 7330992 | System and method for read synchronization of memory modules A memory module includes several memory devices coupled to a memory hub. The memory hub includes several link interfaces coupled to respective processors, several memory controller coupled to respective memory devices, a cross-bar switch coupling any of the link int... | 02/12/2008 |
| 7327832 | Adjunct processing of multi-media functions in a messaging system A system and methods to allow messaging systems to efficiently perform multi-media processing functions are provided. An exemplary messaging system comprises a host computer interconnected to a network interface unit (NIU), that is, itself, interconnected to externa... | 02/05/2008 |
| 7319694 | Communication apparatus and network system having rapid digital interface Dominated nodes A, B and C equip only with lower layers 1a, 2a and 3a, and upper layers for the lower layers are not equipped. Each of the lower layers 1a, 2a and 3a comprises a pres... | 01/15/2008 |
| 7304942 | Methods and apparatus for maintaining statistic counters and updating a secondary counter storage via a queue for reducing or eliminating overflow of the counters Methods and apparatus are disclosed for maintaining statistic counters and updating a secondary counter memory via a queue for reducing or eliminating overflow of the counters. Multiple counter values are stored in a primary counter storage. An indication of a parti... | 12/04/2007 |
| 7299039 | Method and system for providing data service in interworking wireless public and private networks A method and system for providing a data service in interworking wireless public and private networks, allows for data service data being transmitted through the private network when a data service is to be transmitted through the private network within the network ... | 11/20/2007 |
| 7292567 | Router and methods for distributed virtualization A router for use in a network includes a scalable architecture and performs methods for implementing quality of service on a logical unit behind a network port; and for implementing storage virtualization. The architecture includes a managing processor, a supervisin... | 11/06/2007 |
| 7289500 | Method and system for reliable multicast data transmission Provided is a method and system for reliably multicasting a data transmission from a server to one or more clients, which may be connected via a control channel and a multicast data channel. In one example, the method includes sending a first data transmission to th... | 10/30/2007 |
| 7266117 | System architecture for very fast ethernet blade The system of the present invention provides data transmission speeds at or in excess of 10 gigabits per second between one or more source devices and one or more destination devices. The system comprises a media access control (MAC) interface to facilitate receipt ... | 09/04/2007 |
| 7266128 | Time-slot interchange switches having efficient block programming and on-chip bypass capabilities and methods of operating same Time-slot interchange (TSI) switches include a data memory having first entries therein that contain serial data received by the switch and a connection memory having second entries therein. When programmed, these second entries contain addresses of a plurality of t... | 09/04/2007 |
| 7260093 | Time-slot interchange switches having group-based output drive enable control and group-based rate matching and output enable indication capability Time-slot interchange (TSI) switches include an input buffer that is configured to receive at least first and second groups of serial input data streams and an output driver that is configured to generate at least first and second groups of serial output data stream... | 08/21/2007 |
| 7251714 | Method and system for capturing and bypassing memory transactions in a hub-based memory system A memory hub includes a reception interface that receives data words and captures the data words in response to a first clock signal in a first time domain. The interface also provides groups of the captured data words on an output in response to a second clock sign... | 07/31/2007 |
| 7233571 | Connection-based bandwidth utilization A way to provide connection-based bandwidth utilization is disclosed. A connection is provided between a plurality of clients in the network environment. The connection is between the plurality of clients by a plurality of nodes through a plurality of trunks. The ut... | 06/19/2007 |
| 7230927 | Non-blocking expandable call center architecture An improved call center architecture includes a switch which communicates with agents either over a broadband network or through a conventional legacy PBX. The hybrid configuration also includes N+1 fault tolerance and the ability to linearly expand the capacity of ... | 06/12/2007 |
| 7231469 | Disk controller A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the ... | 06/12/2007 |
| 7184431 | Rotator communication switch having redundant elements A rotator switch includes active and redundant tandem buffers used to switch information units through the switch. The tandem buffers are interconnected to inputs and outputs by way of commutators. Information provided to one or more of the active buffers is provide... | 02/27/2007 |
| 7180522 | Apparatus and method for distributed memory control in a graphics processing system A distributed memory controller memory system for a graphics processing system having addressable memory areas each coupled to a respective memory controller. The memory controllers are further coupled to each other through a memory controller bus upon which a memor... | 02/20/2007 |
| 7167410 | Memory system and memory device having a serial interface A memory device and system are disclosed that may include a serial data interface, a serial address interface, and a reference clock interface. The reference clock interface is configured to receive a signal from a reference clock source that provides a reference cl... | 01/23/2007 |
| 7165103 | Method and system for matching network clients and servers under matching constraints A method of finding an optimal match between clients and servers under given matching constraints utilizes a bipartite diagram in which the clients are presented as vertices on one side, the servers as vertices on the other side, and each possible client-server pair... | 01/16/2007 |
| 7149537 | Method and system for generating a user-accessible internet-based mobile messaging log A system and method for providing a user-accessible Internet-based mobile messaging log that records messages communicated between an Internet-based sending device and an SMS-capable mobile device. An SMS messaging log is created for each Internet-based user that se... | 12/12/2006 |
| 7142536 | Communications network quality of service system and method for real time information The present invention provides efficient and effective quality of service for information that is time sensitive (e.g., real time data). An intermediate network communication system and method (e.g., a router) of the present invention performs cut through switching ... | 11/28/2006 |
| 7133991 | Method and system for capturing and bypassing memory transactions in a hub-based memory system A memory hub includes a reception interface that receives data words and captures the data words in response to a first clock signal in a first time domain. The interface also provides groups of the captured data words on an output in response to a second clock sign... | 11/07/2006 |
| 7124200 | Routing apparatus Disclosed is a routing apparatus for obtaining routing data conforming to a destination address of a packet that arrives from a line, adding the routing data onto the packet, and switching the packet based upon the routing data to send the packet to a prescribed lin... | 10/17/2006 |
