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| Number | Title | Issue Date |
| 8085571 | High density prom The invention shows how diodes in a modern semiconductor process can be used as a very compact switch element in a Programmable Read Only Memory (PROM) using common integrated circuit fuse elements such as polysilicon and metal. This compact switch element allows ve... | 12/27/2011 |
| 8054667 | Multilevel one-time programmable memory device A multilevel one-time programmable memory device includes a plurality of memory cells, wherein each of the plurality of memory cells includes: a first electrode to which a first voltage is applied, a second electrode to which a second voltage is applied and a plural... | 11/08/2011 |
| 8031506 | One-time programmable memory cell A disclosed embodiment is a programmable memory cell having improved IV characteristics comprising a thick oxide spacer transistor interposed between a programmable thin oxide antifuse and a thick oxide access transistor. The spacer transistor separates a rupture si... | 10/04/2011 |
| 7978493 | Data encoding scheme to reduce sense current Techniques for encoding and decoding fuse data to reduce sense current are disclosed. An embodiment to encode fuse sense data includes inverting each of the bits of the fuse data and using an individual fuse as a flag bit to record the data inversion. The states of ... | 07/12/2011 |
| 7974115 | One-time programmable devices including chalcogenide material and electronic systems including the same A switching device disposed in a substrate is turned on and a program current is applied to a fuse electrically connected to a switching device, thereby cutting the fuse. The fuse includes a first electrode electrically connected to the switching device, a second el... | 07/05/2011 |
| 7969763 | Detector circuit for detecting an external manipulation of an electrical circuit, circuit arrangement comprising a plurality of detector circuits, memory device and method for operating a detector circuit A detector circuit for detecting an external manipulation of an electrical circuit. The detector circuit includes a digital circuit which is sensitive to at least one of the effects of ionizing radiation or fluctuations of a supply voltage, and the output state of t... | 06/28/2011 |
| 7944727 | Mask programmable anti-fuse architecture A memory array having both mask programmable and one-time programmable memory cells connected to the wordlines and the bitlines. All memory cells of the memory array are configured as one-time programmable memory cells. Any number of these one-time programmable memo... | 05/17/2011 |
| 7936582 | E-fuse read circuit with dual comparators An integrated circuit has an E-fuse sense circuit configured to produce a READ voltage according to a fuse resistance of an E-fuse during a READ operation. The integrated circuit also has a reference sense circuit configured to produce a reference voltage according ... | 05/03/2011 |
| 7924596 | Area efficient programmable read only memory (PROM) array A programmable ROM (PROM) architecture includes cascode NMOS transistors with a fuse bit cell that is arrayed, with sleep transistors located in each column of the array that in a standby mode shut down the entire fuse array. A fuse redundancy scheme may be used to ... | 04/12/2011 |
| 7924597 | Data storage in circuit elements with changed resistance A method of storing data in an array of circuit elements, said method comprising injecting a current into selected circuit elements, said current causing a persistent change in a resistance of said selected circuit elements from a first resistance to a second higher... | 04/12/2011 |
| 7920401 | Method, apparatus and system, providing a one-time programmable memory device Disclosed are apparatus, system and methods of programming and readout of a one-time programmable memory device having an array of memory cells, where the cells include an anti-fuse element and an in-cell amplifier transistor. Circuitry configured for programming an... | 04/05/2011 |
| 7911820 | Regulating electrical fuse programming current An apparatus for regulating eFUSE programming current includes a current control generator receiving an input reference current through a first current path of reference fuses, the input reference current proportional to a desired eFUSE programming current; a second... | 03/22/2011 |
| 7894233 | Fuse devices and methods of operating the same A fuse device includes a fuse unit, which includes a cathode, an anode, and a fuse link coupling the cathode and the anode. A transistor includes at least a portion of the fuse unit to be used as an element of the transistor. In at least one example embodiment, the ... | 02/22/2011 |
| 7889534 | Semiconductor integrated circuit for supporting a test mode A semiconductor integrated circuit for supporting a test mode includes a program region including at least one One Time Programmable Cell Array, and a program region control unit configured to activate the program region in response to an enabled fuse signal of a fu... | 02/15/2011 |
| 7872898 | One time programmable read only memory and programming method thereof A one time programmable read only memory disposed on a substrate of a first conductive type is provided. A gate structure is disposed on the substrate. A first doped region and a second doped region are disposed in the substrate at respective sides of the gate struc... | 01/18/2011 |
| 7872897 | Programmable semiconductor device A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first ... | 01/18/2011 |
| 7817456 | Program lock circuit for a mask programmable anti-fuse memory array A program lock circuit for inhibiting programming of memory cells. A memory array can have both mask programmable and one-time programmable memory cells connected to the wordlines and the bitlines. Since the one-time programmable memory cells are convertible into ma... | 10/19/2010 |
| 7817455 | Random access electrically programmable e-fuse ROM A one-time-programmable-read-only-memory (OTPROM) is implemented in a two-dimensional array of aggressively scaled suicide migratable e-fuses. Word line selection is performed by decoding logic operating at VDD while the bit line drive is switched between... | 10/19/2010 |
| 7804701 | Method of programming a memory having electrically programmable fuses An array of memory cells is arranged in a plurality of columns and rows, each of the memory cells including a programmable fuse connected to a predetermined bit line and in series with a select transistor. The select transistor has a first current electrode connecte... | 09/28/2010 |
| 7782648 | Fuse reading circuit Correction data is written in fuse circuits of q bits. A reading circuit sequentially reads information of the fuse circuits through a selector and writes the information in a storage circuit. Therefore, read data is output from the storage circuit in parallel. ... | 08/24/2010 |
| 7764532 | High speed OTP sensing scheme A high speed sensing scheme for a non-volatile memory array is disclosed. The memory array includes non volatile memory cells arranged in a complementary bitline configuration includes precharge circuits for precharging the bitlines to a first voltage level such as ... | 07/27/2010 |
| 7764531 | Implementing precise resistance measurement for 2D array efuse bit cell using differential sense amplifier, balanced bitlines, and programmable reference resistor A method and circuit for implementing precise eFuse resistance measurement, and a design structure on which the subject circuit resides are provided. An eFuse sense amplifier coupled to an eFuse array and used for current measurements includes balanced odd and even ... | 07/27/2010 |
| 7760536 | Non-volatile memory cell A non-volatile memory cell and method for reading it are disclosed. In one embodiment, the non-volatile memory cell includes a fuse with a first terminal coupled to a first power supply voltage terminal, and a second terminal, a first transistor having a first curre... | 07/20/2010 |
| 7715219 | Non-volatile programmable memory cell and memory array A non-volatile one time programmable memory cell couples in series a two terminal fuse and a three terminal antifuse. The non-volatile one time programmable memory cell includes a memory cell write enable node and a memory cell output node. The non-volatile one time... | 05/11/2010 |
| 7706166 | Semiconductor memory device comprising memory element programming circuits having different programming threshold power supply voltages A semiconductor memory device has first and second AF programming circuits having low and high AF programming threshold power supply voltages, respectively. In a process where a large majority of programming is carried out in the semiconductor memory device alone, t... | 04/27/2010 |
| 7701744 | Method of arranging fuses in a fuse box of a semiconductor memory device and a semiconductor memory device including such an arrangement A semiconductor memory device may include a memory cell array and at least one fuse box. The memory cell array may include a plurality of sub-array blocks, and a fuse box may include a plurality of fuse groups, each group corresponding to a sub-array block. Each fus... | 04/20/2010 |
| 7688613 | Method and system for controlling multiple electrical fuses with one program device A fuse circuit comprising one or more one-time programmable electrical fuses; one or more unidirectional conductive devices each coupled to one of the fuses; a programming device coupled to the unidirectional conductive devices; and a selection module coupled to the... | 03/30/2010 |
| 7672150 | Apparatus, embedded memory, address decoder, method of reading out data and method of configuring a memory Embodiments of the invention relate generally to an apparatus, to an embedded memory, to an address decoder, to a method of reading out data and to a method of configuring a memory. In an embodiment of the invention an apparatus is provided. The apparatus may includ... | 03/02/2010 |
| 7656695 | Electronic fuse system and methods An electronic fuse system and method are disclosed employing a fuse ROM having one or more blocks of memory. Each block of memory comprises a plurality of words with at least one word of the plurality of words containing security bits associated with a respective bl... | 02/02/2010 |
| 7656694 | Methods of programming one-time programmable devices including chalcogenide material A method of programming a one-time programmable device is provided. A switching device disposed in a substrate is turned on and a program current is applied to a fuse electrically connected to the switching device, thereby cutting the fuse. The fuse includes a first... | 02/02/2010 |
| 7630226 | Semiconductor device A memory cell includes: an irreversible storage element that writes data by breaking down an insulating film, with a write voltage being applied to its one end; and first and second transistors with one end being connected to the other end of the irreversible storag... | 12/08/2009 |
| 7626845 | Voltage programming switch for one-time-programmable (OTP) memories In one embodiment, the invention is an integrated circuit (IC) including an OTP memory and conditioning circuitry. The IC receives an externally-generated DC programming voltage signal that the conditioning circuitry transforms into a programming pulse signal for pr... | 12/01/2009 |
| 7626870 | Semiconductor device with a plurality of one time programmable elements A semiconductor device with a plurality of one time programmable elements and to a method for programming a semiconductor device, and to a method for operating a semiconductor device is disclosed. One embodiment provides a method for programming a semiconductor devi... | 12/01/2009 |
| 7619914 | Semiconductor memory device A memory cell includes an antifuse device that is capable of having data written thereto by breakdown of a gate dielectric film by application of a high voltage. A data inversion portion generates, according to a relationship between the sense amplifier's determinat... | 11/17/2009 |
| 7609539 | Electrically programmable fuse bit One-time programmable (OTP) nonvolatile fuse memory cells are disclosed that do not require decoding or addressing for reading their data content. Each fuse memory cell has its content latched at its output and available at all times and can be used, for example, fo... | 10/27/2009 |
| 7606058 | Autonomous antifuse cell An autonomous antifuse cell providing protection against intruders includes an antifuse, sense circuitry, feedback circuitry, program circuitry, and blocking circuitry. The blocking circuitry blocks access of any programming voltage input signals to the antifuse dev... | 10/20/2009 |
| 7599206 | Non-volatile semiconductor storage device A non-volatile semiconductor storage device includes: one or more memory cells including anti-fuse elements capable of writing data by breaking down a gate insulation film of a MOS transistor with a high voltage; a sense node having its one end connected to each of ... | 10/06/2009 |
| 7593248 | Method, apparatus and system providing a one-time programmable memory device Disclosed are apparatus, system and methods of programming and readout of a one-time programmable memory devise having an array of memory cells, where the cells include an anti-fuse element and an in-cell amplifier transistor. Circuitry configured for programming an... | 09/22/2009 |
| 7589989 | Method for protecting memory cells during programming Improved circuitry and methods operate to protect the memory cells from potentially damaging electrical energy that can be imposed during programming of the memory cells. Additionally, the improved circuitry and methods operate to detect when programming of the memo... | 09/15/2009 |
| 7567449 | One-time-programmable logic bit with multiple logic elements A memory cell with a logic bit has a first one-time-programmable (“OTP”) memory element providing a first OTP memory element output and a second OTP memory element providing a second OTP memory element output. A logic operator coupled to the first OTP memory ele... | 07/28/2009 |
