Did You Know...
...that Thomas Edison's patent application on his phonograph was approved by the Patent Office in just seven weeks? In contrast, it took Gordon Gould, the inventor of the laser, 30 years to obtain his patent -- finally awarded in 1988!
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| Number | Title | Issue Date |
| 8098541 | Non-volatile memory with stray magnetic field compensation A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular aniso... | 01/17/2012 |
| 7940600 | Non-volatile memory with stray magnetic field compensation A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular aniso... | 05/10/2011 |
| 7477567 | Memory storage device with heating element A memory storage device is provided that includes a storage cell having a changeable magnetic region. The changeable magnetic region includes a material having a magnetization state that is responsive to a change in temperature. The memory storage device also includ... | 01/13/2009 |
| 7359227 | Shared address lines for crosspoint memory A crosspoint memory includes a shared address line. The shared address line may be coupled to cells above and below the address line in one embodiment. Voltage biasing may be utilized to select one cell, and to deselect another cell. In this way, each cell may be ma... | 04/15/2008 |
| 7345945 | Line driver circuit for a semiconductor memory device A semiconductor memory device having a word line driver circuit configured in stages. A plurality of sub word line driver circuits are connected, in parallel, to each main word line, and provide a sub word line enable signal to a selected sub word line in response t... | 03/18/2008 |
| 7342822 | Magnetic memory device, write current driver circuit and write current driving method The number of write circuit components, variations in a write current flowing through each write line, and the power consumption for write operation can be reduced. A first constant current circuit and a second constant current circuit (a transistor (Q8) and ... | 03/11/2008 |
| 7335395 | Methods of using pre-formed nanotubes to make carbon nanotube films, layers, fabrics, ribbons, elements and articles Methods of Using Preformed Nanotubes to Make Carbon Nanotube Films, Layers, Fabrics, Ribbons, Elements and Articles are disclosed. To make various articles, certain embodiments provide a substrate. Preformed nanotubes are applied to a surface of the substrate to cre... | 02/26/2008 |
| 7336528 | Advanced multi-bit magnetic random access memory device An advanced multi-bit magnetic random access memory device and a method for writing to the advanced multi-bit magnetic random access memory device. The magnetic memory includes one or more pair-cells. A pair-cell is two memory cells. Each memory cell has a magnetic ... | 02/26/2008 |
| 7196955 | Hardmasks for providing thermally assisted switching of magnetic memory elements An exemplary magnetic random access memory comprises a plurality of hardmasks, a plurality of magnetic memory elements each having been formed using a corresponding one of the hardmasks, and at least one conductor near the hardmasks. The conductor is capable of carr... | 03/27/2007 |
| 7180770 | Series diode thermally assisted MRAM An information storage device is provided. The information storage device may be a magnetic random access memory (MRAM) device including a resistive cross point array of spin dependent tunneling (SDT) junctions or magnetic memory elements, with word lines extending ... | 02/20/2007 |
| 7176505 | Electromechanical three-trace junction devices Three trace electromechanical circuits and methods of using same. A circuit includes first and second electrically conductive elements with a nanotube ribbon (or other electromechanical elements) disposed therebetween. An insulative layer is disposed on one of the f... | 02/13/2007 |
| 7158397 | Line drivers that fits within a specified line pitch Line drivers that fit within a specified line pitch. One method of placing line drivers completely underneath a cross point array requires splitting the line driver up so that a portion of the line drivers is on a first side of the cross point array and the other po... | 01/02/2007 |
| 7145824 | Temperature compensation of thin film diode voltage threshold in memory sensing circuit Systems and methodologies are provided for temperature compensation of thin film diode voltage levels in memory sensing circuits. The subject invention includes a temperature sensitive bias circuit and an array core with a temperature variable select device. The arr... | 12/05/2006 |
| 7120047 | Device selection circuitry constructed with nanotube technology A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotube or a nano... | 10/10/2006 |
| 7099229 | Nonvolatile memory device having circuit for stably supplying desired current during data writing A memory block is divided into block units for which parallel data write is performed. Current supply sections capable of supplying a power supply voltage and a ground voltage are provided for block units, independently of one another. With this configuration, in ea... | 08/29/2006 |
| 7089648 | Method for fabricating a magnetoresistive head There is provided a magnetoresistive head which can realize high sensitivity and low noise even when the reading track is being reduced. Longitudinal biasing is performed to a ferromagnetic free layer whose magnetization is rotated according to an external magnetic ... | 08/15/2006 |
| 7084437 | Semiconductor device Provided is an MRAM memory cell structure capable of preventing generation of parasitic transistors. Diodes are adopted as switching elements of an MRAM memory cell. An n-type semiconductor layer and a p-type semiconductor layer, which collectively constitute a diod... | 08/01/2006 |
| 7072207 | Thin film magnetic memory device for writing data of a plurality of bits in parallel For writing K-bit write data in parallel (K is integer at least 2), bit lines each arranged for each memory cell columns and at least K current return lines are provided. K selected bit lines to write the K-bit write data are connected in series in a single current ... | 07/04/2006 |
| 7057258 | Resistive memory device and method for making the same A resistive cross point array memory device comprising a plurality of word lines extending in a row direction, a plurality of bit lines extending in a column direction such that a plurality of cross points is formed at intersections between the word and bit lines, a... | 06/06/2006 |
| 7038939 | Magneto-resistance effect element and magnetic memory The magnetic memory includes a plurality of memory cells, each memory cell including: at least one writing wire; at least one data storage portion, provided on at least one portion of an outer periphery of the writing wire, which comprises a ferromagnetic material w... | 05/02/2006 |
| 7031185 | Data storage device and method of forming the same A resistive cross point memory cell array comprising a plurality of word lines, a plurality of bit lines, a plurality of cross points formed by the word lines and the bit lines, and a plurality of memory cells, each of the memory cells being located at a different o... | 04/18/2006 |
| 7023726 | Hybrid magnetoresistive random access memory (MRAM) architecture The present invention relates to a hybrid MRAM architecture, and more particularly to a hybrid MRAM architecture capable of being used with an MCU and an MPU. This hybrid MRAM architecture is adapted to a controlling device for accessing a bit of information, compri... | 04/04/2006 |
| 7018725 | Magneto-resistance effect element magneto-resistance effect memory cell, MRAM, and method for performing information write to or read from the magneto-resistance effect memory cell A magneto-resistive effect element includes a first ferromagnetic film; a second ferromagnetic film; and a first nonmagnetic film interposed between the first ferromagnetic film and the second ferromagnetic film. The first ferromagnetic film has a magnetization more... | 03/28/2006 |
| 7009874 | Low remanence flux concentrator for MRAM devices Systems, devices and methods are provided for magnetic memory elements with low remanence flux concentrators. Improved bit yield is attributable to reduced remanence in the flux concentrator. Remanence provides the memory element with a biasing magnetic field. The f... | 03/07/2006 |
| 7009903 | Sense amplifying magnetic tunnel device A sense amplifying magnetic tunnel (SAMT) device is disclosed. In a particular embodiment, a field effect transistor (FET) having a drain, a source, a channel therebetween, a gate electrode and a tunneling gate oxide proximate to the channel is provided. In addition... | 03/07/2006 |
| 7002228 | Diffusion barrier for improving the thermal stability of MRAM devices A magnetic random access memory device including a pinned layer having a diffusion barrier, a sense layer, and a tunnel barrier to electrically couple the pinned layer to the sense layer. A method for forming a magnetic random access memory device including forming,... | 02/21/2006 |
| 7003622 | Semiconductor memory A semiconductor memory includes a redundant RAM disposed independently of at least one regular RAM, the redundant RAM having redundant memory elements by which defective memory elements of the regular RAM can be replaced, and a control block for selecting either at ... | 02/21/2006 |
| 6979590 | Methods of making electromechanical three-trace junction devices Methods of producing an electromechanical circuit element are described. A lower structure having lower support structures and a lower electrically conductive element is provided. A nanotube ribbon (or other electromechanically responsive element) is formed on an up... | 12/27/2005 |
| 6980466 | Soft-reference four conductor magnetic memory storage device This invention provides a soft-reference four conductor magnetic memory storage device. In a particular embodiment, there are a plurality of parallel electrically conductive first sense conductors and a plurality of parallel electrically conductive second sense cond... | 12/27/2005 |
| 6975555 | Magnetic random access memory using memory cells with rotated magnetic storage elements A magnetic random access memory circuit comprises a plurality of magnetic memory cells, each of the memory cells including a magnetic storage element having an easy axis and a hard axis associated therewith, and a plurality of column lines and row lines for selectiv... | 12/13/2005 |
| 6970375 | Providing a reference voltage to a cross point memory array Providing a reference voltage to a cross point memory array. The invention is a cross point memory array and some peripheral circuitry that, when activated, provides a reference voltage to a cross point array in order to prevent unselected conductive array lines fro... | 11/29/2005 |
| 6950369 | Magnetic memory device capable of passing bidirectional currents through the bit lines A plurality of word lines (WL1) are provided in parallel to one another and a plurality of bit lines (BL1) are provided in parallel to one another, intersecting the word lines (WL1) thereabove. MRAM cells (MC2) are formed at intersections... | 09/27/2005 |
| 6947333 | Memory device A memory device, which includes a matrix of memory cells, and an arrangement of write lines electrically isolated from the memory cells. The write lines may be configured to write data to the memory cells, each write line of the arrangement being electrically couple... | 09/20/2005 |
| 6937509 | Data storage device and method of forming the same A resistive cross point memory cell array comprising a plurality of word lines, a plurality of bit lines, a plurality of cross points formed by the word lines and the bit lines, and a plurality of memory cells, each of the memory cells being located at a different o... | 08/30/2005 |
| 6927075 | Magnetic memory with self-aligned magnetic keeper structure A magnetic tunneling junction (MTJ) memory cell is formed with a keeper structure on its upper conductor (write line). The keeper structure is formed by a self aligned process as three pieces: two vertical soft magnetic side pieces contacting an upper soft magnetic ... | 08/09/2005 |
| 6919592 | Electromechanical memory array using nanotube ribbons and method for making same Electromechanical circuits, such as memory cells, and methods for making same are disclosed. The circuits include a structure having electrically conductive traces and supports extending from a surface of the substrate, and nanotube ribbons suspended by the supports... | 07/19/2005 |
| 6917539 | High-density NVRAM High density NVRAM. An array of memory cells capable of storing at least a megabit of information, each memory cell including a memory plug that includes a memory element that switches from a first resistance state to a second resistance state upon application of a ... | 07/12/2005 |
| 6912174 | Thin film magnetic memory device suppressing influence of magnetic field noise from power supply wiring A main power supply line and a main ground wiring provided to supply power from one side (a first direction) of a memory region, a main power supply line and a main ground wiring provided to supply the power from the other side (a second direction opposite to the fi... | 06/28/2005 |
| 6911682 | Electromechanical three-trace junction devices Three trace electromechanical circuits and methods of using same are described. A circuit includes first and second electrically conductive elements with a nanotube ribbon (or other electromechanical elements) disposed therebetween. The nanotube ribbon is movable to... | 06/28/2005 |
| 6909632 | Multiple modes of operation in a cross point array Multiple modes of operation in a cross point array. The invention is a cross point array that uses a read voltage across a conductive array line pair during a read mode. The read voltage produces a read current that is indicative of a first program state when the re... | 06/21/2005 |
