Quotables
"Rail travel at high speeds is not possible because passengers, unable to breathe, would die of asphyxia."
Dionysius Lardner, Professor of Natural Philosophy and Astronomy at University College, London ; 1830
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8189419 | Apparatus for nonvolatile multi-programmable electronic fuse system Electronic fuse (e-fuse) systems with multiple reprogrammability are provided. In one aspect, a reprogrammable e-fuse system is provided that includes a first e-fuse string; a second e-fuse string; a selector connected to both the first e-fuse string and the second ... | 05/29/2012 |
| 8184496 | Semiconductor device and method for operating the same A semiconductor device includes a sensing unit configured to sense whether a value of a programming sensing node is within a predefined range, a fuse connected to the programming sensing node, a programming voltage supplying unit configured to supply a programming v... | 05/22/2012 |
| 8179736 | Antifuses and program circuits having the same Antifuses and program circuits having the same. The antifuses are embodied as a transistor. When a first power supply voltage is applied to a source, a first program voltage for causing impact ionization is applied to a gate and drain, and a second program voltage f... | 05/15/2012 |
| 8174922 | Anti-fuse memory cell and semiconductor memory device An anti-fuse memory cell includes: a first transistor connected with a word line and configured to output a second voltage based on a first voltage supplied to the word line in a write mode; a second transistor connected with a bit line, and configured to output a t... | 05/08/2012 |
| 8159894 | One time programmable memory A one-time programmable memory. The one-time programmable memory has an antifuse and a read circuit configured to read the antifuse. An isolation transistor couples the antifuse to the read circuit. The read circuit and the isolation transistor have different power ... | 04/17/2012 |
| 8159895 | Method and system for split threshold voltage programmable bitcells Methods and systems for split threshold voltage programmable bitcells are disclosed and may include selectively programming bitcells in a memory device by applying a high voltage to a gate terminal of the bitcells, where the programming burns a conductive hole in an... | 04/17/2012 |
| 8154941 | Non-volatile semiconductor memory device and method of writing data therein A device includes a memory cell array and a control circuit, the memory cell array including word-lines, bit-lines, and memory cells arranged at the intersections of the word-lines and the bit-lines, each memory cell including an electrically programmable antifuse e... | 04/10/2012 |
| 8134882 | Semiconductor device including an anti-fuse element A semiconductor device includes a first high potential power supply, a second low potential power supply, a third power supply having a potential higher than the first, a fourth power supply having a potential more negative than the second, and an anti-fuse element ... | 03/13/2012 |
| 8120982 | Semiconductor device, control method for semiconductor device, and electronic device A semiconductor device including a first switch coupled to a first power supply line, a second switch coupled to the first switch and to a second power supply line, and a storage part provided in a path which is between the second power supply line and the first swi... | 02/21/2012 |
| 8120981 | Semiconductor integrated circuit device with fuse elements and control method therefore A semiconductor integrated circuit device includes a first block, a second block, and a control section. The first block includes a first fuse, a first switching configured to write data to the first fuse, a first holding portion capable of holding a first instructi... | 02/21/2012 |
| 8116163 | Semiconductor memory device The present invention provides a semiconductor memory device that includes: a fuse circuit having multiple fuse elements; and a fuse selection circuit connected to an internal address signal line that receives an address signal externally inputted. The fuse circuit ... | 02/14/2012 |
| 8116152 | Nonvolatile semiconductor memory device capable of preventing write-disturb and method of programming A nonvolatile semiconductor memory device includes a memory cell, a precharge control circuit, a power supply circuit, a bit line driver, a word line driver, a first multiplexer, and a second multiplexer. The memory cell includes an anti-fuse storage element and a s... | 02/14/2012 |
| 8089821 | Memory device using antifuses Herein described is a method of implementing one or more native NMOS antifuses in an integrated circuit. Also described is a method for programming one or more native NMOS antifuses used within a memory device. The method further comprises verifying one or more stat... | 01/03/2012 |
| 8072832 | Electronic equipment system and semiconductor integrated circuit controller An electronic equipment system includes a semiconductor integrated circuit having a nonvolatile memory storing information on a characteristic of the semiconductor integrated circuit; and a controller configured to control the semiconductor integrated circuit. The c... | 12/06/2011 |
| 8072831 | Fuse element reading circuit A fuse element reading circuit including a first fuse element having a resistance which differs in accordance with whether the first fuse element is in a blown state or an unblown state, a reference voltage output circuit unit that outputs a reference voltage that d... | 12/06/2011 |
| 8072830 | Logic embedded memory having registers commonly used by macros A semiconductor integrated circuit device includes a plurality of memory macros, macro-common register block, and memory macro operation setting circuits. The macro-common register block has macro-common registers which are provided outside the plurality of memory m... | 12/06/2011 |
| 8050129 | E-fuse apparatus for controlling reference voltage required for programming/reading e-fuse macro in an integrated circuit via switch device in the same integrated circuit An electrically programmable fuse (e-fuse) apparatus includes an e-fuse macro and a switch device. The e-fuse macro is disposed in an integrated circuit, and has a plurality of e-fuse units. The switch device is disposed in the integrated circuit, and has an output ... | 11/01/2011 |
| 8045415 | Memory devices having programmable elements with accurate operating parameters stored thereon Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measur... | 10/25/2011 |
| 8045414 | Non-volatile semiconductor memory device The row decoder receives writing instruction signal and reading instruction signal to selectively activate one of the word lines according to an input state of row address signals. The data buffer receives a data input signal when the writing instruction signal is r... | 10/25/2011 |
| 8040748 | Quad SRAM based one time programmable memory A differential latch-based one time programmable memory cell is provided. The differential latch-based one time programmable memory cell includes a differential latching amplifier having a first set of fuse devices coupled to the first input and a second set of fuse... | 10/18/2011 |
| 8023354 | Semiconductor memory device including a fuse set and a current controlling unit A semiconductor memory device includes a fuse set configured to form a current path including at least one of a plurality of fuses in response to address information corresponding to a plurality of memory cells and to output a redundancy address corresponding to a p... | 09/20/2011 |
| 8014223 | Semiconductor device A semiconductor device including a plurality of semiconductor elements, a substrate on which the plurality of semiconductor elements are mounted, the substrate also having a plurality of terminals for connecting to external equipment, a fuse mounted on the outside o... | 09/06/2011 |
| 7983105 | Antifuse replacement determination circuit and method of semiconductor memory device An antifuse replacement determination circuit of a semiconductor memory device, in which the address of a bad memory cell is stored by destroying the insulation of an antifuse element, includes a charging circuit for charging a node of the antifuse element to have a... | 07/19/2011 |
| 7952950 | Semiconductor device including anti-fuse circuit, and method of writing address to anti-fuse circuit An anti-fuse circuit according to the present invention includes an anti-fuse element that holds data in a nonvolatile manner and a latch circuit that temporarily holds data to be written to the anti-fuse element. The writing to the latch circuit can be performed in... | 05/31/2011 |
| 7952951 | Small-sized fuse box and semiconductor integrated circuit having the same Disclosed are a fuse box and a semiconductor integrated circuit having the same. The semiconductor integrated circuit includes a plurality of banks, column control blocks, and column fuse blocks. The plurality of banks including a plurality of mat rows and mat colum... | 05/31/2011 |
| 7940593 | Method and apparatus for verification of a gate oxide fuse element The present invention relates to a method and circuit for verifying the state of a gated fuse element used with a one-time programmable CMOS memory device. A first expected state is set and a state of a first gate-ox fuse is sensed. The state of the first gate-ox fu... | 05/10/2011 |
| 7932738 | Method and apparatus for reading a programmable anti-fuse element in a high-voltage integrated circuit In a method for reading a programmable anti-fuse block of a high-voltage integrated circuit a first voltage is applied to a first pin of the HVIC, the first voltage being lowered to a second voltage at a first node. Current is shunted from the first node, thereby lo... | 04/26/2011 |
| 7924646 | Fuse monitoring circuit for semiconductor memory device A fuse monitoring circuit for a semiconductor memory device includes a fuse repair unit including a plurality of fuses each programmed with at least one repair address, configured to receive a fuse reset signal and to output a plurality of fuse state signals each co... | 04/12/2011 |
| 7924647 | Fuse circuit and driving method thereof A fuse circuit includes a fuse unit configured to form a current path on a first node according to whether or not a fuse is cut; a driving current controller configured to control a potential level of the first node in response to a test signal; and an output unit c... | 04/12/2011 |
| 7911870 | Fuse data read circuit having control circuit between fuse and current mirror circuit A fuse data read circuit includes a fuse data holding unit which holds fuse data, a fuse data read unit which detects fuse data, and a bias voltage generating circuit which generates a bias voltage. The fuse data read unit includes a current mirror circuit and a con... | 03/22/2011 |
| 7911869 | Fuse-type memory cells based on irreversible snapback device In a programmable circuit making use of fuse cells, a snapback NMOS or NPN transistor or SCR without reversible snapback capability is used as an anti-fuse, and programming comprises biasing the control electrode of the transistor to cause the transistor to go into ... | 03/22/2011 |
| 7907465 | Electrically programmable fuse bit One-time programmable (OTP) nonvolatile fuse memory cells are disclosed that do not require decoding or addressing for reading their data content. Each fuse memory cell has its content latched at its output and available at all times and can be used, for example, fo... | 03/15/2011 |
| 7889587 | Fuse programming schemes for robust yield A program circuit generates first and second currents to program the fuse. The second current is higher than the first current. A control circuit controls generating the first and second currents in succession. ... | 02/15/2011 |
| 7889588 | Circuit having gate oxide protection for low voltage fuse reads and high voltage fuse programming A circuit for reading and programming a fuse. The electronic circuit includes a data fuse coupled to a data node and a reference fuse coupled to a reference node. A programming circuit is coupled to the data node, wherein the programming circuit is configured to, wh... | 02/15/2011 |
| 7881131 | Semiconductor device, information control method and electronic device A semiconductor device includes a first memory unit, a second memory unit, and a determination unit receiving a first signal permitting a write operation to one of the first memory unit and the second memory unit, and a second signal indicating whether the write ope... | 02/01/2011 |
| 7872934 | Semiconductor device and method for writing data into memory It is an object to provide memory and a semiconductor device in which falsification of data written thereinto is prevented. The memory includes a memory circuit, a writing circuit, and a reading circuit. The memory circuit has a memory cell array in which a pluralit... | 01/18/2011 |
| 7859934 | Method and apparatus for redundant memory configuration in voltage island A method and apparatus to configure redundant memory elements in a system on a chip (SoC) having discrete voltage domains (islands). A plurality of memories are provided for each voltage island, each containing redundancy elements or having the capability to access ... | 12/28/2010 |
| 7859933 | Semiconductor memory device and operating method thereof A semiconductor memory device comprises an anti-fuse, a memory circuit including memory cells, and a peripheral circuit configured to access only an area of the memory circuit selected depending on a state of the anti-fuse. ... | 12/28/2010 |
| 7852697 | Integrated circuit feature definition using one-time-programmable (OTP) memory In one embodiment, a integrated circuit (IC) configurable to have any one of a plurality of different feature sets, the IC including (a) one or more feature blocks adapted to be independently enabled or disabled, (b) a one-time-programmable (OTP) memory cell for eac... | 12/14/2010 |
| 7835211 | Semiconductor device and method of fabricating the same A semiconductor device is provided including a first fuse link having a copper-containing metal film, a second fuse link having a polysilicon film, a semiconductor substrate, and a field insulating film formed on the semiconductor substrate. The second fuse link is ... | 11/16/2010 |
