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| Number | Title | Issue Date |
| 8111573 | Nonvolatile semiconductor memory device and method of controlling the same Provided is a nonvolatile semiconductor memory device capable of performing a writing action for a memory cell at high speed. The device includes a memory cell array having a first sub-bank and a second sub-bank each having a plurality of nonvolatile memory cells ar... | 02/07/2012 |
| 8027215 | Array operation using a schottky diode as a non-ohmic isolation device A two-terminal memory cell including a Schottky metal-semiconductor contact as a non-ohmic device (NOD) allows selection of two-terminal cross-point memory array operating voltages that eliminate “half-select leakage current” problems present when other types of... | 09/27/2011 |
| 7990794 | Semiconductor apparatuses and methods of operating the same A method of operating a semiconductor device is provided including applying a constant source voltage to a source line. ... | 08/02/2011 |
| 7969806 | Systems and methods for writing to a memory An integrated circuit includes memory segments, each having at least one memory cell configurable in first and second states to store data, and a controller that controls programming and erasing of the memory segments. The controller maps external memory addresses o... | 06/28/2011 |
| 7961539 | Method of operating semiconductor device Provided is a method of operating a semiconductor device, in which a gate voltage or a drain voltage is adjusted in order to add carriers to or remove carriers from a body region, thereby realizing semiconductor having a plurality of data states. ... | 06/14/2011 |
| 7907463 | Non-volatile semiconductor storage device A controller repeats an erase operation, an erase verify operation, and a step-up operation. A first storage unit stores a value of an erase start voltage applied first as an erase voltage when a series of erase operations are executed. A second storage unit stores ... | 03/15/2011 |
| 7742354 | Random access memory data resetting method A random access memory data resetting method is provided. The method includes following steps. First, a state machine resetting signal is provided to a RAM. Next, the state machine resetting signal is extended for a predetermined time period. Afterwards, a data rese... | 06/22/2010 |
| 7649794 | Wear leveling method and controller using the same A wear leveling method under limited system resources is provided, the wear levelling method is suitable for a non-volatile memory, the non-volatile memory is substantially divided into a plurality of blocks, and the blocks are at least grouped into a data area, a s... | 01/19/2010 |
| 7606100 | Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells A set of non-volatile storage elements is divided into subsets for erasing in order to avoid over-erasing faster erasing storage elements. The entire set of elements is erased until a first subset of the set of elements is verified as erased. The first subset can in... | 10/20/2009 |
| 7570533 | Completely transportable erasable memory apparatus and method The present invention relates to methods and apparatuses for providing data storage which can be completely erased to prevent access to previously stored data. ... | 08/04/2009 |
| 7532531 | Flash memory device and multi-block erase method In a flash memory device, a multi-block erase operation is performed by applying stepwise increasing erase voltages to selected memory blocks during a first erase period and then applying fixed erase voltages to the selected memory blocks during a second erase perio... | 05/12/2009 |
| 7468926 | Partial erase verify A method for erasing memory cells in a memory array, the method including applying an erase pulse to bits of a cell ensemble of a memory cell array, and performing an erase verification operation only on a subgroup of the cell ensemble being erased to check if the m... | 12/23/2008 |
| 7443746 | Memory array tester information processing system A memory array tester information processing system includes executing a generation block to gather drain currents and gate voltages information for a memory array, utilizing an extraction block to obtain the drain currents and the gate voltages a portion of the mem... | 10/28/2008 |
| 7403430 | Erase operation for use in non-volatile memory A sector erase method for use in a non-volatile memory, such as a FLASH memory, including a plurality of memory cells in rows and columns, the memory cells being divided into a plurality of sectors. The sector erase method includes erasing the memory cells of a firs... | 07/22/2008 |
| 7400537 | Systems for erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells A set of non-volatile storage elements is divided into subsets for erasing in order to avoid over-erasing faster erasing storage elements. The entire set of elements is erased until a first subset of the set of elements is verified as erased. The first subset can in... | 07/15/2008 |
| 7398348 | Method and apparatus for using a one-time or few-time programmable memory with a host device designed for erasable/rewritable memory The embodiments described herein can be used to enable one-time or few-time programmable memories to work with existing consumer electronic devices (such as those that work with flash—an erasable, non-volatile memory) without requiring a firmware upgrade, thereby ... | 07/08/2008 |
| 7394702 | Methods for erasing and programming memory devices A dual-bit memory device includes a first charge storage region spaced apart from a second charge storage region by an isolation region. Techniques for erasing a memory can be provided in which electrons can be injected into the charge storage regions to erase the c... | 07/01/2008 |
| 7392444 | Non-volatile memory evaluating method and non-volatile memory The present method generates a greater number of hot holes than those generated by normal write/erase operations, thereby making it possible to evaluate an operation of a non-volatile memory with respect to hot holes. The present method performs a write operation to... | 06/24/2008 |
| 7376028 | Semiconductor memory device and method for reading semiconductor memory device A semiconductor memory device having a dummy memory cell and a reading method of the same, wherein provision is made of a memory cell 11 connected to a word line WL and a pair of bit lines BL and xBL, a dummy memory cell 12 connected to a word line WL ... | 05/20/2008 |
| 7372754 | Method and apparatus for controlling slope of word line voltage in nonvolatile memory device A nonvolatile memory device includes a nonvolatile memory cell array including a plurality of nonvolatile memory cells connected to a plurality of word lines, a word line voltage generator configured to generate first and second sequences of voltage pulses. The devi... | 05/13/2008 |
| 7372741 | Nonvolatile memory apparatus having a processor and plural memories one or more of which is a nonvolatile memory having circuitry which performs an erase operation and an erase verify operation when the processor specifies the erase operation mode to the nonvolatile memory A nonvolatile memory apparatus which includes plural memories one of which is a nonvolatile memory such as a Flash EEPROM capable of being specified a plurality of operations from a processing unit of the apparatus including an erase operation, the erase operation i... | 05/13/2008 |
| 7370166 | Secure portable storage device In one embodiment of the present invention, a secure storage system includes a removable storage device having a secure storage area for storage of secure data and a public storage area and device port for coupling the removable storage device to a host, the removab... | 05/06/2008 |
| 7366034 | Nonvolatile memory For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as managemen... | 04/29/2008 |
| 7366020 | Flash memory device capable of preventing an overerase of flash memory cells and erase method thereof We describe a NAND flash memory device including a memory cell array formed on a substrate including a plurality of cell strings each including a string selecting transistor, a ground selecting transistor, and plural memory cells serially coupled between the string ... | 04/29/2008 |
| 7362613 | Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinati... | 04/22/2008 |
| 7359230 | Nonvolatile memory device Provided is a nonvolatile memory device including: a storage element; a switching element electrically connected to the storage element; and a plurality of lead wirings electrically connected to the switching element, all of which are arranged on a substrate having ... | 04/15/2008 |
| 7359251 | Non-volatile semiconductor memory device, erase method for same, and test method for same A non-volatile semiconductor memory device includes a memory cell array and an operation control circuit. The memory cell array includes a plurality of non-volatile memory cells that are electrically rewritable. The operation control circuit controls an operation of... | 04/15/2008 |
| 7354273 | Dry erasable board A dry erase board is provided having a body having dry erase characteristics. The body has at least one bent end. A sheet having indicia can be secured between the body and the bent end. A user can then write on the body in correlation to the indicia on the sheet. | 04/08/2008 |
| 7356661 | Control of information reproduction and deletion in a library apparatus An information recording/reproduction apparatus according to one aspect of this invention includes a first recording/reproduction unit configured to execute recording, reproduction, and deletion of information for a built-in first recording medium, a second recordin... | 04/08/2008 |
| 7352620 | Non-volatile semiconductor device and method for automatically recovering erase failure in the device A spare sector is in a blank state beforehand. Each time the erasing is carried out in practical use, the number of erase pulses is counted or the presence/absence of overcurrent flowing when the erase pulse is being applied is monitored. A regular sector having lon... | 04/01/2008 |
| 7352018 | Non-volatile memory cells and methods for fabricating non-volatile memory cells The invention relates to a method for fabricating stacked non-volatile memory cells. Further, the invention relates to stacked non-volatile memory cells. The invention particularly relates to the field of non-volatile NAND memories having non-volatile stacked memory... | 04/01/2008 |
| 7352677 | Probe-base storage apparatus having redundancy cantilevers A header of a nano storing apparatus is disclosed. If some cantilevers of the header are defective, an additional extra cantilever array is substitutively used. The header of a nano storing apparatus including: a cantilevery array including cantilevers each having a... | 04/01/2008 |
| 7341911 | Method of making EEPROM transistor pairs for block alterable memory A block alterable memory cell has a select control gate extending from a floating gate region to a drain region. The block alterable memory cell comprises a substrate layer that further includes a source implant region, a floating gate transistor region, and a drain... | 03/11/2008 |
| 7340581 | Method of writing data to non-volatile memory According to a first aspect of the invention, there is provided a controller connected to a non-volatile memory and including a volatile memory, wherein the controller maintains lists in volatile memory of blocks in the non-volatile memory allocated for storage of l... | 03/04/2008 |
| 7336537 | Handling defective memory blocks of NAND memory devices Apparatus and methods are provided. A NAND memory device has a memory array comprising a plurality of memory blocks and a volatile latch coupled to each of the memory blocks for selectively preventing testing of the respective memory block coupled thereto when that ... | 02/26/2008 |
| 7336542 | Nonvolatile latch A nonvolatile latch includes a memory element for storing an input data value. A write protect element is coupled to the memory element for utilizing a write protect signal to ensure the input data value stored by the memory element remains during a loss of a supply... | 02/26/2008 |
| 7336533 | Electronic device and method for operating a memory circuit An electronic device includes a memory cell that utilizes a bi-directional low impedance, low voltage drop full pass gate to connect a bit cell to a bit write line during a write phase, and during a read phase the full pass gate can remain off and a high input imped... | 02/26/2008 |
| 7333367 | Flash memory devices including multiple dummy cell array regions Methods for erasing an integrated circuit memory device having a cell array region that includes a main cell array region, a first dummy cell array region on a first side of the main cell array region and a second dummy cell array region on a second side of the main... | 02/19/2008 |
| 7333380 | SRAM memory device with flash clear and corresponding flash clear method A static memory device includes at least one memory cell with two cross-coupled CMOS inverters to be connected to first and second voltages. The substrate of the NMOS transistor of a first CMOS inverter is electrically insulated from the substrate of the NMOS transi... | 02/19/2008 |
| 7327624 | Storage device employing a flash memory A semiconductor disk wherein a flash memory into which data is rewritten in block unit is employed as a storage medium, the semiconductor disk including a data memory in which file data are stored, a substitutive memory which substitutes for blocks of errors in the ... | 02/05/2008 |
