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| Number | Title | Issue Date |
| 7742353 | Solid state semiconductor storage device with temperature control function, application system thereof and control element thereof A solid state semiconductor storage device with temperature control function comprises a non-volatile memory unit, a temperature sensing element, and a control unit. The temperature sensing element is used for sensing the operation temperature of the solid state sem... | 06/22/2010 |
| 7646659 | Semiconductor device temperature sensor and semiconductor storage device A semiconductor device temperature sensor produces a reference level for temperature detection from two or more reference levels of different temperatures to detect a temperature. The temperature sensor is applied for detecting the temperature of a semiconductor sto... | 01/12/2010 |
| 7590020 | Semiconductor memory, semiconductor memory system and method of monitoring dynamic temperature thereof A memory hub control block may be configured to decode a command packet received from a host and determine whether the command packet has designated the memory hub. If the command packet does not designate the memory hub control block, the memory hub control block m... | 09/15/2009 |
| 7573769 | Enable signal generator counteracting delay variations for producing a constant sense amplifier enable signal and methods thereof A sense amplifier enable signal generator has two stages. Each stage offsets transistor performance variation in the other stage to produce an enable signal output relatively immune from the effects associated with transistor mismatches. In one embodiment, a memory ... | 08/11/2009 |
| 7548477 | Method and apparatus for adapting circuit components of a memory module to changing operating conditions A method adapts circuit components of a memory module to changing operating conditions within a predefined range. According to one embodiment, a memory module provides a sensor arrangement and a communication bus. Sub-ranges are defined for at least one operating co... | 06/16/2009 |
| 7471584 | Integrated semiconductor memory and method for operating an integrated semiconductor memory An integrated semiconductor memory that has at least one temperature measuring element and repeatedly carries out a temperature measurement during the operation of the semiconductor memory, wherein the semiconductor memory repeats the temperature measurement at inst... | 12/30/2008 |
| 7463542 | Temperature sensing device in an integrated circuit A temperature sensing device can be embedded in a memory circuit in order to sense the temperature of the memory circuit. One oscillator generates a temperature variable signal that increases frequency as the temperature of the oscillator increases and decreases fre... | 12/09/2008 |
| 7450456 | Temperature determination and communication for multiple devices of a memory module The temperature for multiple devices of a memory module are determined. In one example a memory module includes a printed circuit board, a plurality of memory chips on the printed circuit board, each chip containing a plurality of memory cells and a thermal sensor, ... | 11/11/2008 |
| 7447092 | Write driver circuit for controlling a write current applied to a phase change memory based on an ambient temperature A programming method which controls the amount of a write current applied TO Phase-change Random Access Memory (PRAM), and a write driver circuit realizing the programming method. The programming method includes maintaining a ratio of a resistance of the PCM in the ... | 11/04/2008 |
| 7447093 | Method for controlling voltage in non-volatile memory systems Method for controlling voltage in a non-volatile memory system is provided. The method includes selecting a first input value for a voltage generator system operating in one of a plurality of modes, the first input value controlling a temperature dependent component... | 11/04/2008 |
| 7444490 | Apparatus, system, and method for modifying memory voltage and performance based on a measure of memory device stress An apparatus, system, and method are disclosed for modifying memory device timing and voltage. A detection module detects a change of memory device stress. A timing modification module modifies the memory device timing in response to the change of the memory device ... | 10/28/2008 |
| 7443754 | Semiconductor memory device A semiconductor memory device is provided for minutely changing a refresh interval according to a detected temperature and thereby lowering its power consumption. A temperature detector detects a temperature of a chip and outputs the corresponding temperature signal... | 10/28/2008 |
| 7403434 | System for controlling voltage in non-volatile memory systems System for a non-volatile memory system is provided. The non-volatile memory system includes a voltage generator system operating in one of a plurality of modes for generating a voltage applied to a memory cell of the non-volatile memory system. For one of the plura... | 07/22/2008 |
| 7379338 | Method and system for regulating a program voltage value during multilevel memory device programming Regulating a program voltage value during multilevel memory device programming includes utilizing a program path duplicate in an output pump regulator circuit. Further, the output pump regulator circuit is utilized to provide a regulated program voltage for memory c... | 05/27/2008 |
| 7372764 | Logic device with reduced leakage current A logic device operates with reduced leakage current. Controllability is achieved by using a reference voltage to control the amount of leakage reduction. A method of temperature dependent reference voltage generation is given which maintains virtual supply in accep... | 05/13/2008 |
| 7359328 | Apparatus for using a verification probe in an LDP MPLS network An ingress multi-protocol label switching (MPLS) label switched router (LSR) forwards a set of packets associated with a first set of forwarding equivalence classes (FECs) along a label switched path (LSP) to an egress MPLS LSR. Logic in the ingress MPLS LSR produce... | 04/15/2008 |
| 7356426 | Calibration of thermal sensors for semiconductor dies A thermal management system is described which may be implemented on a semiconductor die. The system may include a thermal sensor thermally coupled to the die to sense the temperature of the die and generate an output representing the sensed temperature, and an adju... | 04/08/2008 |
| 7352641 | Dynamic memory throttling for power and thermal limitations In one embodiment, a memory controller is coupled to a memory subsystem and controls accesses to the memory subsystem. In addition, a temperature sensor is positioned to detect a temperature associated with the memory subsystem. In this embodiment, the memory contro... | 04/01/2008 |
| 7339817 | Thermally-assisted switching of magnetic memory elements A magnetic memory element is written to by heating the memory element and applying at least one magnetic field to the memory element. ... | 03/04/2008 |
| 7324380 | Method for trimming the temperature coefficient of a floating gate voltage reference A voltage reference circuit provides a reference voltage that can be precisely programmed. The threshold voltage of a first non-volatile memory (NVM) transistor is programmed while coupled in parallel with a second NVM transistor. During programming, one or more cap... | 01/29/2008 |
| 7324398 | Memory devices configured to detect failure of temperature sensors thereof and methods of operating and testing same A memory device includes a temperature sensor configured to generate a temperature detection signal responsive to a temperature of the memory device and a self-refresh control circuit configured to control a refresh of the memory device responsive to the temperature... | 01/29/2008 |
| 7320049 | Detection circuit for mixed asynchronous and synchronous memory operation A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals, the control signals, and the clock signal and generates a first mode ... | 01/15/2008 |
| 7317605 | Method and apparatus for improving performance margin in logic paths An apparatus and method is disclosed for improving timing margins of logic paths on a semiconductor chip. Typical logic embodiments, such as CMOS (Complementary Metal Oxide Semiconductor), have path delays that become shorter as supply voltage is increased. Embodime... | 01/08/2008 |
| 7315476 | System and method for communicating information to a memory device using a reconfigured device pin System and method for communicating information to and from memory devices. In one embodiment, the invention includes a memory system having a memory device having at least one extraneous device pin, a memory controller configured to control the memory device and a ... | 01/01/2008 |
| 7313565 | Data overlay, self-organized metadata overlay, and associated methods A data overlay is described which is built as a data structure on top of a logical space defined by a distributed hash table (DHT) in a peer-to-peer (P2P) network environment. The data overlay can assume a topology of a tree having a plurality of tree nodes. Each of... | 12/25/2007 |
| 7313044 | Integrated semiconductor memory with temperature-dependent voltage generation An integrated semiconductor memory device includes a temperature sensor circuit to generate a temperature-dependent control signal, a reference circuit to generate a temperature-independent reference signal, a comparator circuit and a voltage generator circuit. The ... | 12/25/2007 |
| 7304905 | Throttling memory in response to an internal temperature of a memory device Systems and methods of managing memory devices provide for reduced power consumption and better thermal management through enhanced memory throttling. In one embodiment a memory unit includes a memory device and a temperature measurement module coupled to the memory... | 12/04/2007 |
| 7304327 | Thyristor circuit and approach for temperature stability Switching operations, such as those used in memory devices, are enhanced using a semiconductor device having a thyristor adapted to switch between conducting and blocking states and operate at low power. According to an example embodiment of the present invention, t... | 12/04/2007 |
| 7292488 | Temperature dependent self-refresh module for a memory device A self-refresh module includes an oscillator configured to provide a first signal having a first frequency, a trimming divider configured to trim the first signal to provide a second signal having a second frequency, and a temperature sensor configured to sense a te... | 11/06/2007 |
| 7272063 | Memory with a temperature sensor, dynamic memory and memory with a clock unit and method of sensing a temperature of a memory Methods and apparatus for determining a temperature of a memory device. A memory device includes a memory array, a temperature configured to measure a temperature of the device and an evaluating circuit configured to receive a signal representative of the temperatur... | 09/18/2007 |
| 7272042 | Semiconductor integrated circuit device A semiconductor integrated circuit device includes a global-bit line, first and second section bit lines, a first transistor which connects the global bit line with the first section bit line, a second transistor which connects the global bit line with the second se... | 09/18/2007 |
| 7260007 | Temperature determination and communication for multiple devices of a memory module Thermal management and communication is described in the context of memory modules that contain several memory devices. In one example, the invention includes determining a temperature of a first memory device, the first memory device containing a plurality of memor... | 08/21/2007 |
| 7248524 | Operating temperature optimization in a ferroelectric or electret memory In a heating and temperature control system for a data storage apparatus comprising at least one matrix-addressable ferroelectric or electret memory device, Joule heating means are provided in the memory device, a temperature determining means is connected with cont... | 07/24/2007 |
| 7236415 | Sample and hold memory sense amplifier A memory sense amplifier includes a sample and hold circuit followed by a differential amplifier. The sample and hold circuit samples a reference voltage on a bit line of a memory circuit when the sense amplifier is reset and a signal voltage on the same bit line wh... | 06/26/2007 |
| 7234087 | External storage device and memory access control method thereof High speed memory access and transparent error detection and correction using a single error correcting means are obtained. A host computer writes sector data in one of the first memory and second memory, and next sector data in the other of the first and second mem... | 06/19/2007 |
| 7227774 | MRAM integrated circuits, MRAM circuits, and systems for testing MRAM integrated circuits An integrated circuit includes operational circuitry; a sensor configured to sense an environmental parameter; and adjustment circuitry coupled to the sensor and to the operational circuitry and configured to affect the operational circuitry to at least partially co... | 06/05/2007 |
| 7209401 | Ring oscillator dynamic adjustments for auto calibration An apparatus compensates for voltage and temperature variations on an integrated circuit with: a voltage sensor having a digital voltage output; a temperature sensor having a digital temperature output; a register coupled to the voltage sensor and the temperature se... | 04/24/2007 |
| 7200060 | Memory driver architecture and associated methods A memory driver architecture and associated methods are generally described. ... | 04/03/2007 |
| 7184349 | Semiconductor memory device A semiconductor memory device is provided for minutely changing a refresh interval according to a detected temperature and thereby lowering its power consumption. A temperature detector detects a temperature of a chip and outputs the corresponding temperature signal... | 02/27/2007 |
| 7184311 | Method and system for regulating a program voltage value during multilevel memory device programming Regulating a program voltage value during multilevel memory device programming includes utilizing a program path duplicate in an output pump regulator circuit. Further, the output pump regulator circuit is utilized to provide a regulated program voltage for memory c... | 02/27/2007 |
