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| Number | Title | Issue Date |
| 4238838 | Core memory wiring arrangement A large, 2 wire, 2-1/2D core memory includes four, 1K (1024) by 1280, core frames with 1280 Y conductors each stringing and inductively coupling a column of 1024 cores in each of the four frames and 4K orthogonal X conductors each stringing and inductivel... | 12/09/1980 |
| 4223394 | Sensing amplifier for floating gate memory devices An MOS sensing amplifier for sensing the binary state of floating gate memory devices in a read-only memory is disclosed. The potentials on the column lines in the memory are held to a narrow voltage swing. A pair of "zero" threshold voltage transistors h... | 09/16/1980 |
| 4179626 | Sense circuit for use in variable threshold transistor memory arrays A memory sense circuit is described incorporating a number of field effect transistors for comparing the threshold voltage of two variable threshold transistors.... | 12/18/1979 |
| 4150441 | Clocked static memory A clocked static memory comprising a memory matrix, sense driver and a logic circuit connected between a pair of data lines in the memory matrix. The memory matrix includes a plurality of static memory cells arranged in rows and columns and are of the typ... | 04/17/1979 |
| 4139911 | High speed sense circuit for semiconductor memories A high speed sensing circuit is described incorporating a number of field effect transistors for sensing, amplifying and storing a signal indicative of the polarity of the difference voltage across two load elements. The load elements may be a pair of var... | 02/13/1979 |
| 4134151 | Single sense line memory cell A static memory cell is provided which can be written into or read from using only a single sense line, as contrasted to all previous systems which use two sense lines.... | 01/09/1979 |
| 4133049 | Memory circuit arrangement utilizing one-transistor-per-bit memory cells A memory circuit arrangement employing one-transistor-per-bit memory cells in which differential sense amplifiers are utilized for detecting the state of the stored bits. First and second digit lines are arranged substantially parallel to and adjacent to ... | 01/02/1979 |
| 4117545 | Memory including dummy cells A memory comprises a plurality of memory cell groups of different memory cell structure, dummy cell groups of different cell structure arranged one for each or several of said memory cell groups, a means for selecting a desired memory cell and a dummy cel... | 09/26/1978 |
| 4075609 | On-chip voltage source for integrated circuits An on-chip reference voltage source is coupled to an on-chip integrated circuit such as a memory cell. The reference voltage is compared against internal signals generated by the on-chip integrated circuit in order to develop an output voltage representin... | 02/21/1978 |
| 4072932 | Clock generator for semiconductor memory Disclosed is a read clock generator for use in a semiconductor memory. The read clock generator is comprised of a bistable amplifier and a differential voltage sensor. The bistable amplifier is activated during a read cycle; and it simulates the transient... | 02/07/1978 |
| 4050030 | Offset adjustment circuit An offset adjustment circuit for a differential amplifier includes a current source connected in series with a resistor for establishing a biasing voltage for a pair of field effect transistors (FET) having variable resistors in their biasing circuits. Th... | 09/20/1977 |
| 3983412 | Differential sense amplifier An amplifier for sensing two signals at differing voltages which has a translated differential output at standard MOS digital signal levels. The amplifier is particularly well suited for sensing the logic state of a plurality of binary static electronic m... | 09/28/1976 |
| 3969706 | Dynamic random access memory misfet integrated circuit A MISFET dynamic random access memory chip having 4,096 single transistor, single capacitor storage cells yet packaged in a standard sixteen pin dual inline package is disclosed. Six bit row address and six bit column address data are sequentially multipl... | 07/13/1976 |
| 3934234 | Photodichroic readout device using circularly polarized light A unique photodichroic readout device composed of photodichroic material u which is passed a circularly polarized light beam that is horizontally or vertically polarized dependent upon the storage of information in the material. The beam is then passed t... | 01/20/1976 |
