Did You Know...
...that the Eveready Battery began as an invention called the "electric flowerpot," which was a tube with a battery and light bulb inside? The idea was to fasten this gizmo to the side of a flowerpot so it would illuminate the flowers from the bottom. The idea died on the vine and the businessman who licensed the flower pot, Conrad Huber, was left with a pile of useless tubes -- until he found a way to market them as batteries to light the world!
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| Number | Title | Issue Date |
| 8189414 | Maintenance of amplified signals using high-voltage-threshold transistors Systems, apparatus, memory devices, sense amplifiers and methods are provided, such as a system that includes an input node, a first transistor having a gate that couples to the input node, and a second transistor having another gate that couples to the input node. ... | 05/29/2012 |
| 8120979 | Semiconductor memory devices having hierarchical bit-line structures The semiconductor memory device includes a memory cell array and a switching circuit. The memory cell array includes a plurality of first memory cells connected between word lines and first local bit lines, and a plurality of second memory cells connected between th... | 02/21/2012 |
| 8116157 | Integrated circuit An integrated circuit is disclosed. One embodiment provides a sense amplifier; a first bit line; a second bit line. A first switch is configured to connect/disconnect the first bit line to/from the sense amplifier. A second switch is configured to connect/disconnect... | 02/14/2012 |
| 8111569 | Latch structure and bit line sense amplifier structure including the same A latch structure includes a first inverter that includes a first PMOS transistor and a first NMOS transistor, and a second inverter that includes a second PMOS transistor and a second NMOS transistor, receives an output signal of the first inverter, and outputs an ... | 02/07/2012 |
| 8111570 | Devices and methods for a threshold voltage difference compensated sense amplifier Embodiments are described for a voltage compensated sense amplifier. One such sense amplifier includes a pair of digit line nodes respectively coupled to a pair of transistors. A first pair of switches are adapted to cross-couple the gates of the transistors to the ... | 02/07/2012 |
| 8085606 | Input-output line sense amplifier having adjustable output drive capability An input-output line sense amplifier configured to drive input data signals over an input-output signal line to an output driver circuit, the input-output line sense amplifier having an output driver stage having a plurality of different programmable output drive ca... | 12/27/2011 |
| 8068374 | Current mode memory apparatus, systems, and methods Some embodiments include a first circuit to drive signals at first circuit output nodes, and a second circuit to generate output signals at second circuit output nodes. The second circuit includes a first transistor coupled between a supply node and a first node of ... | 11/29/2011 |
| 8054705 | Semiconductor integrated circuit A semiconductor integrated circuit has K (K is a natural number of 2 or more) number of memory cells coupled to a same word line, and multiple sense amplifier circuits coupled to the memory cells. The multiple sense amplifier circuits are divided into N (N is a natu... | 11/08/2011 |
| 8050125 | Bit line sense amplifier of semiconductor memory device having open bit line structure In an embodiment, a bit line sense amplifier of a semiconductor memory device with an open bit line structure includes sense amplifier blocks, first voltage drivers, and a second voltage driver. The sense amplifier blocks include a first sense amplifier and a second... | 11/01/2011 |
| 8036057 | Semiconductor memory device and control method thereof A semiconductor memory device (and control method therefor) includes a plurality of word lines, a plurality of bit lines, a plurality of memory cells arranged at intersections of the word lines and the bit lines, a word driver that selects any one of the word lines,... | 10/11/2011 |
| 8031546 | Semiconductor device In a semiconductor device having a data input buffer capable of inputting write data to each of memory units, the data input buffer is changed from an inactive state to an active state after the reception of instruction for a write operation effected on the memory u... | 10/04/2011 |
| 8014220 | Current mode data sensing and propagation using voltage amplifier A method and a circuit for current mode data sensing and propagation by using voltage amplifier are provided. Example embodiments may include providing an output signal from a voltage amplifier in response to the voltage amplifier receiving an input signal. The meth... | 09/06/2011 |
| 7986578 | Low voltage sense amplifier and sensing method Systems and methods of sensing a data state coupled to a digit line and for coupling a digit line to a sense amplifier. In sensing the data state coupled to the digit line, the digit line is coupled to a sense node and driving voltages provided to the sense amplifie... | 07/26/2011 |
| 7965566 | Circuit and method for controlling local data line in semiconductor memory device The present invention relates to a semiconductor memory device, and more particularly, to a circuit and method for controlling local data lines, which can reduce loading on local data lines LIO. The circuit and method for controlling local data lines in accordance w... | 06/21/2011 |
| 7952947 | Sense amplifier for controlling flip error and driving method thereof A sense amplifier and a driving method is described for resolving a flip failure occurrence where the voltage applied across the bit line is within an acceptable threshold range when the data is delivered to the data bus. The driving method includes disconnecting a ... | 05/31/2011 |
| 7936625 | Pipeline sensing using voltage storage elements to read non-volatile memory cells Various embodiments are generally directed to a method and apparatus for carrying out a pipeline sensing operation. In some embodiments, a read voltage from a first memory cell is stored in a voltage storage element (VSE) and compared to a reference voltage to ident... | 05/03/2011 |
| 7924642 | Sense amp circuit, and semiconductor memory device using the same A differential input circuit receives differential input signals at a pair of differential input terminals and produces a pair of first differential output signals. A sensing circuit senses at least one of the pair of first differential output signals reaching a cer... | 04/12/2011 |
| 7920435 | Semiconductor memory device A semiconductor memory device comprises a plurality of memory cells connected to a bit line, and a sense amplifier of the current sense type. The sense amplifier includes an initial charging circuit capable of initially charging the bit line with a suppressed value ... | 04/05/2011 |
| 7920436 | Sense amplifier A sense amplifier includes a first cascode transistor, a second cascode transistor, a first feedback circuit, a second feedback circuit, and a comparator. The drain of the first cascode transistor is connected directly to a first voltage source. The gate of the firs... | 04/05/2011 |
| 7885130 | Semiconductor integrated circuit A semiconductor integrated circuit according to an exemplary embodiment of the present invention includes a plurality of memory cells connected to one word line; a plurality of sense amplifier circuits that are connected to the memory cells and divided into an N num... | 02/08/2011 |
| 7881130 | Semiconductor memory device having write data through function A semiconductor memory device includes a switch that turns on or off connection between a write data line pair which is an output of a write buffer and read data line pair. For a Write Data Through function, the switch is turned on in response to an activated one-sh... | 02/01/2011 |
| 7876635 | Sense amplifier driving control circuit and method A sense amplifier driving control circuit has a stable discharge characteristic by differently controlling the discharge of a node having a driving voltage according to the change of an organization of a semiconductor memory device. The sense amplifier driving contr... | 01/25/2011 |
| 7876634 | Apparatus and method for adjusting a supply voltage based on a read result A data processing system comprising a memory array having a plurality of memory cells and read circuitry for reading a logic value stored in one of the plurality of memory cells. The read circuitry is operable perform two substantially simultaneous reads of the stor... | 01/25/2011 |
| 7869293 | Memory sense scan circuit and test interface A scannable IO circuit featuring reduced latch count for pipelined memory architectures and test methodology. For a pipelined memory system performing at speed tests, the timing sequence for processing a test command includes a precharge-read-precharge-write sequenc... | 01/11/2011 |
| 7826293 | Devices and methods for a threshold voltage difference compensated sense amplifier A voltage compensated sense amplifier includes a pair of digit line nodes respectively coupled to a pair of transistors. A first pair of switches are adapted to cross-couple the gates of the transistors to the respective digit line node and a second pair of switches... | 11/02/2010 |
| 7821856 | Memory device having an evaluation circuit A memory device comprising a memory cell and an evaluation circuit, the memory cell being coupled with the evaluation circuit via a bit line. The memory device further comprises a reference line coupled with the evaluation circuit, the evaluation circuit being desig... | 10/26/2010 |
| 7821857 | Input/output line sense amplifier and semiconductor memory device using the same An input/output (I/O) line sense amplifier includes a buffer unit, a sense amplifier, and a precharge unit. The buffer unit is driven by a first level voltage to buffer a strobe signal, and the sense amplifier is driven by a second level voltage to amplify a signal ... | 10/26/2010 |
| 7813200 | Sense amplifier control circuit for semiconductor memory device and method for controlling sense amplifier control circuit A sense amplifier control circuit for a memory device is provided. The sense amplifier control circuit for a memory device including: a level detection unit configured to generate a level detection signal by detecting a core voltage level in an active operation inte... | 10/12/2010 |
| 7813199 | Current mode data sensing and propagation using voltage amplifier A method and a circuit for current mode data sensing and propagation by using voltage amplifier are provided. Example embodiments may include providing an output signal from a voltage amplifier in response to the voltage amplifier receiving an input signal. The meth... | 10/12/2010 |
| 7813197 | Write circuit of memory device A write circuit of a semiconductor memory device includes a global data input/output (I/O) line; an amplifying block for receiving and amplifying write data and transmitting the amplified write data as global data onto the global data I/O line; and a control block f... | 10/12/2010 |
| 7813198 | System and method for reading memory One embodiment of the invention includes a memory system. The system comprises a memory cell coupled to a bit-line node. The memory cell can be configured to generate a bit-line current on the bit-line node in response to a bias voltage during a read operation. The ... | 10/12/2010 |
| 7808854 | Systems and methods for data transfers between memory cells Systems and methods for reducing the latency of data transfers between memory cells by enabling data to be transferred directly between sense amplifiers in the memory system. In one embodiment, a memory system uses a conventional DRAM memory structure having a pair ... | 10/05/2010 |
| 7808853 | Semiconductor memory device and method with a changeable substrate potential A semiconductor memory device and method with a changeable substrate potential. One embodiment provides for operating a semiconductor memory device having at least one read or write/sense amplifier. The method includes changing the substrate potential of the read or... | 10/05/2010 |
| 7782694 | Integrated circuit device and electronic instrument An integrated circuit device includes a display memory and a data read control circuit. The data read control circuit controls data reading so that data of pixels corresponding to a plurality of signal lines is read out by N-time reading in one horizontal scan perio... | 08/24/2010 |
| 7782695 | Compensated current offset in a sensing circuit A sensing circuit with current offset functionality. In one embodiment, the sensing circuit includes a memory circuit having a first offset circuit operative to offset a first current. The sensing circuit also includes a reference circuit coupled to the memory circu... | 08/24/2010 |
| 7782696 | Semiconductor storage device The semiconductor storage device according to the present invention comprises a switch provided to a bit line between a memory cells and a sense amplifier and capable of continuously varying a degree of conduction; and a switch control circuit for varying the degree... | 08/24/2010 |
| 7751268 | Sense amplifier power supply circuit A sense amplifier power supply circuit includes an overdriving unit configured to apply a first voltage to a sense amplifier in response to a first enable signal, a sense amplifier driving unit configured to apply a second voltage to the sense amplifier in response ... | 07/06/2010 |
| 7746716 | Memory having a dummy bitline for timing control A memory having at least one memory array block, the at least one memory array block comprising N wordlines, wherein N is greater than one, is provided. The memory comprises a plurality of sense amplifiers coupled to the at least one memory array block. The memory f... | 06/29/2010 |
| 7746713 | High density 45 nm SRAM using small-signal non-strobed regenerative sensing A memory device includes a plurality of cells comprising CMOS structures. A non-strobed regenerative sense-amplifier (NSR-SA) is coupled to the cells and employs offset compensation and avoids strobe timing uncertainty to increase read-access speeds. ... | 06/29/2010 |
| 7746722 | Metal programmable self-timed memories A self-timed memory array is disclosed, in which segmentability and metal-programmability are supported while minimizing layout space. Self-timing row decoder circuits are placed at the top and bottom of the array adjacent to respective I/O blocks. A self-timing sig... | 06/29/2010 |
