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3M employee and church chorister Art Fry needed something to temporarily mark pages in his hymnal. He was in luck because his colleague, Spencer Silver, accidentally developed a glue that was too weak for other purposes. After initially discouraging consumer response, Post-it Notes became a hit in 1979.
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| Number | Title | Issue Date |
| 8189407 | Apparatus, system, and method for biasing data in a solid-state storage device An apparatus, system, and method are disclosed for improving performance in a non-volatile solid-state storage device. Non-volatile solid-state storage media includes a plurality of storage cells. The plurality of storage cells is configured such that storage cells ... | 05/29/2012 |
| 8189406 | Device and method generating internal voltage in semiconductor memory device A semiconductor memory device and a method of generating an internal voltage in the semiconductor memory device are provided. The semiconductor memory device includes a controller configured to activate a sensing enable signal when an active command is applied from ... | 05/29/2012 |
| 8189405 | Data readout circuit and semiconductor memory device A data readout circuit including a 1st PMOS transistor operating in saturation and including a source connected to a power supply, a drain connected to an input terminal a memory cell, and a gate connected to a 1st bias voltage; a 2nd PMOS transistor including a sou... | 05/29/2012 |
| 8184488 | Systems and methods for controlling integrated circuit operation with below ground pin voltage Systems and methods for controlling operation of an integrated circuit by applying below ground voltage to one or more pins of the integrated circuit, and in which the application of a below ground pin voltage may be employed as an initiator of (or condition for) a ... | 05/22/2012 |
| 8184490 | Self-calibration method of a reading circuit of a nonvolatile memory A self-calibration circuit of a nonvolatile memory includes a trimming data storage module, a sense amplifier module, a logic judgment module, and a scanning module. The nonvolatile memory circuit includes a memory cell array and the self-calibration circuit of the ... | 05/22/2012 |
| 8179728 | Interleaving charge pumps for programmable memories Systems and methods, including computer software for performing operations enable interleaving of charging operations in a charging pump. A first charge pump is charged to a predetermined level, and a first operation is performed using a charge stored in the first c... | 05/15/2012 |
| 8179729 | Memory circuit and voltage detection circuit including the same Provided are a memory circuit having a small circuit scale and a voltage detection circuit including the memory circuit. An NMOS transistor (21) is in an off state during loading and writing and is in an on state during reading. An NMOS transistor (22)... | 05/15/2012 |
| 8179730 | Semiconductor device and semiconductor memory tester A semiconductor device, a semiconductor memory tester, and a multi-chip package are provided. The semiconductor device includes a plurality of nonvolatile semiconductor memories; a boosting circuit which generates a boosted voltage for operating the plurality of non... | 05/15/2012 |
| 8174909 | Nonvolatile semiconductor memory and method for testing the same A nonvolatile semiconductor memory, includes a nonvolatile memory array, a voltage generator circuit that generates a drive voltage which changes depending on a supply voltage and a code, a control circuit that applies the generated drive voltage to the nonvolatile ... | 05/08/2012 |
| 8159885 | Refresh control circuit and semiconductor memory device and memory system including the same A semiconductor memory device includes a refresh control circuit and a memory cell array. The refresh control circuit generates an internal auto refresh control signal based on a chip select signal and an external self refresh control signal. The memory cell array i... | 04/17/2012 |
| 8144526 | Method to improve the write speed for memory products A method and circuit are given, to realize a Bit-Line Sense Amplifier with Data-Line Bit Switch (BS) pass transistors for Random Access Memory (RAM) products as Integrated Circuit (IC) fabricated in CMOS technology with optimized operating characteristics of said RA... | 03/27/2012 |
| 8139424 | Semiconductor apparatus A semiconductor apparatus includes a first internal voltage generator generating a first internal voltage in response to an external power supply voltage, a second internal voltage generator generating a second internal voltage in response to the external power supp... | 03/20/2012 |
| 8139425 | Voltage regulation method and memory applying thereof A voltage regulating method applied to a memory to regulate a word line voltage corresponding to a set of memory cells of the memory includes the following steps. Firstly, a first value, which is for indicating an amount of data having a specific data value in a set... | 03/20/2012 |
| 8130565 | Semiconductor device A semiconductor device includes internal voltage generating circuits, a switching circuit, load circuits, a control circuit. Each of the plurality of load circuits is supplied with voltage through the switching circuit from any one of the plurality of internal volta... | 03/06/2012 |
| 8125839 | Memory device and method reducing fluctuation of read voltage generated during read while write operation According to example embodiments, a semiconductor memory device may include a write voltage generator configured to generate a write voltage to perform the write operation to at least one of a plurality of banks where the write voltage generator generates the write ... | 02/28/2012 |
| 8125840 | Reference level generation with offset compensation for sense amplifier An approach that provides reference level generation with offset compensation for a sense amplifier is described. In one embodiment, an arbitrary reference level is generated to provide an offset that compensates for device mismatch and voltage threshold of a sense ... | 02/28/2012 |
| 8116146 | Semiconductor device and method for driving the same A semiconductor device includes an overdriving control circuit configured to generate a first drive signal and a second drive signal in response to an internal signal of an active command mode, an equalizing signal generating unit configured to generate an equalizin... | 02/14/2012 |
| 8111560 | Semiconductor memory device A semiconductor memory device includes a first sense amplifier which senses data on a first line pair and generates a first output signal; and a test unit which senses the data on a first line pair and transfers a second output signal to a second line in response to... | 02/07/2012 |
| 8111561 | Bulk bias voltage generating device and semiconductor memory apparatus including the same A bulk bias voltage generating device is configured to generate a first bulk bias voltage in a deep power down mode and a second bulk bias voltage in a normal mode. The first bulk bias voltage comprises an internal voltage level, and the second bulk bias voltage com... | 02/07/2012 |
| 8094505 | Method and system to lower the minimum operating voltage of a memory array A method and system to lower the minimum operating voltage of a memory array during read and/or write operations of the memory array. In one embodiment of the invention, the voltage of the read and/or write word line of the memory array is boosted or increased durin... | 01/10/2012 |
| 8081524 | Combo-type semiconductor integrated circuit supplied with a plurality of external voltages A combo semiconductor memory apparatus capable of reducing current and power consumption is provided. The semiconductor memory apparatus includes: a signal generator that generates a voltage control signal according to the level of an external voltage; and a voltage... | 12/20/2011 |
| 8081523 | Circuit with a memory array and a reference level generator circuit A circuit comprises an array of memory cells (10). A plurality of sensing circuits (20), are coupled to the output (14) of respective memory cells (10), for comparing the output signal of the respective one of the memory cells (10)... | 12/20/2011 |
| 8077528 | Low couple effect bit-line voltage generator A bit-line voltage generator is provided. The bit-line voltage generator includes a discharge enhanced bias source and a switch unit. The switch unit includes a clamp transistor having a source, a gate connected to the discharge enhanced bias source, and a drain rec... | 12/13/2011 |
| 8077527 | SRAM leakage reduction circuit A method and system are provided for maintaining a virtual ground node of an SRAM memory array at a minimum level sufficient for maintaining data retention. A circuit can maintain the virtual ground node at a virtual ground reference voltage of VDD−(1.5... | 12/13/2011 |
| 8064274 | Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same A method of generating a voltage as well as an integrated circuit device (e.g., a logic device or a memory device) having a memory cell array which includes (i) a plurality of memory cells, wherein each memory cell array including (i) a plurality of memory cells, ar... | 11/22/2011 |
| 8059475 | Reference voltage regulator for eDRAM with VSS-sensing A reference voltage regulator for an embedded dynamic random access memory (eDRAM) employing VSS-sensing with a reference level includes an oscillator, a control block, a reference generator, a comparator, a pulse generator, a driver, and a reference voltage output,... | 11/15/2011 |
| 8054694 | Voltage generator for memory array A high voltage may be generated for programming memory cells in a memory array. A middle voltage may also be generated for reading memory cells in the memory array. Control logic and switches may be used to select between the high voltage and the middle voltage. A f... | 11/08/2011 |
| 8054695 | Semiconductor memory apparatus A reference voltage selecting unit selectively outputs a first external reference voltage and a second external reference voltage as a selection reference voltage in accordance with whether to perform a wafer test. An address buffer generates an internal address by ... | 11/08/2011 |
| 8054698 | Device for programming a PCM cell with discharge of capacitance and method for programming a PCM cell A device for programming PCM cells includes a pulse-generator circuit for supplying programming current pulses. The pulse-generator circuit includes: at least one first capacitive element; a charging circuit, connectable to the first capacitive element in a first op... | 11/08/2011 |
| 8050113 | Core voltage discharger and semiconductor memory device with the same A core voltage discharger is capable of adjusting an amount of a current discharged according to temperature. The discharger for decreasing a level of a predetermined voltage receives temperature information from an on die thermal sensor and discharges a different a... | 11/01/2011 |
| 8050112 | Internal voltage generation circuit An internal voltage generation circuit includes a temperature detection unit which detects an internal temperature of a semiconductor memory device and generates a temperature signal, a driving control signal generation unit which receives the temperature signal and... | 11/01/2011 |
| 8040742 | Semiconductor device having variable parameter selection based on temperature and test method A semiconductor device that may include temperature sensing circuits is disclosed. The temperature sensing circuits may be used to control various parameters, such as internal regulated supply voltages, internal refresh frequency, or a word line low voltage. In this... | 10/18/2011 |
| 8040741 | Semiconductor integrated circuit A semiconductor integrated circuit includes a boost circuit configured to boost a power supply voltage so as to generate first and second voltages, the second voltage being lower than the first voltage, a load circuit supplied with the first voltage, and a capacitor... | 10/18/2011 |
| 8036047 | Circuit and method for generating pumping voltage in semiconductor memory apparatus and semiconductor memory apparatus using the same A circuit for generating a pumping voltage in a semiconductor memory apparatus includes a control signal generation block configured to generate a first control signal obtained by level-shifting a voltage level of a test signal to a first driving voltage level, a vo... | 10/11/2011 |
| 8027207 | Leakage compensated reference voltage generation system An e-fuse sense circuit employs a single ended sense scheme in which the reference voltage is compensated for leakage. A reference voltage generator includes a pull-up resistor of similar value to the selected bitline pull-up resistor. As the sensing trip point is a... | 09/27/2011 |
| 8027208 | Flash memory device and programming method thereof The flash memory device includes a memory cell array having a plurality of memory cells, a high voltage generator configured to generate a plurality of pass voltages, with a first pass voltage of the plurality of pass voltages supplied to the memory cell array durin... | 09/27/2011 |
| 8014216 | Devices, systems, and methods for a power generator system Methods, devices, and systems are provided for a power generator system. The power generator system may include at least one control device including control logic. The at least one control device may be configured to receive at least one control signal and output a... | 09/06/2011 |
| 8009488 | Semiconductor memory device A semiconductor memory device includes a plurality of memory cell array blocks connected to word lines, source lines, and bit lines, each memory cell array including memory cells each having a transistor with a floating body, a reference voltage generator configured... | 08/30/2011 |
| 8000154 | Non-volatile memory device and method of controlling a bulk voltage thereof A non-volatile memory device comprises a voltage supplier comprising memory cells in which the voltage supplier supplies a positive set voltage to a bulk of a memory cell array at the time of a read operation of the memory cells and a controller for controlling the ... | 08/16/2011 |
| 7990778 | Nonvolatile semiconductor memory and method for testing the same A nonvolatile semiconductor memory includes a nonvolatile memory array, a voltage generator circuit that generates a drive voltage which changes depending on a supply voltage and a trimming code, a control circuit that applies the generated drive voltage to the nonv... | 08/02/2011 |
