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| Number | Title | Issue Date |
| 8189389 | Nonvolatile semiconductor memory device with a voltage setting circuit for a step-up shift test A memory cell array has a first and a second storage area. The first storage area has a memory elements selected by an address signal. The second storage area has a memory elements selected by a control signal. A control circuit has a fuse element. When the fuse ele... | 05/29/2012 |
| 8189386 | Non-volatile memory device and associated programming method using error checking and correction (ECC) A programming method for a non-volatile memory device includes performing a programming operation to program memory cells, when the programmed memory cells are determined to include memory cells that failed to be programmed and when a current program loop is a maxim... | 05/29/2012 |
| 8189388 | Fuse circuit and flash memory device having the same A flash memory device includes a main cell array configured to have main memory cells for storing data and a redundancy cell array configured to have redundancy memory cells for repairing a failed memory cell of the main cell array. A page buffer circuit is configur... | 05/29/2012 |
| 8189387 | Flash memory with multi-bit read A memory device is described that comprises determining which read data state of more than 2X read data states a memory cell is in after the memory cell has been programmed to one of 2X program data states, wherein the determined read data stat... | 05/29/2012 |
| 8174887 | Adjusting for charge loss in a memory Memory and methods of operating a memory adjusting an output voltage of an analog storage device, such as a data cache capacitor holding a voltage level representative of data, in response to an estimated charge loss are useful for compensating for the effects of ch... | 05/08/2012 |
| 8169825 | Reliable data storage in analog memory cells subjected to long retention periods A method for data storage in a non-volatile memory includes storing data in the non-volatile memory using a first storage configuration while the non-volatile memory is supplied with electrical power. After storing the data, an indication is accepted, indicating tha... | 05/01/2012 |
| 8164953 | Memory and boundary searching method thereof A memory and an operating method thereof are provided therein. When searching a boundary of a threshold voltage distribution of the memory, data errors resulted from tail bits of the memory would be corrected. Therefore, a sensing window could be broader, and the bo... | 04/24/2012 |
| 8154925 | Semiconductor memory device and system capable of executing an interleave programming for a plurality of memory chips and a 2-plane programming at the respective memory chips A semiconductor memory device includes first and second memory chips and a control logic configured to execute an interleave program between the first and second memory chips. The control logic receives write data to be written into first and second memory blocks of... | 04/10/2012 |
| 8139428 | Method for reading and writing a block interleaver and the reading circuit thereof A method for writing a memory of a block interleaver determines in a bit-wise manner whether to write data into the memory. A method for reading a memory of a block interleaver combines two adjacent columns of the memory into a temporary column and reads data from t... | 03/20/2012 |
| 8139412 | Systematic error correction for multi-level flash memory In accordance with exemplary embodiments, a multi-level flash memory employs error correction of systematic errors when reading multi-level flash memory. Error correction includes i) detection of each systematic error, ii) feedback of the systematic error to circuit... | 03/20/2012 |
| 8130549 | Apparatus and method for detecting over-programming condition in multistate memory device A system embodiment comprises a nonvolatile memory device, a memory, and a controller. The nonvolatile memory device includes a plurality of nonvolatile memory cells. Each nonvolatile memory cell is adapted to store at least two bits. The memory is adapted to store ... | 03/06/2012 |
| 8125827 | Flash memory systems and operating methods using adaptive read voltage levels Some embodiments of the present invention provide methods of operating nonvolatile memory devices. Reference data is stored in a plurality of memory cells. The reference data is read, and a threshold voltage distribution of the plurality of memory cells is determine... | 02/28/2012 |
| 8120957 | Nonvolatile semiconductor storage device, nonvolatile semiconductor storage system and method of managing of defective column in nonvolatile semiconductor storage system A nonvolatile semiconductor storage device is disclosed, which includes a memory cell array in which nonvolatile memory cells are arranged, a first data holding circuit which temporarily holds a collective processing unit of read or write data to be simultaneously r... | 02/21/2012 |
| 8116134 | Semiconductor memory device with improved ECC efficiency Memory cells store k bits of data (k is a natural number not less than 2) into a single cell. A number n of data storage circuits store externally supplied k bits of data to write data into the memory cells. A control circuit inputs the data on a first page, a secon... | 02/14/2012 |
| 8085592 | Charge-trap flash memory device with reduced erasure stress and related programming and erasing methods thereof Operation methods of charge-trap flash memory devices having an unused memory cell for data storage and a normal memory cell used for data storage are discussed. The operation method may include selecting the unused memory cell, and programming the unused memory cel... | 12/27/2011 |
| 8085591 | Charge loss compensation during programming of a memory device In programming a selected word line of memory cells, a first program verify or read operation is performed, after one page of a selected word line is programmed, in order to determine a first quantity of memory cells that have been programmed to a predetermined refe... | 12/27/2011 |
| 8081511 | Flash memory device with redundant columns Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of columns. Each of the columns includes a bit line and a plurality of memory cells on the bit line. The plurality of... | 12/20/2011 |
| 8077516 | Method and apparatus for accessing memory with read error by changing comparison In response to a disagreement between a previously generated check code associated with previously programmed data bits and a more recently generated check code generated in response to a read command, the comparison process is changed, between i) a value representi... | 12/13/2011 |
| 8077515 | Methods, devices, and systems for dealing with threshold voltage change in memory devices The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control circuitry having sense circuitry coupled to the array. The control circuit... | 12/13/2011 |
| 8072808 | Nonvolatile semiconductor memory device A memory cell array including at least one memory cell, an address storage section containing address information, an address judging circuit for judging whether an input address matches the address information in the address storage section and outputting a result ... | 12/06/2011 |
| 8064258 | Method apparatus, and system providing adjustable memory page configuration A method, apparatus and system providing a memory device having an array of cells which may be selectively designated for either error correction code use or redundancy cell use. ... | 11/22/2011 |
| 8059460 | Method of programming nonvolatile memory device A method of programming a nonvolatile memory device includes an inputting step for inputting program data to a first latch of each of page buffers, and inputting redundancy data to a second latch of each of the page buffers, a verification result storage step for pe... | 11/15/2011 |
| 8050093 | Non-volatile memory device and bad block remapping method A non-volatile memory device and a bad block remapping method use some of main blocks as remapping blocks to replace a bad block in a main cell block and selects remapping blocks using existing block address signals. Thus, separate bussing of remapping block address... | 11/01/2011 |
| 8045381 | Device for protecting a memory against attacks by error injection A memory is secured against an error injection during the reading of a datum. The memory includes: means for reading a reference datum in the memory during a phase of reading a datum stored in the memory; means for comparing the reference datum read with an expected... | 10/25/2011 |
| 8040727 | Flash EEprom system with overhead data stored in user data sectors A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Sele... | 10/18/2011 |
| 8036034 | Semiconductor storage device equipped with a sense amplifier for reading data and threshold-voltage-information data A semiconductor storage device comprises: a sense amplifier circuit; a first data retaining circuit and a second data retaining circuit configured to retain data and threshold voltage information, the second data retaining circuit output the data and the threshold v... | 10/11/2011 |
| 8009474 | Semiconductor storage device and read voltage correction method A semiconductor memory device comprises a semiconductor memory, a corrected voltage storage circuit which stores a corrected voltage produced by correcting a read voltage of the semiconductor memory, and a memory controller which reads the corrected voltage from the... | 08/30/2011 |
| 8000142 | Semi-volatile NAND flash memory Semi-volatile NAND flash memory systems, apparatuses, and methods for use are described herein. According to various embodiments, a semi-volatile NAND flash memory may be partitioned into various retention regions. Other embodiments may be described and claimed.... | 08/16/2011 |
| 8000143 | Nonvolatile memory device including circuit formed of thin film transistors A transistor is arranged for electrically isolating a sense amplifier formed of a thin film transistor from a data line electrically coupled to the sense amplifier. When a write driver drives the data line, a control signal is applied to isolate the data line from t... | 08/16/2011 |
| 8000141 | Compensation for voltage drifts in analog memory cells A method for data storage includes storing data in a group of analog memory cells by writing respective first storage values into the memory cells. After storing the data, respective second storage values are read from the memory cells. A subset of the memory cells,... | 08/16/2011 |
| 7990768 | Setting memory controller driver to memory device termination value in a communication bus A method and system are provided for coupling a DRAM and a memory controller during driver training to reduce mismatches by controlling impedances within the system environment. A memory device initializes a bit level voltage on a data net. A driver impedance in a d... | 08/02/2011 |
| 7983082 | Apparatus and method of multi-bit programming A multi-bit programming apparatus may include a first control unit that may generates 2N threshold voltage states based on a target bit error rate (BER) of each of the page programming operations, a second control unit that may assign any one of the thres... | 07/19/2011 |
| 7974125 | Flash memory device and method of controlling flash memory device A flash memory device includes multiple memory blocks, a decoder configured to select at least one of the memory blocks in response to block select signals, a controller configured to generate the block select signals in response to a block address and to generate a... | 07/05/2011 |
| 7965552 | Non-volatile semiconductor memory device A non-volatile semiconductor memory device includes: a memory cell array; a bad block position data register area defined in the memory cell array to store bad block position data; an address decoder circuit configured to select a block in the cell array; and bad bl... | 06/21/2011 |
| 7965553 | Method of verifying a program operation in a non-volatile memory device A method of verifying a program operation in a non-volatile memory device includes performing a program operation, verifying whether or not each of a plurality of program target memory cells is programmed to a voltage higher than a verifying voltage, counting a numb... | 06/21/2011 |
| 7957189 | Drift compensation in a flash memory A plurality of memory cells are managed by obtaining values of one or more environmental parameters of the cells and adjusting values of one or more reference voltages of the cells accordingly. Alternatively, a statistic of at least some of the cells, relative to a ... | 06/07/2011 |
| 7944746 | Room temperature drift suppression via soft program after erase Providing for suppression of room temperature electronic drift in a flash memory cell is provided herein. For example, a soft program pulse can be applied to the flash memory cell immediately after an erase pulse. The soft program pulse can help to mitigate dipole e... | 05/17/2011 |
| 7944747 | Flash memory device and method for programming flash memory device having leakage bit lines Provided is a method for programming a flash memory device. The method includes receiving writing data, detecting leakage bit lines of the flash memory device, and updating the received writing data in order for data corresponding to the leakage bit lines to be modi... | 05/17/2011 |
| 7936606 | Compensation of back pattern effect in a memory device In one or more of provided embodiments, a read operation is compensated for back pattern effect. A bit line current is generated by a read operation that biases the word lines. As part of a back pattern effect measurement phase, at predetermined time intervals an in... | 05/03/2011 |
| 7929346 | Memory data detecting apparatus and method for controlling reference voltage based on error in stored data Example embodiments may relate to a method and an apparatus for reading data stored in a memory, for example, providing a method and an apparatus for controlling a reference voltage based on an error of the stored data. Example embodiments may provide a memory data ... | 04/19/2011 |
