Class 365/185.03 - Multiple values (e.g., analog)

Subclass of Class 365 - Static information storage and retrieval
Definition: Subject matter under 185.01 wherein the floating gate device
No. of patents: 1984
Last issue date: 05/29/2012

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Number	Title	Issue Date
8189383	Page buffer of non-volatile memory device and programming method of non-volatile memory device Multi-level cell programming methods are provided. A method includes providing a page buffer including first and second registers connected to first and second memory cell blocks, respectively. A least significant bit (LSB) program of each memory cell is completed. ...	05/29/2012
8189382	Read method for MLC Memory devices adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data transfer rates relative to devices processing and generating only binary data signals indicative of indiv...	05/29/2012
8189381	System and method for reading flash memory cells A memory system includes an array of X memory cells that each includes Y storage regions. The system also includes a read module that receives a first read signal that includes a first read signal data component and a first read signal interference component from a ...	05/29/2012
8184480	Multi-level nonvolatile memory device with reduced number of read voltages based on a cell address and method for operating the same Methods for operating a nonvolatile memory device including multi-level cells configured to store at least n logic states, where n is equal to or greater than four are provided. The methods may include selecting at least one read voltage for a read operation based o...	05/22/2012
8179718	Memory device and memory programming method Provided are memory devices and memory programming methods. A memory device may include: a multi-level cell array that includes a plurality of multi-level cells; a programming unit that programs a first data page in the plurality of multi-level cells and programs a ...	05/15/2012
8179719	Systems and methods for improving error distributions in multi-level cell memory systems A memory system includes a state set module that provides a first state set having a plurality of states, each being assigned to represent a particular data sequence, and a second state set having a same number of states as the first state set, wherein an assignment...	05/15/2012
8179721	Non-volatile memory device with both single and multiple level cells A non-volatile memory array with both single level cells and multilevel cells. The single level and multilevel cells, in one embodiment, are alternated either along each bit line. An alternate embodiment alternates the single and multilevel cells along both the bit ...	05/15/2012
8179720	NAND flash memory A NAND flash memory includes a NAND string and a control circuit, wherein in a write operation, the control circuit applies a writing voltage between a control gate of a selected memory cell to be written and a semiconductor well, and after the write operation and b...	05/15/2012
8174883	Semiconductor memory device capable of preventing a shift of threshold voltage A memory cell array is connected to a word line and a bit line, and configured so that a plurality of memory cells storing one level of n levels (n is a natural number more than 4) in one memory cell are arrayed in a matrix. A control circuit controls a potential of...	05/08/2012
8164952	Nonvolatile memory device and related method of programming A nonvolatile memory device comprises a memory cell array comprising a plurality of memory cells, a voltage generator configured to generate voltages to program the plurality of memory cells, and a control logic component configured to control the voltage generator ...	04/24/2012
8159875	Methods of storing multiple data-bits in a non-volatile memory cell Methods of storing multiple data-bits in a non-volatile memory cell are carried out by trapping carriers in a composite trapping layer formed over a tunnel insulator layer. The composite trapping layer contains a plurality of band engineered sub-layers providing a p...	04/17/2012
8159876	Non-volatile memory and method for power-saving multi-pass sensing A non-volatile memory device and power-saving techniques capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during sensing, which is included in read, and program/verif...	04/17/2012
8154923	Non-volatile memory and method with power-saving read and program-verify operations A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during read, and program/verify operations. A read or program verify operation includes ...	04/10/2012
8154921	Dynamic and adaptive optimization of read compare levels based on memory cell threshold voltage distribution A process is performed periodically or in response to an error in order to dynamically and adaptively optimize read compare levels based on memory cell threshold voltage distribution. One embodiment of the process includes determining threshold voltage distribution ...	04/10/2012
8154922	Semiconductor memory device A semiconductor memory device comprises memory cells, a bitline connected to the memory cells, a read circuit including a precharge circuit, and a first transistor connected between the bitline and the read circuit, wherein a first voltage is applied to a gate of th...	04/10/2012
8154920	Method of reading data and method of inputting and outputting data in non-volatile memory device A method of reading data in a non-volatile memory device based on the logic level of a selection bit of an address, determines an order of reading a first and second bits of data stored in one multi-level memory cell corresponding to the address based on the logic l...	04/10/2012
8149618	Over-sampling read operation for a flash memory device A flash memory device and a reading method are provided where memory cells are divided into at least two groups. Memory cells are selected according to a threshold voltage distribution. Data stored in the selected memory cells are detected and the data is latched co...	04/03/2012
8144510	Method and system for programming multi-state memory In a multi-level memory cell, when data to be programmed arrives, the cell is programmed to the lowest-charge state in which any bit position that is being programmed or has already been programmed has the correct value, regardless of the value in that state of any ...	03/27/2012
8144511	Selective memory cell program and erase Techniques are disclosed herein for programming memory arrays to achieve high program/erase cycle endurance. In some aspects, only selected word lines (WL) are programmed with other WLs remaining unprogrammed. As an example, only the even word lines are programmed w...	03/27/2012
8144513	Non-volatile semiconductor memory A non-volatile semiconductor device has a memory cell array having electrically erasable programmable non-volatile memory cells, reprogramming and retrieval circuits that temporarily store data to be programmed in the memory cell array and sense data retrieved from ...	03/27/2012
8144512	Data transfer flows for on-chip folding A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second sectio...	03/27/2012
8134868	Memory device biasing method and apparatus Memory devices and methods are disclosed, such as those facilitating data line shielding by way of capacitive coupling with data lines coupled to a memory string source line. For example, alternating data lines are sensed while adjacent data lines are coupled to a c...	03/13/2012
8134869	Semiconductor memory having electrically erasable and programmable semiconductor memory cells An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level st...	03/13/2012
8130544	Method of reducing bit error rate for a flash memory A method of reducing coupling effect in a flash memory is disclosed. A neighboring page is read, and a flag is set active if the neighboring page is an interfering page. Data are read from the neighboring page at least two more times using at least two distinct read...	03/06/2012
8130543	Method and apparatus for increasing memory programming efficiency through dynamic switching of sense amplifiers A method and apparatus are described that efficiently program charge-trapping memory cells by dynamically switching sense amplifiers and corresponding drivers depending upon data to be programmed. When a number of sense amplifier/drivers can be operated simultaneous...	03/06/2012
8130545	Nonvolatile semiconductor storage device A nonvolatile semiconductor storage device capable of storing a plurality of bits of data in one memory cell by assigning multivalued data having a higher-order bit selected from one of a pair of data in a first unit and a lower-order bit selected from the other of ...	03/06/2012
8125826	Fractional bits in memory cells Methods, devices, modules, and systems for programming memory cells can include storing charges corresponding to a data state that represents an integer number of bits in a set of memory cells. Programming memory cells can include storing a charge in a cell of the s...	02/28/2012
8120954	Method, apparatus, and system for erasing memory Methods, apparatus, and systems may operate to perform a pre-programming operation on a plurality of multiple level memory cells of a memory device. An example of applying such a pre-programming operation involves applying a series of voltage pulses to the plurality...	02/21/2012
8120953	Reading method of nonvolatile semiconductor memory device Reading methods of a nonvolatile semiconductor memory device are described herein. Methods may include supplying, to a word line, one of a voltage corresponding to a highest reading level or a voltage having a level higher than a first reading level of a read operat...	02/21/2012
8116132	Flash memory device configured to switch wordline and initialization voltages Provided is a flash memory device including a wordline voltage generating unit, a switch unit, a row decoder and a control circuit. The wordline voltage generating unit generates at least one wordline voltage for read operations of a multi-level cell in the flash me...	02/14/2012
8116131	Programming method for non-volatile memory device Provided is a method of programming a non-volatile memory device. The method includes applying a first programming pulse to a corresponding wordline of the non-volatile memory device, applying a second programming pulse to the wordline, wherein a voltage of the seco...	02/14/2012
8116133	Maintenance operations for multi-level data storage cells Systems and methods, including computer software, for reading data from a flash memory cell involve detecting voltages from a group of memory cells. The group of memory cells have associated metadata for error detection, and each memory cell stores a voltage represe...	02/14/2012
8111549	Dynamic wordline start voltage for nand programming The present invention discloses a method of programming an MLC NAND flash memory device comprising: selecting a start value for a program voltage for a lower page; incrementing said program voltage to program said lower page; verifying a threshold voltage; determini...	02/07/2012
8111550	M+N bit programming and M+L bit read for M bit memory cells A memory device and programming and/or reading process is described that programs and/or reads the cells in the memory array with higher threshold voltage resolution than required. In programming non-volatile memory cells, this allows a more accurate threshold volta...	02/07/2012
8111548	Programming non-volatile storage using binary and multi-state programming processes A non-volatile storage system stores data by programming the data as binary data into blocks that have not yet been programmed with multi-state data and have not yet been programmed with binary data X times. The system transfers data from multiple blocks (source blo...	02/07/2012
8107287	Method of programming nonvolatile memory device A method of programming a nonvolatile memory device includes sequentially programming first to (n−1)th logical pages of all the physical pages of a first memory block of the memory blocks in response to a first program command, a step of loading data of...	01/31/2012
8102707	Non-volatile multilevel memory cells The present disclosure includes methods, devices, modules, and systems for operating non-volatile multilevel memory cells. One method embodiment includes assigning, to a first cell coupled to a row select line, a first number of program states to which the first cel...	01/24/2012
8102705	Structure and method for shuffling data within non-volatile memory devices Techniques for the reading and writing of data in multi-state non-volatile memories are described. Data is written into the memory in a binary format, read into the data registers on the memory, and “folded” within the registers, and then written back into the m...	01/24/2012
8102708	Flash multi-level threshold distribution scheme A threshold voltage distribution scheme for multi-level Flash cells where an erase threshold voltage and at least one programmed threshold voltage lie in an erase voltage domain. Having at least one programmed threshold voltage in the erase voltage domain reduces th...	01/24/2012
8102706	Programming a memory with varying bits per cell Memory devices adapted to receive and transmit analog data signals representative of two or more bits, such as to facilitate increases in data transfer rates relative to devices communicating data signals indicative of individual bits. A controller and a read/write ...	01/24/2012

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Class 365/185.03 - Multiple values (e.g., analog)