Class 365/185.01 - FLOATING GATE

Subclass of Class 365 - Static information storage and retrieval
Definition: Subject matter wherein a device stores and retrieves information
No. of patents: 820
Last issue date: 05/29/2012

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Number	Title	Issue Date
8189377	Semiconductor device p-type wells are provided within an n-type embedded well of a semiconductor substrate lying in an area for forming a flash memory, in a state of being isolated from one another. A capacitance section, a data write/erase charge injection/discharge section and a data ...	05/29/2012
8130571	Semiconductor integrated circuit A semiconductor integrated circuit has a central processing unit and a rewritable nonvolatile memory area disposed In an address space of the central processing unit. The nonvolatile memory area has a first nonvolatile memory area and a second nonvolatile memory are...	03/06/2012
8077511	Hybrid non-volatile memory A non-volatile memory (NVM) circuit includes at least two types of NVM sub-circuits that share common support circuitry. Different types of NVM sub-circuits include ordinary NVM circuits that provide a logic output upon being addressed, programmable fuses that provi...	12/13/2011
7990762	Integrated circuits to control access to multiple layers of memory Circuits to control access to memory; for example, third dimension memory are provided. An integrated circuit (IC) may be configured to control access to memory cells. For example, the IC may include a memory having memory cells that are vertically disposed in multi...	08/02/2011
7978545	Semiconductor integrated circuit A semiconductor integrated circuit has a central processing unit and a rewritable nonvolatile memory area disposed in an address space of the central processing unit. The nonvolatile memory area has a first nonvolatile memory area and a second nonvolatile memory are...	07/12/2011
7961510	Integrated circuits to control access to multiple layers of memory in a solid state drive Circuits to control access to memory; for example, third dimension memory are disclosed. An integrated circuit (IC) may be configured to control access to memory cells. For example, the IC may include a memory having memory cells that are vertically disposed in mult...	06/14/2011
7940561	Semiconductor device p-type wells are provided within an n-type embedded well of a semiconductor substrate lying in an area for forming a flash memory, in a state of being isolated from one another. A capacitance section, a data write/erase charge injection/discharge section and a data ...	05/10/2011
7933149	Non-volatile memory device A non-volatile memory device and a method of fabricating the same are disclosed. The method includes the steps of: providing a semiconductor substrate having isolation layers in an isolation region, a tunnel insulating layer formed between the isolation layers, and ...	04/26/2011
7920418	Nonvolatile memory devices and methods of forming the same A nonvolatile memory device includes a semiconductor substrate of a first conductivity type, a plurality of word lines on the semiconductor substrate, each the plurality of word lines including a floating gate of a second conductivity type. A ground select line and ...	04/05/2011
7894257	Low voltage low cost non-volatile memory Methods, circuits, processes, devices, and/or arrangements for providing a non-volatile memory (NVM) cell are disclosed. In one embodiment, an NVM cell can include: (i) a floating gate in a gate layer, where the floating gate is over an insulating layer, and the ins...	02/22/2011
7885106	Nonvolatile semiconductor memory device and method for driving same A nonvolatile semiconductor memory device includes: a semiconductor substrate including a first channel, and a source region and a drain region provided on both sides of the first channel; a first insulating film provided on the first channel; a charge retention lay...	02/08/2011
7876610	Memory cell array with specific placement of field stoppers A plurality of first transistors formed on a substrate share a gate electrode. Isolation regions isolate the plurality of first transistors from one another. In the region where the plurality of first transistors, an impurity region is formed in such a manner that i...	01/25/2011
7821823	Semiconductor memory device, method of driving the same and method of manufacturing the same Disclosed is a semiconductor storage device comprising a semiconductor substrate, a first and a second impurity diffusion layer formed in the semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a first gate electrode formed on ...	10/26/2010
7821824	Semiconductor integrated circuit having buses with different data transfer rates A semiconductor integrated circuit has a central processing unit and a rewritable nonvolatile memory area disposed in an address space of the central processing unit. The nonvolatile memory area has a first nonvolatile memory area and a second nonvolatile memory are...	10/26/2010
7778072	Method for fabricating charge-trapping memory A manufacturing method of a charge-trapping memory device is provided. This method includes forming a stacked structure having at least a charge-trapping medium. An annealing process in a hydrogen gas is then performed on the stacked structure subsequent to the devi...	08/17/2010
7751236	MEM suspended gate non-volatile memory A carrier storage node such as a floating gate is formed on a moving electrode with a control gate to form a suspended gate non-volatile memory, reducing floating gate to floating gate coupling and leakage current, and increasing data retention. ...	07/06/2010
7733694	Nonvolatile semiconductor memory having a floating gate electrode formed within a trench According to an aspect of the invention, a nonvolatile semiconductor memory comprises: a semiconductor substrate; a trench formed in the semiconductor substrate; a first insulating film being formed on a wall surface of the trench; a floating gate electrode formed o...	06/08/2010
7733728	Non-volatile semiconductor memory device Disclosed is to enable high speed reading from a storage node when a read is executed. A main cell array is constituted from main cell division units 20a. Each main cell division unit 20a includes select gates SG that extend in a vertical...	06/08/2010
7663912	Non-volatile memory device and method of fabricating the same A non-volatile memory device and a method of fabricating the same are disclosed. The method includes the steps of: providing a semiconductor substrate having isolation layers in an isolation region, a tunnel insulating layer formed between the isolation layers, and ...	02/16/2010
7652917	Semiconductor device In a data program/erase device of a nonvolatile memory cell, data are re-written by means of an FN tunnel current of an entire channel surface. In a buried n-well of a semiconductor substrate in a flash memory formation region, p wells are placed in the form isolate...	01/26/2010
7623371	Semiconductor device p-type wells are provided within an n-type embedded well of a semiconductor substrate lying in an area for forming a flash memory, in a state of being isolated from one another. A capacitance section, a data write/erase charge injection/discharge section and a data ...	11/24/2009
RE40976	Common source EEPROM and flash memory A nonvolatile memory array is arranged as a plurality of rows and columns of memory cell transistors. The sources of the memory cell transistors in each row of the array are electrically coupled together. The control gates of the memory cell transistors associated w...	11/17/2009
7613041	Methods for operating semiconductor device and semiconductor memory device Methods and apparatus on charges injection using piezo-ballistic-charges injection mechanism are provided for semiconductor device and nonvolatile memory device. The device comprises a strain source, an injection filter, a first conductive region, a second conductiv...	11/03/2009
7580279	Flash memory cells with reduced distances between cell elements An anti-reflective coating (ARC) is formed over the various layers involved in a cell fabrication process. The ARC is selectively etched such that the edges of the etched areas of the ARC slope downward at an angle determined by the thickness of the ARC. The etching...	08/25/2009
7573738	Mode selection in a flash memory device A single flash memory device has selectable read modes for either a segment mode or a page mode. The desired mode is selected by writing a control word to a mode control register. Selecting the segment mode causes the device to output selected memory segments. Selec...	08/11/2009
7567448	Content addressable memory cell having a single floating gate transistor A method and system for providing a content addressable memory cell (CAM) as well as the CAM are disclosed. In one aspect, the method and system include providing a plurality of memory cells, at least one search line and at least one match line. Each of the CAM cell...	07/28/2009
7554841	Circuit for storing information in an integrated circuit and method therefor A circuit has a storing portion, a write portion and a read portion. In one embodiment, read portion has a transistor which has a substantially thinner gate oxide than the transistors in the storing portion and the transistors in the write portion. In an alternate e...	06/30/2009
7554840	Semiconductor device and fabrication thereof A memory device is disclosed. A floating gate is disposed overlying a substrate. A tunneling dielectric layer is interposed between the floating gate and the substrate. An inter poly dielectric layer is disposed overlying the floating gate and the substrate. A word ...	06/30/2009
7535758	One or multiple-times programmable device Methods and apparatus, including computer program products, for a one or multiple-times programmable memory device. A semiconductor may include an active region of a substrate, a thin oxide layer over a substrate, a first and second polysilicon layer, and a first an...	05/19/2009
7511994	MEM suspended gate non-volatile memory A carrier storage node such as a floating gate is formed on a moving electrode with a control gate to form a suspended gate non-volatile memory, reducing floating gate to floating gate coupling and leakage current, and increasing data retention. ...	03/31/2009
7508721	Use of data latches in multi-phase programming of non-volatile memories A non-volatile memory device includes circuitry for governing a multi-phase programming process in a non-volatile memory. The exemplary embodiment uses a quick pass write technique where a single programming pass is used, but the biasing of the selected memory cells...	03/24/2009
7505311	Semiconductor memory device A semiconductor memory device includes a memory cell array with electrically rewritable and non-volatile memory cells arranged therein, and a bit line control circuit connected to a bit line of the memory cell array to control and detect the bit line voltage in acco...	03/17/2009
7460396	Semiconductor device In a data program/erase device of a nonvolatile memory cell, data are re-written by means of an FN tunnel current of an entire channel surface. In a buried n-well of a semiconductor substrate in a flash memory formation region, p wells are placed in the form isolate...	12/02/2008
7457154	High density memory array system A memory system comprising a memory array having a plurality of memory units, a column decoder, a row decoder, a selecting/driving circuit and a sensing circuit is disclosed. Each memory unit comprises a gate electrode coupled to a word lines, a source region couple...	11/25/2008
7447064	System and method for providing a CMOS compatible single poly EEPROM with an NMOS program transistor A system and method is disclosed for providing a CMOS compatible single poly electrically erasable programmable read only memory (EEPROM) with memory cells that comprise an NMOS program transistor. In a first embodiment the memory cells of the EEPROM comprise a PMOS...	11/04/2008
7443726	Systems for alternate row-based reading and writing for non-volatile memory A set of storage elements is programmed beginning with a word line WLn adjacent a select gate line for the set. After programming the first word line, the next word line WLn+1 adjacent to the first word line is skipped and the next word line WLn+2 adjacent to WLn+1 ...	10/28/2008
7440317	One transistor SOI non-volatile random access memory cell One aspect of the present subject matter relates to a memory cell, or more specifically, to a one-transistor SOI non-volatile memory cell. In various embodiments, the memory cell includes a substrate, a buried insulator layer formed on the substrate, and a transisto...	10/21/2008
7440337	Nonvolatile semiconductor memory apparatus having buffer memory for storing a program and buffering work data A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (	10/21/2008
7433229	Flash memory device with shunt A shunt activation signal is transmitted by an external control terminal through an external transmission interface to switch a flash memory controller in a shunt mode. The shunt activation signal of the external transmission interface can set up a switch as shunt. ...	10/07/2008
7432546	Apparatus having a memory device with floating gate layer grain boundaries with oxidized portions The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface thereb...	10/07/2008

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Class 365/185.01 - FLOATING GATE