Bizarre Patents
A helium-filled sun shade for protecting individuals engaged in outdoor activities.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8189364 | Charge retention structures and techniques for implementing charge controlled resistors in memory cells and arrays of memory Embodiments of the invention relate generally to semiconductors and semiconductor fabrication techniques, and more particularly, to devices, integrated circuits, memory cells and arrays, and methods to use silicon carbide structures to retain amounts of charge indic... | 05/29/2012 |
| 8189363 | Resistance change memory A resistance change memory includes two memory cell arrays each including a plurality of memory cells, the memory cells including variable resistive elements, two reference cell arrays provided to correspond to the two memory cell arrays, respectively, and each incl... | 05/29/2012 |
| 8189366 | Method and apparatus providing a cross-point memory array using a variable resistance memory cell and capacitance The invention relates to a method and apparatus providing a memory cell array in which each resistance memory cell is connected in series to a capacitive element. Access transistors are not necessary to perform read and write operations on the memory cell. In one ex... | 05/29/2012 |
| 8189365 | Semiconductor device configuration method A plurality of three-terminal variable resistance switching elements each having a source electrode, a drain electrode, and a gate electrode are connected to each other in series. The source electrode of each of the three-terminal variable resistance switching eleme... | 05/29/2012 |
| 8184470 | Resistance change memory device and programming method thereof A method of programming a resistance change memory device includes: applying program voltage pulses to a memory cell for programming a target resistance value; setting thermal relaxation times between the respective program voltage pulses; and controlling the shape ... | 05/22/2012 |
| 8184468 | Nonvolatile memory devices using variable resistive elements A nonvolatile memory device using a variable resistive element is provided. The nonvolatile memory device may include a memory cell array which includes an array of multiple nonvolatile memory cells having variable resistance levels depending on data stored. Word li... | 05/22/2012 |
| 8184469 | Stored multi-bit data characterized by multiple-dimensional memory states A method for enhancing data storage may comprise storing two or more bits in a memory cell, wherein the stored bits may be characterized by two or more independent variables based, at least in part, on physical properties of the memory cell. ... | 05/22/2012 |
| 8179712 | Non-volatile memory with metal-polymer bi-layer A resistive memory cell that includes a metal-polymer bi-layer proximate a CMOS gate. The memory cell has a substrate having a source contact connected to a source line and a drain contact connected to a drain line, a CMOS gate proximate the substrate electrically c... | 05/15/2012 |
| 8179713 | Nonvolatile memory element, nonvolatile memory device, and nonvolatile semiconductor device A nonvolatile memory element comprises a first electrode (103), a second electrode (105), and a resistance variable layer (104) which is provided between the first electrode and the second electrode, and is configured to reversibly switch an int... | 05/15/2012 |
| 8179714 | Nonvolatile storage device and method for writing into memory cell of the same Provided is a nonvolatile storage device (200) capable of stably operating without increasing a size of a selection transistor included in each of memory cells. The nonvolatile storage device (200) includes: a semiconductor substrate (301) which... | 05/15/2012 |
| 8179711 | Semiconductor memory device with stacked memory cell and method of manufacturing the stacked memory cell In a semiconductor memory device and method, resistive-change memory cells are provided, each including a plurality of control transistors formed on different layers and variable resistance devices comprising a resistive-change memory. Each resistive-change memory c... | 05/15/2012 |
| 8174865 | Memory devices and wireless devices including the same A memory device includes a plurality of memory bit lines connected to a plurality of memory cells, a plurality of reference bit lines connected to a plurality of reference cells and a reference bit line selection circuit. The memory bit lines has a first pattern and... | 05/08/2012 |
| 8174864 | Resistance-changing memory device A resistance-changing memory device has a cell array having memory cells, each of which stores as data a reversibly settable resistance value, a sense amplifier for reading data from a selected memory cell in the cell array, and a voltage generator circuit which gen... | 05/08/2012 |
| 8169811 | Non-volatile re-programmable memory device A memory device including a non-volatile re-programmable memory cell is provided. In connection with various example embodiments, the memory cell is a single resistor located between a first and second node. The resistor stores different resistance states correspond... | 05/01/2012 |
| 8159859 | Semiconductor storage device A semiconductor storage device includes: a memory cell array including memory cells, each of the memory cells having a variable resistance element; and a control circuit configured to apply a control voltage, which is necessary for the variable resistance element to... | 04/17/2012 |
| 8159856 | Bipolar select device for resistive sense memory A resistive sense memory apparatus includes a bipolar select device having a semiconductor substrate, a plurality of collector contacts disposed in a first side of the of the semiconductor substrate, an emitter contact layer disposed in a second side of the semicond... | 04/17/2012 |
| 8159858 | Signal margin improvement for read operations in a cross-point memory array A configuration for biasing conductive array lines in a two-terminal cross-point memory array is disclosed. The configuration includes applying a read voltage to a selected X-conductive array line while applying an un-select voltage thru a biasing element to a remai... | 04/17/2012 |
| 8159857 | Electronic device with a programmable resistive element and a method for blocking a device One or more embodiments relate to an electronic device comprising a circuitry and a programmable resistive element. The programmable resistive element comprises a first and a second state, wherein the programmable resistive element is configured to allow switching f... | 04/17/2012 |
| 8154906 | Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices Embodiments disclosed include memory cell operating methods, memory cell programming methods, memory cell reading methods, memory cells, and memory devices. In one embodiment, a memory cell includes a wordline, a first bitline, a second bitline, and a memory element... | 04/10/2012 |
| 8154908 | Nonvolatile semiconductor storage device and data writing method therefor A nonvolatile semiconductor storage device includes: a first wire and a second wire intersecting each other; a memory cell which is disposed at each intersection of the first wire and the second wire and electrically rewritable and in which a variable resistor for m... | 04/10/2012 |
| 8154904 | Programming reversible resistance switching elements A storage system and method for operating the storage system that uses reversible resistance-switching elements is described. Techniques are disclosed herein for varying programming conditions to account for different resistances that memory cells have. These techni... | 04/10/2012 |
| 8154909 | Resistance variable memory apparatus A resistance variable memory apparatus (100) of the present invention includes a current suppressing element (116) which is connected in series with each resistance variable layer (114) and whose threshold voltage is VF, and is configured to app... | 04/10/2012 |
| 8154907 | Method for fabricating indium (In)-antimony (Sb)-tellurium (Te) nanowires and phase-change memory device comprising the nanowires Disclosed herein is a method for manufacturing (In)—(Sb)—(Te) (IST) nanowires and a phase-change memory device comprising the nanowires. The method comprises providing a substrate and vapors of In, Sb and Te precursors in a chamber and allowing the vapors to rea... | 04/10/2012 |
| 8154903 | Split path sensing circuit A sensing circuit is disclosed. The sensing circuit includes a first path including a first resistive memory device and a second path including a reference resistive memory device. The first path is coupled to a first split path including a first load transistor and... | 04/10/2012 |
| 8154905 | Semiconductor memory device having a resistive memory element A semiconductor memory according to an aspect of the invention including first and second bit lines, a word line, a resistive memory element which has one end and the other end, the one end being connected with the first bit line, a selective switch element which ha... | 04/10/2012 |
| 8149608 | Multi-level phase change random access memory device A multi-level phase change random access memory device includes a first electrode, a second electrode, and a phase change material disposed between the first electrode and the second electrode. The multi-level phase change random access memory device also includes a... | 04/03/2012 |
| 8149609 | Nonvolatile semiconductor memory device A nonvolatile semiconductor memory device comprising: a memory cell array including memory cells each provided at individual intersection between a first wiring and a second wiring, the memory cell comprising a variable resistive element, and predetermined numbers o... | 04/03/2012 |
| 8149610 | Nonvolatile memory device A memory device comprises an array of memory cells each capable of storing multiple bits of data. Each memory cell includes a programmable transistor in series with a resistance switching device. The transistor is switchable between a plurality of different threshol... | 04/03/2012 |
| 8149611 | Nonvolatile semiconductor memory device A nonvolatile semiconductor memory device comprises a memory cell array including first and second mutually crossing lines and electrically erasable programmable memory cells arranged at intersections of the first and second lines, each memory cell containing a vari... | 04/03/2012 |
| 8144500 | Semiconductor memory device According to one embodiment, semiconductor memory device includes: semiconductor substrate; parallel first lines stacked on substrate; parallel second lines intersecting first lines; memory cell array including memory cells at intersections of first and second lines... | 03/27/2012 |
| 8144499 | Variable resistance memory device A variable resistance memory device includes: a first common line; a second common line; plural memory cells each formed by serially connecting a memory element, resistance of which changes according to applied voltage, and an access transistor between the second co... | 03/27/2012 |
| 8144498 | Resistive-switching nonvolatile memory elements Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed in one or more layers on an integrated circuit. Each memory element may have a first conductive layer, a metal oxide layer, and a secon... | 03/27/2012 |
| 8139397 | Spatial correlation of reference cells in resistive memory array The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and map... | 03/20/2012 |
| 8139398 | Data read/write device A data read/write device according to an example of the present invention includes a recording layer, and means for applying a voltage to the recording layer, generating a resistance change in the recording layer, and recording data. The recording layer is composed ... | 03/20/2012 |
| 8139391 | Multi-bit resistance-switching memory cell A non-volatile storage apparatus comprises a set of Y lines, a set of X lines and a plurality of memory cells in communication with the set of X lines and the set of Y lines. Each memory cell of the plurality of memory cells includes a resistance element in a static... | 03/20/2012 |
| 8139394 | Semiconductor storage device A semiconductor storage device includes: a cell array including a plurality of first wirings, a plurality of second wirings intersecting the first wirings, and memory cells positioned at intersecting portions between the first wirings and the second wirings, each of... | 03/20/2012 |
| 8139396 | Resistance change memory and control method thereof According to one embodiment, a resistance change memory includes a memory cell array in which a plurality of blocks are provided, resistance change storage elements which are provided in blocks and which store data in accordance with a change in resistance state, fi... | 03/20/2012 |
| 8139395 | Semiconductor memory device There is provided a semiconductor memory device capable of suppressing writing disturbances without increasing the cell array area. A semiconductor memory device has a memory cell array where a number of memory cells having a two-terminal type memory element and a t... | 03/20/2012 |
| 8139392 | Nonvolatile semiconductor memory device and writing method of the same A nonvolatile semiconductor memory device comprises a memory cell array composed of a plurality of memory cells each including a variable resistance element in which a resistance characteristic is changed by applying a voltage to the both ends, and information relat... | 03/20/2012 |
| 8139393 | Method and apparatus for non-volatile multi-bit memory A memory device that selectably exhibits first and second logic levels. A first conductive material has a first surface with a first memory layer formed thereon, and a second conductive material has a second surface with a second memory layer formed thereon. A conne... | 03/20/2012 |
