Did You Know...
...that one person who claimed to be the inventor of the television is Russian emigre Vladimir Zworykin? In 1929 David Sarnoff, founder of RCA, asked Zworykin what it would take to develop TV for commercial use. He said: a year and a half and $100,000. In reality, it took 20 years and $50 million! Before his death in 1982 at the age of 92, Zworykin said of his invention: "The technique is wonderful. It is beyond my expectations. But the programs! I would never let my children even come close to this thing."
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| Number | Title | Issue Date |
| 7688649 | Semiconductor memory device with debounced write control signal A semiconductor memory device having a memory cell array, an input buffer, an output buffer, and an input-output control circuit that receives a write control signal and controls the input and output buffers. The output buffer generates a commencement signal indicat... | 03/30/2010 |
| 7426028 | Spectroscopic feedback for high density data storage and micromachining Optical breakdown by predetermined laser pulses in transparent dielectrics produces an ionized region of dense plasma confined within the bulk of the material. Such an ionized region is responsible for broadband radiation that accompanies a desired breakdown process... | 09/16/2008 |
| 7367119 | Method for forming a reinforced tip for a probe storage device Systems and methods in accordance with the present invention can include a tip contactable with a media. In an embodiment, the tip comprises a substantially hollow structure formed of a metal. The tip can be formed by depositing a first metal layer over silicon ther... | 05/06/2008 |
| 7342276 | Method and apparatus utilizing monocrystalline insulator A semiconductor device, including: a semiconductor material; a conductive element; and a substantially monocrystalline insulator disposed between the semiconductor material and the conductive eleme... | 03/11/2008 |
| 7336524 | Atomic probes and media for high density data storage A device in accordance with embodiments of the present invention comprises a contact probe for high density data storage reading, writing, erasing, or rewriting. In one embodiment, the contact probe can include a silicon core having a conductive coating. Contact pro... | 02/26/2008 |
| 7309630 | Method for forming patterned media for a high density data storage device Systems in accordance with the present invention can include a tip contactable with a media, the media including a substrate and a plurality of cells disposed over the substrate, one or more of the cells being electrically isolated from the other of the cells by a m... | 12/18/2007 |
| 7301887 | Methods for erasing bit cells in a high density data storage device Methods in accordance with the present invention can be applied, in an embodiment, to a media comprising a phase change material to alter a resolved portion of the phase change material to have a resistance different from a resistance of the bulk material. A tip hav... | 11/27/2007 |
| 7287103 | Method and apparatus for generating a mask value and command for extreme data rate memories utilizing error correction codes A method, an apparatus, and a computer program product are provided for the handling of write mask operations in an XDR™ DRAM memory system. This invention eliminates the need for a two-port array because the mask generation is done as the data is received. Less l... | 10/23/2007 |
| 7268967 | Linear-type tape storage magnetic head device A linear-type tape storage magnetic head device in which track density and the response of a magnetic head is improved is provided. A sliding portion constituting a main sliding surface in contact with a magnetic tape T and a magnetic head element chip portion. A tr... | 09/11/2007 |
| 7239555 | Erasing method for non-volatile memory An erasing method for a non-volatile memory is provided. The method includes the following two major steps. (a) A first voltage is applied to the odd-numbered select gates of each memory row and a second voltage is applied to the even-numbered select gates of each m... | 07/03/2007 |
| 7233517 | Atomic probes and media for high density data storage A device in accordance with embodiments of the present invention comprises an atomic probe for high density data storage reading, writing, erasing, or rewriting. In one embodiment, the atomic probe can include a core having a conductive coating. The core can compris... | 06/19/2007 |
| 7212951 | Method for characterizing and analyzing 3-D shapes of molecules utilizing steric multiplets Steric features inherent in the three dimensional disposition of atoms in molecules can be represented as multiplets using a defined set of steric descriptors. The resulting multiplets can be encoded in a compressed form of bitstring known as a bitmap. Such bitmaps ... | 05/01/2007 |
| 7212426 | Flash memory system capable of inputting/outputting sector data at random A flash memory system capable of inputting/outputting data in units of sectors at random. The flash memory system includes a flash memory (a cell array), a buffer memory, a random data input/output circuit, and a control circuit. The random data input/output circuit... | 05/01/2007 |
| 7203107 | Device and method for compensating defect in semiconductor memory A device for compensating a semiconductor memory defect, suitable for use in a semiconductor memory, is provided. The device includes a memory array, having at least a defectless sub-memory region, the memory array being coupled to an address decoder circuit and a s... | 04/10/2007 |
| 7171528 | Method and apparatus for generating a write mask key A method and apparatus provides a mask key that is used instead of mask data. In an embodiment of the present invention, a write mask key is generated by a memory controller and transferred to a memory device that uses the write mask key to determine whether to writ... | 01/30/2007 |
| 7123504 | Semiconductor integrated circuit device having static random access memory mounted thereon A semiconductor integrated circuit device is configured by eight transistors including the six transistors configuring the data holding section and the two NMOS transistors configuring the reading stage. The threshold voltage of the NMOS transistors configuring the ... | 10/17/2006 |
| 7103793 | Memory controller having receiver circuitry capable of alternately generating one or more data streams as data is received at a data pad, in response to counts of strobe edges received at a strobe pad A double data rate memory controller is provided with a plurality of data and strobe pads, means for receiving data and strobe signals via said pads at 1x double data rate memory speed, and means for receiving data and strobe signals via said pads at Mx double data ... | 09/05/2006 |
| 7103790 | Memory controller driver circuitry having a multiplexing stage to provide data to at least N-1 of N data propagation circuits, and having output merging circuitry to alternately couple the N data propagation circuits to a data pad to generate either a 1x or Mx stream of data A double data rate memory controller is provided with a plurality of data and strobe pads, means for receiving data and strobe signals via said pads at 1× double data rate memory speed, and means for receiving data and strobe signals via said pads at M× double dat... | 09/05/2006 |
| 7068452 | Method for recording magnetic information and magnetic recording system Stable writing is performed in a super high density hard disk where writing by magnetic field is difficult. A layered thin film structure including at least a magnetic metallic layer/a non-magnetic metallic layer/a magnetic metallic layer is formed, and a metallic p... | 06/27/2006 |
| 7061824 | Address buffer circuit for memory device Disclosed is an address buffer circuit for a memory device, the address buffer circuit comprising: a first address input buffer group and a second address input buffer group for receiving an address signal applied from the exterior; and a control unit for controllin... | 06/13/2006 |
| 7020003 | Device and method for compensating defect in semiconductor memory A device for compensating a semiconductor memory defect suitable for a semiconductor memory is provided. The device comprises: a memory array, the memory array having a memory region consisting of a plurality of memory cells, the memory array being coupled to the ad... | 03/28/2006 |
| 7014956 | Active secondary exposure mask to manufacture integrated circuits A mask having a pattern to modify a circuitry feature that has been exposed in a radiation sensitive layer by transmitting modifying radiation to a region of the radiation sensitive layer containing the exposed circuitry feature is described. The mask may reduce sub... | 03/21/2006 |
| 7003003 | Method and apparatus for providing multiple independently controllable beams from a single laser output beam A laser output beam is directed into an acousto-optic cell. The acousto-optic cell is driven by RF voltages at a plurality of different frequencies. Portions of the laser output beam are diffracted by the acousto-optic cell at a plurality of different angles corresp... | 02/21/2006 |
| 6992943 | System and method for performing partial array self-refresh operation in a semiconductor memory device Systems and methods for performing a PASR (partial array self-refresh) operation wherein a refresh operation for recharging stored data is performed on a portion (e.g., ½ ¼, ⅛, or 1/16) of one or more selected memory banks comprising a cell array in a semiconduc... | 01/31/2006 |
| 6979845 | Semiconductor device in which punchthrough is prevented A semiconductor device includes a semiconductor region of a first conductive type. First and second regions of a second conductive type opposite to the first conductive type are provided in a surface of the semiconductor region in a predetermined interval. A third r... | 12/27/2005 |
| 6961830 | Semiconductor memory device with fast masking process in burst write mode A semiconductor memory device has a burst write mode in which predetermined plural command signals are input through a plurality of command pads and a mask control operation in the burst write mode is performed in response to the command signals. Therefore, the mask... | 11/01/2005 |
| 6952367 | Obtaining data mask mapping information A data mask map may be programmed into a storage device in various ways. In one embodiment, the data mask is hardwired into a selection device to reorder either the data mask bits or the data chunks. In another embodiment, a data mask map is retrieved from a locatio... | 10/04/2005 |
| 6940801 | Optical recording medium, optical recording and reproducing method and apparatus An optical recording medium, an optical recording and reproducing method, and an apparatus that can record and reproduce multilevel information at a high density and with a high S/N ratio. Recording light emitted from a light source is collimated by a collimation le... | 09/06/2005 |
| 6928627 | Method for recognizing and avoiding etch-critical regions In a method for recognizing etch-critical regions, the critical regions are already determined in the layout under the processor control dependent on the fabrication-oriented rules and are automatically rectified in the existing layout, so that under-etchings are av... | 08/09/2005 |
| 6912148 | Magnetic semiconductor memory and the reading method using spin-polarized electron beam A system for writing data to and reading data from a magnetic semiconductor memory utilizing a spin polarized electron beam. The magnetic semiconductor memory comprises a plurality of storage locations, each storage location includes a magnetic material and a layer ... | 06/28/2005 |
| 6850092 | Low latency FIFO circuits for mixed asynchronous and synchronous systems A FIFO design interfaces a sender subsystem and a receiver subsystem operating on different time domains. The sender subsystem and the receiver subsystem may be synchronous or asynchronous. The FIFO circuit includes a put interface configured to operate in accordanc... | 02/01/2005 |
| 6826663 | Coded write masking A memory system having a memory controller and a memory device coupled to the memory controller. The memory controller outputs a write data value to the memory device. The memory device receives the write data value from the memory controller, and compares the write... | 11/30/2004 |
| 6798959 | Display device and method for producing the same A display device comprises an actuator substrate which has actuator elements, an optical waveguide plate, crosspieces which is interposed between the optical waveguide plate and the actuator substrate and which surround the actuator elements, and picture element ass... | 09/28/2004 |
| 6770524 | Method to enhance performance of thermal resistor device An apparatus including a contact on a substrate, a dielectric material overlying the contact, a phase change element overlying the dielectric material on a substrate, and a heater element disposed in the dielectric material and coupled to the contact and the phase c... | 08/03/2004 |
| 6668302 | Method and architecture for re-programming conventionally non-reprogrammable technology The present invention provides a method and architecture for allowing a device using a traditional one-time programmable technology to be programmed multiple times within the package. The present invention provides multiple programming without introducing... | 12/23/2003 |
| 6643194 | Write data masking for higher speed drams A method and apparatus for masking data written to a memory device that reduces the effective write cycle time of the memory device is disclosed. Firing of the column selects is pre-empted, thereby masking data to be written to a memory device. By pre-emp... | 11/04/2003 |
| 6528234 | II-VI compounds as a medium for optical data storage through fast persistent high density spectral holeburning High density, photon-gated persistent spectral holeburning is effectuated in rare earth doped II-VI compounds such as MgS, CaS, BaS and SrS. Two-photon ionization of rare earth ions is performed, selected by a narrow band laser, producing narrow regions o... | 03/04/2003 |
| 6345009 | Apparatus and method for refreshing subsets of memory devices in a memory system A memory system includes a set of memory devices. An interconnect structure links the set of memory devices to one another. A memory controller is connected to the interconnect structure. The memory controller is configured to apply a control signal to th... | 02/05/2002 |
| 6280904 | Photo-chemical generation of stable fluorescent derivatives of rhodamine B The present invention relates to the field of optical recording materials, in particular, fluorescent compounds and matrices suitable for use in optical memory systems, including three dimensional optical memory systems for READ ONLY MEMORY (ROM). In part... | 08/28/2001 |
| 6243284 | Multivalued mask read-only memory A multivalued mask ROM is configured by arranging cell transistors in a matrix form, which is defined by wiring word lines and ground lines in rows and by wiring bit lines in columns. Each of the cell transistors is encompassed by a word line, a ground li... | 06/05/2001 |
