Did You Know...
...that several people are credited with the invention of the flush toilet? Most people have heard of Thomas Crapper (1837-1910), the sanitary engineer who invented the valve-and-siphon arrangement that made the modern toilet possible. Another claimant to "the throne" was British inventor Alexander Cumming who patented a toilet in 1775. Then there's a nameless Minoan (a native of ancient Crete) who lived 4,000 years ago who supposedly was ahead of his time and created the first flush toilet!
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| Number | Title | Issue Date |
| 8149607 | Rewritable memory device with multi-level, write-once memory cells The embodiments described herein are directed to a memory device with multi-level, write-once memory cells. In one embodiment, a memory device has a memory array comprising a plurality of multi-level write-once memory cells, wherein each memory cell is programmable ... | 04/03/2012 |
| 8014185 | Multiple series passive element matrix cell for three-dimensional arrays A nonvolatile memory cell including at least two two-terminal non-linear steering elements arranged in series, and a resistivity switching storage element arranged in series with the at least two two-terminal non-linear steering elements. A memory array, comprising ... | 09/06/2011 |
| 8000155 | Non-volatile memory device and method for writing data thereto The present invention provides a method for writing data to a non-volatile memory device having first wirings and second wirings intersecting one another and memory cells arranged at each intersection therebetween, each of the memory cells having a variable resistiv... | 08/16/2011 |
| 7924598 | Nonvolatile semiconductor memory A nonvolatile semiconductor memory according to an aspect of the invention includes a memory cell array and a power supply circuit. The memory cell array includes memory cells each having an insulating film and being programmed to store information by inflicting an ... | 04/12/2011 |
| 7920402 | Resistance variable memory apparatus A resistance variable memory apparatus (100) of the present invention is a resistance variable memory apparatus (100) using a resistance variable element (22) transitioning between plural resistance states in response to electric pulses of the s... | 04/05/2011 |
| RE42144 | Non-volatile memory comprising means for distorting the output of memory cells The present invention relates to a non-volatile memory comprising a memory array comprising functional memory cells and non-functional memory cells linked to at least one non-functional word line. A word line address decoder comprises a special decoding section link... | 02/15/2011 |
| 7869249 | Complementary bit PCRAM sense amplifier and method of operation A method and apparatus is disclosed for sensing the resistance state of a Programmable Conductor Random Access Memory (PCRAM) element using complementary PCRAM elements, one holding the resistance state being sensed and the other holding a complementary resistance s... | 01/11/2011 |
| 7864602 | Non-volatile semiconductor storage device and method of writing data thereto A non-volatile semiconductor storage device includes: a plurality of memory cells storing information based on a change in resistance value; and a plurality of first and second wirings connected to the plurality of memory cells and activated in reading data from and... | 01/04/2011 |
| 7787278 | Resistance variable memory device and operating method thereof Provided is a resistance variable memory device and a method for operating same. The resistance variable memory device has a phase change material between a top electrode and a bottom electrode. In the method for operating a resistance variable memory, the write cur... | 08/31/2010 |
| 7684225 | Sequential and video access for non-volatile memory arrays An array of non-volatile memory cells arranged in logical columns and logical rows, and associated circuitry to enable reading or writing one or more memory cells on a row in parallel. In some embodiments, the array of memory cells may include a phase change materia... | 03/23/2010 |
| 7684226 | Method of making high forward current diodes for reverse write 3D cell A method of making a nonvolatile memory device includes forming a first electrode, forming at least one nonvolatile memory cell including a diode and a metal oxide antifuse dielectric layer over the first electrode, and forming a second electrode over the at least o... | 03/23/2010 |
| 7532497 | Nonvolatile semiconductor memory device and method of writing into the same In a method of writing into a nonvolatile semiconductor memory device including a resistance memory element which memorizes a high resistance state and a low resistance state and switches between the high resistance state and the low resistance state by an applicati... | 05/12/2009 |
| 7474551 | Method for trimming programmable resistor to predetermined resistance A programmable resistor is an e-fuse connecting to a source/drain of a MOS transistor. A voltage is provided to the gate of the MOS transistor to partially blow the programmable resistor. Following that, a resistance comparator is used to compare the resistance of t... | 01/06/2009 |
| 7447053 | Memory device and method for operating such a memory device A memory device and method for operating a memory device is described. In one embodiment, the memory device has at least one memory cell including an active material, a current supply line, and a first switching device for switching a first current from the current ... | 11/04/2008 |
| 7443721 | Semiconductor integrated device A semiconductor non volatile memory device capable of multiple write operations with high reliability includes memory cells. Each memory cell of the device has a first electrode, a second electrode, and an information storage section between the two electrodes. A se... | 10/28/2008 |
| 7440339 | Stacked columnar 1T-MTj MRAM structure and its method of formation and operation This invention relates to an MRAM array architecture which incorporates certain advantages from both cross-point and 1T-1MTJ architectures during reading operations. The fast read-time and higher signal to noise ratio of the 1T-1MTJ architecture and the higher packi... | 10/21/2008 |
| 7436694 | Nonvolatile memory cell Nonvolatile memory cell, having a first resistor that is electrically programmable in a nonvolatile fashion, a second resistor that is electrically programmable in a nonvolatile fashion, a first leakage current reducing element connected between the first resistor a... | 10/14/2008 |
| 7433222 | Nonvolatile semiconductor memory device A nonvolatile semiconductor device is configured so that a load circuit applying voltage to a variable resistive element is provided electrically connecting in series to the variable resistive element, a load resistive characteristic of the load circuit can be switc... | 10/07/2008 |
| 7428163 | Method and memory circuit for operating a resistive memory cell The invention relates to a method for reading a memory datum from a resistive memory cell comprising a selection transistor which is addressable via a control value, the method comprising detecting a cell current flowing through the resistive memory cell, setting th... | 09/23/2008 |
| 7423897 | Method of operating a programmable resistance memory array A method of operating a programmable resistance memory array. The method comprises writing to all of the programmable resistance elements within the same row of the memory array at substantially the same time. The programmable resistance elements preferably include ... | 09/09/2008 |
| 7423906 | Integrated circuit having a memory cell A memory cell having a programmable solid state electrolyte layer, a writing line and a controllable switch that is arranged between the solid state electrolyte layer and the writing line. The controllable switch has a control input that is connected with a selectin... | 09/09/2008 |
| 7411811 | Semiconductor storage device In a semiconductor storage device with cross point type arrays of memory cells including variable resistor elements, a selected data line and unselected data lines are supplied with a row selecting potential and a row unselecting potential through a data line select... | 08/12/2008 |
| 7411803 | Resistive coupled hall effect sensor A memory device. There is a hall effect device, a current source in electrical communication with the hall effect device, a current drain in electrical communication with the hall effect device, a first sensor arm in electrical communication with the hall effect dev... | 08/12/2008 |
| 7405963 | Dynamic data restore in thyristor-based memory device A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the... | 07/29/2008 |
| 7397688 | Nonvolatile variable resistor, memory device, and scaling method of nonvolatile variable resistor Provided are a nonvolatile variable resistor with a structure capable of suppressing an increase in resistance in a case where scaling is applied to reduce a projected area on a plane, a memory device using the nonvolatile variable resistor, and a scaling method of ... | 07/08/2008 |
| 7397681 | Nonvolatile memory devices having enhanced bit line and/or word line driving capability Phase-changeable random access memory (PRAM) devices include a plurality of rows and columns of PRAM memory cells therein and at least one local bit line electrically coupled to a column of the PRAM memory cells. First and second bit line selection circuits are prov... | 07/08/2008 |
| 7382647 | Rectifying element for a crosspoint based memory array architecture An asymmetrically programmed memory material (such as a solid electrolyte material) is described for use as a rectifying element for driving symmetric or substantially symmetric resistive memory elements in a crosspoint memory architecture. A solid electrolyte eleme... | 06/03/2008 |
| 7376036 | Semiconductor device including fuse and method for testing the same capable of suppressing erroneous determination In a method for testing whether or not a fuse on a semiconductor substrate is disconnected, a first test operation is performed upon the fuse by determining whether or not a resistance value of the fuse is larger than a first threshold resistance value. Then, a seco... | 05/20/2008 |
| 7367119 | Method for forming a reinforced tip for a probe storage device Systems and methods in accordance with the present invention can include a tip contactable with a media. In an embodiment, the tip comprises a substantially hollow structure formed of a metal. The tip can be formed by depositing a first metal layer over silicon ther... | 05/06/2008 |
| 7366003 | Method of operating a complementary bit resistance memory sensor and method of operation A method and apparatus are disclosed for sensing the resistance state of a resistance-based memory element using complementary resistance-based elements, one holding the resistance state being sensed and the other holding a complementary resistance state. A sense am... | 04/29/2008 |
| 7365354 | Programmable resistance memory element and method for making same A programmable resistance memory element using a conductive sidewall layer as the bottom electrode. The programmable resistance memory material deposited over the top edge of the bottom electrode, in a slot-like opening of a dielectric material. A method of making t... | 04/29/2008 |
| 7366002 | Method and storage device for the permanent storage of data It is proposed that bitline inversion coding data be integrally stored in the structure of a column multiplexer of a storage device. For this purpose, connections to a predefined potential are selectively provided at connection points, which are respectively assigne... | 04/29/2008 |
| 7361924 | Non-volatile memory element and production method thereof and storage memory arrangement A nonvolatile memory element and associated production methods and memory element arrangements are presented. The nonvolatile memory element has a changeover material and a first and second electrically conductive electrode present at the changeover material. To red... | 04/22/2008 |
| 7358590 | Semiconductor device and driving method thereof A semiconductor device includes a memory with a simple structure, an inexpensive semiconductor device, a manufacturing method and a driving method thereof. One feature is that, in a memory which has a layer including an organic compound as a dielectric, by applying ... | 04/15/2008 |
| 7359230 | Nonvolatile memory device Provided is a nonvolatile memory device including: a storage element; a switching element electrically connected to the storage element; and a plurality of lead wirings electrically connected to the switching element, all of which are arranged on a substrate having ... | 04/15/2008 |
| 7358589 | Amorphous carbon metal-to-metal antifuse with adhesion promoting layers A metal-to-metal antifuse having a lower metal electrode, a lower thin adhesion promoting layer disposed over the lower metal electrode, an amorphous carbon antifuse material layer disposed over the thin adhesion promoting layer, an upper thin adhesion promoting lay... | 04/15/2008 |
| 7359227 | Shared address lines for crosspoint memory A crosspoint memory includes a shared address line. The shared address line may be coupled to cells above and below the address line in one embodiment. Voltage biasing may be utilized to select one cell, and to deselect another cell. In this way, each cell may be ma... | 04/15/2008 |
| 7349256 | Flash memory devices and methods of programming the same by overlapping programming operations for multiple mats A flash memory device is programmed by loading first data into a page buffer of a first mat. Second data is loaded into a page buffer of a second mat while programming the first data in a first memory block of the first mat. ... | 03/25/2008 |
| 7349235 | Non-volatile memory device A non-volatile memory device according to one embodiment includes a plurality of memory cells each comprising a magneto resistive element and a selection transistor, where the memory cells are arranged into a two dimensional array. A first interconnect line extends ... | 03/25/2008 |
| 7348653 | Resistive memory cell, method for forming the same and resistive memory array using the same A resistive memory cell employs a photoimageable switchable material, which is patternable by actinic irradiation and is reversibly switchable between distinguishable resistance states, as a memory element. Thus, the photoimageable switchable material is directly pa... | 03/25/2008 |
