An enclosure for small animals which is wearable on the front or back of an animate being.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7098408 | Techniques for mounting an area array package to a circuit board using an improved pad layout A circuit board assembly includes a printed circuit board (PCB). The PCB has a pad layout which includes a set of pads arranged in a two-dimensional array having at least two pads in a first direction and at least two pads in a second direction that is substantially... | 08/29/2006 |
| 7098531 | Jumper chip component and mounting structure therefor A jumper chip component of the present invention includes a connection conductor formed of a conductive layer over an upper face and opposite side faces of an insulating substrate, and a conductive material formed of a conductive layer between plates of the insulati... | 08/29/2006 |
| 7091588 | Semiconductor device including primary and secondary side circuits on first and second substrates with capacitive insulation A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while... | 08/15/2006 |
| 7088008 | Electronic package with optimized circuitization pattern An electronic package, such as a chip carrier, with an optimized circuit pattern having a circuitized substrate with a first and second circuit pattern is provided. The circuitized substrate includes a corner surface region. The second circuit pattern is electricall... | 08/08/2006 |
| 7087844 | Wiring circuit board The width of a particular part (A) of a strip conductor 2 of a wiring circuit board for mounting is reduced, wherein the strip conductor is exposed to form a stripe pattern, so that individual conductor can be connected to electrode E of an electronic compone... | 08/08/2006 |
| 7088002 | Interconnect An interconnect includes a pad and at least two vias coupled to the pad. In one embodiment, the pad has five substantially straight edges, one via directly coupled to the pad by being formed substantially beneath the pad, and one via coupled to one of the five subst... | 08/08/2006 |
| 7084353 | Techniques for mounting a circuit board component to a circuit board A circuit board has a layer of non-conductive material, and a set of soldering pads disposed on the layer of non-conductive material. The set of soldering pads defines a common axis that extends substantially through a midline of each soldering pad. Each soldering p... | 08/01/2006 |
| 7082039 | Slot arrangement motherboard assembly On a motherboard, a first slot for receiving a high-performance component that typically generates higher levels of heat and emissions is mounted next to a second slot for receiving a card that generates relatively lower levels of heat and emissions. The second slot... | 07/25/2006 |
| 7079400 | High-frequency circuit A high-frequency circuit comprises a substrate having an electronic component on an obverse side thereof, a first ground pattern formed on almost an entire reverse side of the substrate, a microstrip line formed on the obverse side of the substrate, and a bias line ... | 07/18/2006 |
| 7077692 | Devices and methods for mounting circuit elements The described embodiments provide devices and methods for creating an electrical connection in an electronic system. The devices and methods include a standoff that connects a circuit element with a circuit board and supports the circuit element at a sufficient heig... | 07/18/2006 |
| 7079399 | Printed circuit boards having improved solder pads A printed circuit board having improved solder pads for preventing from short circuit of the printed circuit board caused by axial leads (30, 31) of components engaging the circuit surrounding the soldering pad comprises a pair of through holes (10, 11... | 07/18/2006 |
| 7075179 | System for implementing a configurable integrated circuit The present invention provides a system for implementing a configurable integrated circuit (IC). Aspects of the invention include an IC die; a plurality of input/outputs (I/Os) coupled to the IC die; and a plurality power planes coupled to the IC die for providing p... | 07/11/2006 |
| 7071422 | Electronic circuit comprising conductive bridges and method for making such bridges The aim of this invention is to obtain a very cheap electronic circuit used for example in a card or a label while maintaining high reliability. It particularly concerns the connection of one or several electronic components on the conductive tracks by means of cond... | 07/04/2006 |
| 7071024 | Method for packaging a microelectronic device using on-die bond pad expansion Expanded bond pads are formed over a passivation layer on a semiconductor wafer before the wafer is diced into individual circuit chips. After dicing, the individual chips are packaged by fixing each chip within a package core and building up one or more metallizati... | 07/04/2006 |
| 7068521 | Semiconductor device In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connecte... | 06/27/2006 |
| 7064278 | Impedance matching connection scheme for high frequency circuits Methods and apparatus provide for electrical coupling of electrical components to traces on a substrate such that impedance mismatches otherwise experienced in high frequency operation are avoided. Connecting elements having length, width, and thickness, are provide... | 06/20/2006 |
| 7064431 | Electronic assembly having select spacing of rows and columns of contacts to allow for routing of traces to the contacts An electronic assembly is described, having a substrate and contacts on the substrate which are spaced and arranged in a manner that allows for a more dense arrangement of contacts but still allows for routing of traces between the contacts. ... | 06/20/2006 |
| 7064279 | Circuit board having an overlapping via A printed circuit board (100) includes a first BGA landing pad (102) having a first clearance zone (106) and a second BGA landing pad (104) having a second clearance zone (108). A via (110), overlaps the first clearance zone... | 06/20/2006 |
| 7064447 | Bond pad structure comprising multiple bond pads with metal overlap A bond pad structure comprising two bond pads, methods of forming the bond pad structure, an integrated circuit die incorporating the bond pad structure, and methods of using the bond pad structure are provided. Each of the bond pads comprise stacked metal layers, a... | 06/20/2006 |
| 7061095 | Printed circuit board conductor channeling A printed circuit board and a system and method of embedding conductor channels into a printed circuit board. These conductor channels are used to provided increased power to circuits on the printed circuit board, provide shielding for these circuits and provide com... | 06/13/2006 |
| 7060912 | Circuit board and method of making circuit board A circuit board comprises a board substrate including a substrate layer formed with a pad on an upper surface thereof, and a metal piece soldered on the pad. At least one through-hole including an internal wall formed with a conductive film is provided at a portion ... | 06/13/2006 |
| 7056014 | Flexible wired circuit board for temperature measurement A flexible wired circuit board for temperature measurement that can provide an accurate temperature measurement even when placed in a high-temperature atmosphere and can also be provided at a reduced cost. In the flexible wired circuit board for temperature measurem... | 06/06/2006 |
| 7057115 | Multilayered circuit board for high-speed, differential signals The present invention provides a circuit board having a differential signal pad pair consisting of a first signal pad and a second signal pad. The first signal pad has (i) a signal via extending therethrough for electrically connecting the first signal pad to a firs... | 06/06/2006 |
| 7052984 | Bump formation method and bump forming apparatus for semiconductor wafer A bump formation method and a bump forming apparatus for a semiconductor wafer are provided in which productivity when bumps are formed onto the semiconductor wafer is improved as compared with the conventional art. There are provided a bump forming head, a recognit... | 05/30/2006 |
| 7049527 | Conductor-pattern testing method, and electro-optical device A conductor pattern having both elongated conductors and a dummy pattern is formed on a substrate. The dummy pattern is formed of dummy conductors. The elongated conductors are typically transparent electrodes. The dummy pattern is so configured that each of the dum... | 05/23/2006 |
| 7049705 | Chip structure A chip structure can reduce the phenomenon of overcrowding current at the conventional circular opening of the passivation layer and further causing electromigration when the current flows to the bonding pad via the transmission line. The improved structure for the ... | 05/23/2006 |
| 7051308 | Method and apparatus for integrated circuit design with library cells Methods are apparatuses are disclosed for library cells for designing an integrated circuit. Various embodiments cover one or more of virtual buses; virtual tap cells; placement primarily for electrical coupling to a well or substrate; placement at a granularity lev... | 05/23/2006 |
| 7045386 | Semiconductor device and semiconductor chip for use therein A semiconductor device has a first semiconductor chip and a second semiconductor chip superposed on and bonded to the surface of the first semiconductor chip. In the region on the first semiconductor chip where the second semiconductor chip is bonded thereto, connec... | 05/16/2006 |
| 7045902 | Circuitized substrate for fixing solder beads on pads A circuitized substrate has contact pads for mounting a Surface Mount Device (SMD). First and second contact pads are located on a surface of the substrate corresponding to a first terminal and a second terminal of the SMD. The first and the second contact pads have... | 05/16/2006 |
| 7040900 | Main board A main board with a base comprising a first port and a second port parallel to each other and with a gap formed therebetween. First and second connectors are selectively disposed on the base. When the first connector is disposed on the base, a first distance is form... | 05/09/2006 |
| 7042069 | Semiconductor device and method of manufacturing same, wiring board, electronic module, and electronic instrument A plurality of leads includes a plurality of lead groups, each of which are formed of at least two first leads, and a plurality of second leads. Each of the second leads is positioned between an adjacent pair of the lead groups. Each of an outermost pair of the firs... | 05/09/2006 |
| 7038555 | Printed wiring board for controlling signal transmission using paired inductance and capacitance In a printed wiring board in which wiring patterns for interconnecting a plurality of integrated circuits (ICs) operating with synchronizing signals, in order to make signal transmission times between a plurality of IC's the same, consecutively formed pairs of an in... | 05/02/2006 |
| 7036218 | Method for producing a wafer interposer for use in a wafer interposer assembly A method for producing a wafer interposer (210) for use in a wafer interposer assembly is disclosed. The wafer interposer (210) is produced by attaching solder bumps (140) to a lower surface of a support (120). First electrical terminals ... | 05/02/2006 |
| 7036712 | Methods to couple integrated circuit packages to bonding pads having vias The electrical contacts of an integrated circuit package are coupled to printed circuit board bonding pads that include vias having via channels. In one embodiment, a method for fabricating an electronic assembly utilizes a mask having at least one aperture that ove... | 05/02/2006 |
| 7038315 | Semiconductor chip package A semiconductor chip package that includes discrete conductive leads in electrical contact with bond pads on a semiconductor chip. This chip/lead assembly is encapsulated within an encapsulating material and electrode bumps are formed through the encapsulating mater... | 05/02/2006 |
| 7036217 | Methods of manufacturing via intersect pad for electronic components According to a method of mounting electronic components on a printed circuit board (PCB), the electrical contacts of the components are coupled to PCB bonding pads that are intersected by via pads. To minimize various defects encountered during solder reflow, while ... | 05/02/2006 |
| 7032298 | Apparatus for replacing defective PCB from PCB panel The present invention relates to an apparatus for replacing a defective PCB unit formed on a PCB panel with a nondefective PCB unit, in which the location of the nondefective PCB unit disposed on a location correcting table is corrected by a location correcting driv... | 04/25/2006 |
| 7034231 | Method for the manufacture of printed circuit boards with plated resistors A process is revealed whereby resistors can be manufactured integral with a printed circuit board by plating the resistors onto the insulative substrate. Uniformization of the insulative substrate through etching and oxidation of the plated resistor are discussed as... | 04/25/2006 |
| 7034544 | Methods for minimizing the impedance discontinuity between a conductive trace and a component and structures formed thereby Methods and apparatus that minimize the impedance discontinuity between a component and a signal trace is described. The methods and apparatus generally comprise at least one signal trace disposed on a dielectric layer, wherein the signal trace comprises a first wid... | 04/25/2006 |
| 7027307 | Clock routing in multiple channel modules and bus systems An apparatus is provided, which includes a memory interface circuit, a clock signal generating circuit, and a plurality of memory circuits. The memory circuits are operatively coupled and arranged in an order on a plurality of memory modules, such that the memory mo... | 04/11/2006 |