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| Number | Title | Issue Date |
| 7411605 | Apparatus for preventing image sticking of video display appliance and method thereof Disclosed is an apparatus for preventing image sticking of a video display appliance and method thereof that can effectively remove a black display region appearing on a border part of a display screen of the video display appliance when an image sticking function i... | 08/12/2008 |
| 7349027 | Scan converter The scan converter comprises first and second memories 3, 7, a frame memory 5; having a write period and a read period, a video data input circuit 2 for writing data at a first transfer rate into the memory 3, a video data output circuit ... | 03/25/2008 |
| 7336548 | Clock generating circuit with multiple modes of operation A clock generating circuit includes a phase comparison circuit that generates a delay control signal corresponding to the relative phases of an output clock signal and a reference clock signal. A voltage controlled delay circuit generates the delayed clock signal by... | 02/26/2008 |
| 7333789 | Wide-band modulation PLL, timing error correction system of wide-band modulation PLL, modulation timing error correction method and method for adjusting radio communication apparatus having wide-band modulation PLL A broadband modulation PLL includes a PLL portion containing a voltage controlled oscillator (101), a frequency divider (105), a phase comparator (104) and a loop filter (103). A frequency-dividing ratio of the frequency divider (105 | 02/19/2008 |
| 7317465 | Image display system and method A method of displaying an image may include receiving image data for the image, and defining first and second sub-frames of the image. The first and second sub-frames may have corresponding pluralities of image elements, with each image element of the second sub-fra... | 01/08/2008 |
| 7305179 | Anti-shake apparatus An anti-shake apparatus of a photographing apparatus comprises a movable unit, and a control apparatus. The movable unit has an imaging device, and can be moved in first and second directions. The control apparatus moves the movable unit to first, second, third, and... | 12/04/2007 |
| 7277133 | Adjusting pixel clock A pixel clock frequency is adjusted in response to periodically monitoring the relative positions between a video signal to be displayed and a video signal captured. Image shear of the display signal may be avoided quickly. Adjustments are made to the color burst si... | 10/02/2007 |
| 7274382 | Customizable background sizes and controls for changing background size This invention provides systems and methods that allow a user to change the size of a background used with a graphics-based user interface. This enables tailored background sizes based on user preference and allowable conditions, which are particularly useful with d... | 09/25/2007 |
| 7274406 | Equilibrium based vertical sync phase lock loop for video decoder The present invention discloses a PLL (90), which may be implemented in software, hardware, or a combination of software and hardware, which comprises a sync detector (92) adapted to output a phase error (152), a vertical sync discrete time osci... | 09/25/2007 |
| 7262806 | System and method for aligned compression of interlaced video A method and system are disclosed for vertically phase shifting fields of at least one interlaced frame of video into at least two vertically aligned frames of video. The at least two vertically aligned frames of video are compressed, transmitted or stored, decompre... | 08/28/2007 |
| 7250980 | Automatic detection of sync polarity in video timing and generation of blanking period indicator from sync information The present invention relates to a system and method for generating a blanking period indicator signal from sync information in video timing. The invention comprises an auto polarity detect processor adapted to automatically detect the polarity of at least one sync ... | 07/31/2007 |
| 7239355 | Method of frame synchronization when scaling video and video scaling apparatus thereof A video scaling apparatus includes a receiver for receiving incoming video signals having transmitted therein a plurality of incoming frames, each incoming frame having a first plurality of synchronization signals for indicating lines in the incoming frame; a scaler... | 07/03/2007 |
| 7215378 | Method for centering and dimensioning an image on a cathode-ray tube A method for centering and dimensioning an image on a cathode ray tube receiving display signals supplied by a display calculator includes measuring durations of vertical black edges of the image, and modifying adjustment values for a horizontal centering of the ima... | 05/08/2007 |
| 7206029 | Picture-in-picture repositioning and/or resizing based on video content analysis A video display device, such as a television, having a picture-in-picture (PIP) display and a processor. The processor detects cues, such as color/texture/events/behaviors, etc., present in a primary display image, that is overlaid by the PIP. These cues are utilize... | 04/17/2007 |
| 7202870 | Display controller provided with dynamic output clock The present invention provides a display controller for scaling an input source image. The display controller dynamically adjusts the output clock so line buffer requirement is reduced to a minimum to balance input and output image timing for image scaling or non-sc... | 04/10/2007 |
| 7180491 | Application and method for rejection of a false data enable signal during vertical blanking periods in a graphics system A false DE rejection system is described. DEs are ignored during a programmable vertical lockout period. Internal timing is used during the vertical lockout period to count the number of vertical lines to ignore. The first DE received after the vertical lockout peri... | 02/20/2007 |
| 7180550 | Video reproducing apparatus and method and apparatus and method for adjusting horizontal synchronous signal A video signal reproducing apparatus and method for adjusting a change in a horizontal synchronous signal. The video signal reproducing apparatus transforms a format of an input video signal, generates horizontal and vertical synchronous signals, and displays the vi... | 02/20/2007 |
| 7173629 | Image processor with the closed caption function and image processing method A memory control unit adjusts and sets the address of an image data area in the memory space of a memory and the address of a window area adjacent to the memory area, using a memory controller. The memory control unit stores data, other than image data that is suppl... | 02/06/2007 |
| 7141942 | Digital device for correcting the image formed on the screen of a cathode ray tube Device for correcting the line and/or frame fields of a deflector for cathode ray tube comprising: a current sensor for evaluating the value of a line current Il a series of comparators intended to compare the value of the line current Il w... | 11/28/2006 |
| 7130226 | Clock generating circuit with multiple modes of operation A clock generating circuit includes a phase comparison circuit that generates a delay control signal corresponding to the relative phases of an output clock signal and a reference clock signal. A voltage controlled delay circuit generates the delayed clock signal by... | 10/31/2006 |
| 7102613 | Low cost vertical visual indicator system for on screen displays A circuit has been shown to illustrate how a vertical indicator can be generated in logic for a simplified OSD generator. The vertical visual indicator generated uses little microcontroller firmware overhead allowing a less powerful microcontroller to be used in the... | 09/05/2006 |
| 7095446 | Method and device for phase correction of a vertically distorted digital image A device for correcting the phase of a vertically distorted digital picture receives picture data and a vertical phase correction signal, and assigns lines of the digital picture to a first half picture and to a second half picture. The lines of the second half pict... | 08/22/2006 |
| 7079807 | Substantially integrated digital network and broadcast radio method and apparatus A multimedia system which substantially integrates analog functions normally found in consumer radios (radio frequency tuner functions, volume functions), and information streams from a digital network in a single design. The system may include an Ethernet interface... | 07/18/2006 |
| 7079129 | Image processing device An inexpensive and simple circuit for improving the quality of a dynamic image, with appropriate, flexible dynamic image qualities processing, even with plural input signal sources. A memory unit has a region for storing images of at least one screen, and a memory c... | 07/18/2006 |
| 7061545 | Method for displaying menu of TV A method for displaying a menu of a TV is disclosed, in which icons and characters are prevented, to the utmost, from being transformed in a screen mode having a variable width, such as a double window mode or a PIP mode, so that meanings of the icons and characters... | 06/13/2006 |
| 7061544 | Digital television receiver for receiving a digital television broadcast signal and simultaneously displaying a video picture and information contained therein A digital television receiver includes a CS receive circuit (12). This CS receive circuit receives a digital television broadcast signal. The digital television broadcast signal contains video data from which first video data is created as well as EPG data fr... | 06/13/2006 |
| 7061540 | Programmable display timing generator A display timing generator is provided for selecting line types and providing synchronization timing signals for video signals. The display timing generator provides programmability for the user to select line types for a frame to be displayed on a display. The line... | 06/13/2006 |
| 7053959 | Digital video encoder A mask circuit masks a digital video signal so that a video signal of an analog video signal is not outputted for a predetermined period after the start of output of a horizontal synchronizing signal of the analog video signal. A period of masking the digital video ... | 05/30/2006 |
| 7034817 | Method and device of alignment of a video image with an edge of a display screen The aligning a video image with an edge of a display screen, the video image being displayed by a scanning of lines of the display screen by at least one electron beam modulated by a modulation signal, including, for each scanned line of the screen, storing successi... | 04/25/2006 |
| 7034811 | Image display system and method A method of displaying an image with a display device including a plurality of display pixels includes receiving image data for the image, the image data including individual pixels of the image; buffering the image data and creating a frame of the image, the frame ... | 04/25/2006 |
| 7034812 | Method and apparatus of automatically tuning output line rate and display controller provided with the same A method and apparatus for automatically tuning the output line rate thereof and a display controller provided with the same. The display controller of the present invention provides a display controller having a line buffer, an input means, an output means, a statu... | 04/25/2006 |
| 7015974 | OSD (on screen display) object display method and apparatus An OSD object display apparatus and a method therefor are provided, wherein an OSD source transmits OSD display data to a display apparatus by giving each peculiar ID in at least more than one OSD object unit, said display apparatus stores at least more than one rec... | 03/21/2006 |
| 7003062 | Method and system for distribution of clock and frame synchronization information The present invention discloses a method and system for synchronizing processing modules. More specifically the present invention utilizes a master clock signal and associated synchronization information to coordinate the function dictated by packets within a synchr... | 02/21/2006 |
| 6947060 | Image forming apparatus, electron beam apparatus, modulation circuit, and image-forming apparatus driving method An image forming apparatus which performs pulsewidth modulation with a pulsewidth set by counting a clock. Especially, for grayscale level correction by setting the frequency of the clock, the periodic clock is counted, and an output pattern is changed in accordance... | 09/20/2005 |
| 6943844 | Adjusting pixel clock A pixel clock frequency is adjusted in response to periodically monitoring the relative positions between a video signal to be displayed and a video signal captured. Image shear of the display signal may be avoided quickly. Adjustments are made to the color burst si... | 09/13/2005 |
| 6937076 | Clock synchronizing apparatus and method using frequency dependent variable delay A clock signal generator providing an output clock signal synchronized with an input clock signal having an input clock frequency including a frequency dependent variable delay line to accommodate a wide range of operating frequencies. A clock signal synchronized wi... | 08/30/2005 |
| 6930524 | Dual-phase delay-locked loop circuit and method A delay-locked loop includes a clock multiplier that generates a multiplied clock signal responsive to an input clock signal. The multiplied clock signal has a frequency that is a multiple of a frequency of the input clock signal. A variable delay circuit generates ... | 08/16/2005 |
| 6927801 | Video signal processing apparatus and video displaying apparatus A video signal processing apparatus processes input video signals. A video signal source supplies the input video signals carrying at least a first video signal that is an interlaced signal having 480 effective scanning lines and a second video signal that is an int... | 08/09/2005 |
| 6927767 | Picture display apparatus A picture display apparatus for displaying a picture in response to inputted picture signals of an arbitrary format. The apparatus includes a picture display unit having an arranged matrix of dots for picture display, a picture display unit drive for converting inpu... | 08/09/2005 |
| 6924686 | Synchronous mirror delay (SMD) circuit and method including a counter and reduced size bi-directional delay line A synchronous mirror delay (SMD)includes a model delay line that is coupled to a bi-directional delay line. In operation, an initial edge an input clock signal is applied through the model delay line to the bi-directional delay line. The SMD thereafter operates in a... | 08/02/2005 |
