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| Number | Title | Issue Date |
| 8111326 | Post-capture generation of synchronization points for audio to synchronize video portions captured at multiple cameras Embodiments of the invention relate generally to computing devices and systems, software, computer programs, applications, and user interfaces, and more particularly, to synchronizing portions of video as a function of the post-capture generation of synchronization ... | 02/07/2012 |
| 7995143 | Wireless video link synchronization The present invention provides a method and apparatus for synchronizing wireless video data. The method involves first synchronizing the pixel clock of a video output device with the pixel clock of a video input device. This is accomplished by latching video counter... | 08/09/2011 |
| 7893996 | Video switcher and video switching method A video switcher includes: a video signal switching device for switching a video signal to be transmitted to a video display unit from a first video signal supplied from a first video input unit into a second video signal supplied from a second video input unit; and... | 02/22/2011 |
| 7667774 | Video switcher and video switching method A video switcher includes: a video signal switching device for switching a video signal to be transmitted to a video display unit from a first video signal supplied from a first video input unit into a second video signal supplied from a second video input unit; and... | 02/23/2010 |
| 7663697 | Sync-threshold adjust An apparatus, system, and method for determining an operational threshold level for distinguishing between video data and synchronization data in a video signal, are described herein. ... | 02/16/2010 |
| 7623185 | Synchronization control apparatus and method A synchronization control apparatus for driving a display module in an interlacing scan mode includes: a delay circuit for delaying an input vertical sync (IVS) signal to generate a delayed signal; and a multiplexer coupled to the delay circuit for selecting one of ... | 11/24/2009 |
| 7602444 | Synchronization signal detection circuit and method of digital television (DTV) receiver A synchronization signal detection circuit and method of a digital TV (DTV) receiver are provided. The synchronization signal detection circuit determines a precise main path by determining powers in consideration of the influence of multiple paths near signals loca... | 10/13/2009 |
| 7511762 | Generation of a frame synchronized clock for a wireless video receiver An apparatus for receiving essentially uncompressed HDTV video must generate an accurate pixel-rate clock to enable the reconstruction of a video frame. The clock pixel-rate generated must match a received video pixel-rate. In such system, signals for generation of ... | 03/31/2009 |
| 7440702 | Method for transmitting digital image signal, digital image transmitting device, digital image sending device and digital image receiver A multiplexer of a transmission section generates a clock signal by multiplying a reference clock signal of a digital image signal by a predetermined number âKâ. A parallel digital image signal is converted into a serial digital signal on the basis of the clock ... | 10/21/2008 |
| RE40396 | Method for detecting and separating vertical and horizonal synchronous signals from computer system A method for detecting and separating vertical and horizontal synchronous signals from a computer system. The input forms of the vertical and horizontal synchronous signals from the computer system are detected by scanning a vertical synchronous signal terminal, a h... | 06/24/2008 |
| 7391960 | DV format capable recording and reproduction device and method Audio DIF blocks containing audio data and video DIF blocks containing video data are extracted by an audio/video extracting unit and respectively recorded in separate storage areas of an HDD. System data and audio auxiliary data are extracted by a system data recon... | 06/24/2008 |
| 7391836 | System and method for synchronous clock re-generation from a non-synchronous interface A system and method transmits data received at varying frequencies at a fixed data rate. The frequency dependent data and associated data clock signal are received and the frequency dependent data is converted to frequency independent data. A ratio of a number of da... | 06/24/2008 |
| 7382333 | Display processing switching construct utilized in information device A display processing construct utilized in information device, discloses a first and a second display processing devices. The display signal outputs from the first and second display processing devices are against the switches separately, wherein the switching of sw... | 06/03/2008 |
| 7365797 | Display synchronization signal generation apparatus in digital broadcast receiver and decoder A display synchronization signal generation apparatus and method is provided which makes it possible to display a stable image irrespective of changes in transmission speed of a received digital broadcast signal by generating a synchronization signal of an image to ... | 04/29/2008 |
| 7362838 | Synchronization method and system, and decoder In a system for encoding, transmitting, and decoding data in real time, irrespective of the jittering in a transmission path and the encoding bit rate used, synchronization is established between encoder end decoder ends with ease and reliability in the present inve... | 04/22/2008 |
| 7362319 | Method and apparatus for auto-generation of horizontal synchronization of an analog signal to a digital display Determining a horizontal resolution and a phase of an analog video signal arranged to display a number of scan lines each formed of a number of pixels is described. A number of initialization values are set where at least one of the initialization values is a curren... | 04/22/2008 |
| 7356021 | Increasing the throughput of voice over internet protocol data on wireless local area networks A system and method are provided for improving the throughput of wireless networks, such as IEEE 802.11 networks. Individual devices in the network determine the level of activity on the network. In the event that the network is active, the devices increase throughp... | 04/08/2008 |
| 7356618 | Method and system for synchronizing platform clocks in a distributed wireless platform According to one embodiment of the present invention, a novel method and system are disclosed. In one embodiment, a first node records a first node local time of receiving a wirelessly transmitted packet, the first node local time recorded with a monotonically incre... | 04/08/2008 |
| 7349027 | Scan converter The scan converter comprises first and second memories 3, 7, a frame memory 5; having a write period and a read period, a video data input circuit 2 for writing data at a first transfer rate into the memory 3, a video data output circuit ... | 03/25/2008 |
| 7342603 | Image output test system and method and device thereof The present invention is to provide an image output test system, which is built in between an image output device and an image output test device, in which the image output test device can receive a first video signal, convert the first video signal into a second vi... | 03/11/2008 |
| 7342945 | Data time difference absorbing circuit and data receiving method and device A data time difference absorbing circuit comprises a memory (36) in which first digital data containing first time reference code data are stored and from which the first digital data are read, a memory (37) in which second digital data containing seco... | 03/11/2008 |
| 7336751 | Power control circuit and radio transmission apparatus The invention relates to power control of a cellular mobile communication system using TPC, and a power control circuit in a base station set and a radio terminal is equipped with a synchronism detecting unit for detecting synchronism data indicating synchronism est... | 02/26/2008 |
| 7333576 | Digital demodulation device and synchronization detecting method A synchronization error occurs when a DTV signal is distorted on a transmission path and this deteriorates demodulation capability. The digital demodulation device and the synchronization detecting method of the invention can correct the synchronization position whe... | 02/19/2008 |
| 7333468 | Digital phase locked loops for packet stream rate matching and restamping A packet stream multiplexer may include one or more control loops (e.g., digital phase locked loops) for tracking the source clock frequency associated with a packet stream. A first control loop may slowly drive an error between a received timestamp and an estimated... | 02/19/2008 |
| 7333519 | Method of manually fine tuning audio synchronization of a home network A method is provided for manually synchronizing the playback of a digital audio broadcast on a plurality of network output devices. The method is applicable for use with methods such as those that use a time code, insert a control track pulse, or use an audio wavefo... | 02/19/2008 |
| 7321403 | Video signal transmitting/receiving system In a transmitting section for a video signal transmitting/receiving system for transmitting digital video signals using a plurality of transmission channels, video guard band signals are inserted into video signals associated with the transmission channels immediate... | 01/22/2008 |
| 7310120 | Receiver of analogue video signal having means for analogue video signal conversion and method for control of display of video frames A receiver of analogue video signal having means for analogue video signal conversion has a receiving block (201) for receiving a first analogue video signal, a conversion block (202) for conversion of the first analogue signal into a digital signal, a... | 12/18/2007 |
| 7304676 | Timing generator for electronic image sensor with tables that control line and frame timing A timing generator for an electronic image sensor includes one or more memory based tables for controlling timing events that occur within one or more different types of image sensor lines, and one or more memory based tables for controlling timing events that occur... | 12/04/2007 |
| 7301971 | Method and apparatus for continuous synchronization of a plurality of asynchronous data sources An apparatus and method for continuous synchronization of a pair of independently clocked asynchronous data streams (100, 101) consisting of raster data from independent imaging acquisition systems comprises a means for acquiring individual rasters from a fir... | 11/27/2007 |
| 7295248 | External synchronous signal generating circuit and phase difference measuring circuit An external synchronous signal circuit comprises: means for measuring a phase difference between the external frame synchronous signal (FRM_SYNC) and the frame synchronous signal (FRM) of the digital video signal; means for generating a signal (EXT_H) having the sam... | 11/13/2007 |
| 7295247 | Synchronisation of audio and video signals The present invention relates to adaptive time-shifting of audio frames (Fa) in encoded audio signal relative to video frames (Fv) in encoded video signal, which together form an audio/video message steam such that the corresponding decoded aud... | 11/13/2007 |
| 7277133 | Adjusting pixel clock A pixel clock frequency is adjusted in response to periodically monitoring the relative positions between a video signal to be displayed and a video signal captured. Image shear of the display signal may be avoided quickly. Adjustments are made to the color burst si... | 10/02/2007 |
| 7268825 | Digital synchronizing generator A sync generator (genlock) (10) for frequency and phase locking an incoming video signal to a system clock (12) includes a digitizer (16, 22) for digitizing the incoming video signal to yield a digitized color sub-carrier burst component. A nume... | 09/11/2007 |
| 7266286 | Editing system and method and distribution medium Temporarily storing audio data to be reproduced in the block form, temporarily storing synthesized audio data in the block form, generating and supplying a reference signal, and calculating the first address of the block of audio data, the editing system of the pres... | 09/04/2007 |
| 7242436 | Selection methodology of de-interlacing algorithm of dynamic image The present invention provides a selection methodology of de-interlacing algorithm of dynamic image, comprising detecting hardware resource of player system. When hardware resource of player system corresponds to the executing condition of algorithm of line-segment ... | 07/10/2007 |
| 7242437 | Compressed timing indicators for media samples A first frame of data is encoded and a first timestamp associated with the first frame of data is generated. The first timestamp includes complete timing information. The first frame of data and the associated first timestamp is transmitted to a destination. A secon... | 07/10/2007 |
| 7239355 | Method of frame synchronization when scaling video and video scaling apparatus thereof A video scaling apparatus includes a receiver for receiving incoming video signals having transmitted therein a plurality of incoming frames, each incoming frame having a first plurality of synchronization signals for indicating lines in the incoming frame; a scaler... | 07/03/2007 |
| 7236026 | Circuit for and method of generating a frequency aligned clock signal A circuit for generating a clock signal which is frequency aligned with a reference clock signal is disclosed. The circuit comprises a phase detector coupled to receive the reference clock signal and the generated clock signal. A frequency alignment circuit generate... | 06/26/2007 |
| 7230651 | A/V decoder having a clocking scheme that is independent of input data streams Devices and methods are disclosed for decoding data in a data stream. One embodiment relates to a method of decoding data using an A/V decoder. In this embodiment, timing information is recovered from the input stream. The output rate of an output stream is adjusted... | 06/12/2007 |
| 7227386 | Phase locked loop lock-detection circuit An improved clock lock detection circuit is disclosed. The circuit has a first input indicating an edge of a first clock and a second input indicating a corresponding edge of a second clock wherein the second clock is expected to be synchronized with the first clock... | 06/05/2007 |
