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...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 4851834 | Multiport memory and source arrangement for pixel information The present system includes, in a preferred embodiment, a plurality of bit map memory units which together define a large bit map memory. For each bit map memory unit there is also included a mask means and four extended shift registers. The shift registe... | 07/25/1989 |
| 4823281 | Color graphic processor for performing logical operations A color graphic processor includes one or more processing elements responsive to pixel data provided by a frame buffer. The processing element stores pixels from the frame buffer in source and destination registers. The arithmetic logic unit (ALU) portion... | 04/18/1989 |
| 4816817 | Line mover for bit-mapped display The pixel contents of a frame buffer scan line segment are moved from a source location to a destination location by reading fields of the source segment into a source data shift register and fields of the destination segment into a destination data shift... | 03/28/1989 |
| 4808986 | Graphics display system with memory array access A graphics display system including a circuit that receives graphics information to be displayed and a memory that stores the graphics information in a memory array that includes a portion that directly corresponds to the image area for display. The memor... | 02/28/1989 |
| 4789960 | Dual port video memory system having semi-synchronous data input and data output A dual port video memory system includes a serial-to-parallel converter coupled to the input data port and a parallel-to-serial converter coupled to the output data port. Four-bit pixel values are clocked into the serial-to-parallel converter synchronous ... | 12/06/1988 |
| 4783652 | Raster display controller with variable spatial resolution and pixel data depth A display controller provides multiple different resolutions by selectively enabling different combinations of shift registers between the frame buffer and video look-up tables (VLTs). The VLTs are partitioned, with different partitions being programmed i... | 11/08/1988 |
| 4771279 | Dual clock shift register YA dual clock shift register for use in a computer display system for converting a higher resolution image for a computer screen to a lower resolution image for display on a lower resolution display apparatus. The dual clock shift register includes a firs... | 09/13/1988 |
| 4745577 | Semiconductor memory device with shift registers for high speed reading and writing A semiconductor memory device with shift registers used for a video RAM, including a memory cell array, bit lines, and word lines, a pair of shift registers, and transfer gate circuits arranged between the bit lines and the shift registers. Each parallel ... | 05/17/1988 |
| 4733376 | Semiconductor memory device having serial data input circuit and serial data output circuit A semiconductor memory device including a memory cell array 1, a serial data input circuit for high-speed, large data store in memory cells and a serial data output circuit for high-speed, large data read-out from the memory cells. The serial data input c... | 03/22/1988 |
| 4706079 | Raster scan digital display system with digital comparator means In a bit mapped raster scan digital display system, a number of maps each contain a single component of the display data and are read together to provide sets of bytes, each set representing eight pel defining groups. A compare system is provided for dete... | 11/10/1987 |
| 4695967 | High speed memory access circuit of CRT display unit A high speed memory access circuit of a CRT display unit generates address signals from a memory cycle controller (20) based on an external write signal provided from the exterior and supplies the address signals to a frame memory (8) structured by dynami... | 09/22/1987 |
| 4683555 | Serial accessed semiconductor memory with reconfigureable shift registers A semiconductor memory is comprised of four arrays (10), (12), (14) and (16) that have the memory elements therein arranged in accordance with pixel positions on a display. The memory arrays have associated shift registers (34), (36), (38) and (40) which ... | 07/28/1987 |
| 4677432 | Display apparatus Display data is read out from a display memory (2) and the display data thus read out is written in the buffer memory (8). Then, in a time sharing manner relative to the writing, the display data is read out from the buffer memory (8), and a smoothing pro... | 06/30/1987 |
| 4673930 | Improved memory control for a scanning CRT visual display system A scanning CRT graphics video display system is disclosed in which a graphics display controller reads formatted information signals into a refresh memory in a read-modify-wire mode and reads the stored information out of the refresh memory in a display m... | 06/16/1987 |
| 4670745 | Video display address generator A video raster display system having a dedicated display address generator is provided. In addition to a microprocessor contained within the video display system providing addresses to a memory the display address generator also generates addresses. The d... | 06/02/1987 |
| 4663735 | Random/serial access mode selection circuit for a video memory system In a video computer system, an improved memory circuit is provided which is effective for delivering stored data only at appropriate instances, and which is also simpler and more reliable in design. In particular, the system preferably includes a bit-mapp... | 05/05/1987 |
| 4648050 | Color index conversion system in graphic display device A color graphic display device for converting color index data read out from a plurality of frame memories to color information on a screen so as to perform graphic display has a first register for holding a group number determined in accordance with a co... | 03/03/1987 |
| 4644464 | Graph manager for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes A parallel register-transfer mechanism and control section have been disclosed above for use in a reduction process for the evaluation of expressions of a variable-free applicative language stored as binary directed graphs. The expressions are reduced thr... | 02/17/1987 |
| 4644502 | Semiconductor memory device typically used as a video ram A semiconductor memory device used, for example, for a video RAM device which stores picture data and which is used in a video display device, etc. The semiconductor memory device includes an internal address generating circuit which sequentially generate... | 02/17/1987 |
| 4639890 | Video display system using memory with parallel and serial access employing selectable cascaded serial shift registers In a computer system, an improved memory circuit is provided for accomodating video display circuits with CRT screens having different resolutions. The memory circuit includes a bit-mapped RAM unit or chip having sufficient cells to accomodate any CRT scr... | 01/27/1987 |
| 4620289 | Video display system In this apparatus, a composite memory 5 includes a managing memory (5g) containing for each line of the frame to be displayed, a word made up of information relating to the composition of the line in question. This information can define a base color, the... | 10/28/1986 |
| 4595917 | Data processing technique for computer color graphic system A frame buffer, divided into three bit planes, is addressed by a single grahic display control chip, whose address signal is altered by an adder to address each bit plane at successive, prescribed time intervals during a single display cycle. A data word ... | 06/17/1986 |
| 4591842 | Apparatus for controlling the background and foreground colors displayed by raster graphic system Apparatus for controlling the colors displayed by a raster graphic system. Information stored at each addressable location of a RAM includes a set of behavior bits and a set of control bits. These bits are read out of memory during each memory read cycle.... | 05/27/1986 |
| 4575717 | Logic for increasing the number of pixels in a horizontal scan of a bit mapping type video display A circuit (FIG. 2), for use with a basic display system (FIG. 1), increases by an integral factor M the number (X) of character pixels per display line without changing the rates of clock pulse trains (Sx (fx), S1 (f1... | 03/11/1986 |
| 4491935 | Scan-out system A shift register which is formed by a memory, the number of shift stages of the shift register is determined by the count value of a counter and designating a read address of the memory by a value obtained by subtracting an arbitrary constant from the cou... | 01/01/1985 |
| 4449201 | Geometric processing system utilizing multiple identical processors A graphic display system uses a plurality of identical processor units each of which is controlled by microcode to perform a particular function in transforming, clipping, and scaling geometric data for presentation on a display. Each processor includes a... | 05/15/1984 |
| 4445186 | Underwater mapping apparatus and method A method and apparatus for producing a linear plan view display of a seabed, employing a side scan sonar signal system, have circuitry for repeatedly determining the height of the transmitting source relative to the seabed, circuitry for sampling the retu... | 04/24/1984 |
| 4225929 | Code converter circuitry system for selectively rotating a video display picture A code conversion circuit especially suited for, but not limited to, use with a video display apparatus of a type in which the screen is arbitrarily divided into plural domains defined by horizontal scan lines, Xi, and vertical section lines, Y... | 09/30/1980 |
| 4099259 | Data stores and data storage system In a Teletext transmission system, data is transmitted in digital form during lines in the field blanking period of a composite video signal of a television transmission. On reception, the information is decoded and utilized to provide a display comprisin... | 07/04/1978 |
| 4099258 | System of data storage In a Teletext transmission system data is transmitted in digital form during lines in the field blanking period of the composite video signal of a television transmission. On reception the information is decoded to generate a display comprising a page hav... | 07/04/1978 |
| 3952296 | Video signal generating apparatus with separate and simultaneous processing of odd and even video bits A system for generating video information on a display medium which is characterized by a character generation of high quality, variant font definition, and font character off-set. The character generating means within the system provides means for select... | 04/20/1976 |
