Bizarre Patents
Mountable Printable Placard With Headband
A resilient headband in a shape for being mounted on the head of the user. The headband is equipped with a longitudinal slotted member for holding a placard.
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| Number | Title | Issue Date |
| 7427989 | Raster engine with multiple color depth digital display interface An improved raster engine adapted to render video data from a frame buffer to one of a plurality of disparate displays is disclosed which comprises an integral bounded video signature analyzer, a hardware cursor apparatus supporting dual scanned displays, programmat... | 09/23/2008 |
| 7349027 | Scan converter The scan converter comprises first and second memories 3, 7, a frame memory 5; having a write period and a read period, a video data input circuit 2 for writing data at a first transfer rate into the memory 3, a video data output circuit ... | 03/25/2008 |
| 7336275 | Pseudo random number generator and method A pseudo random number generator that generates a plurality of intermediate values, where each successive intermediate value is based, at least in part, on one of the succeeding intermediate values, where a final value based on a subset of the plurality of intermedi... | 02/26/2008 |
| 7313764 | Method and apparatus to accelerate scrolling for buffered windows Methods and apparatuses to accelerate scrolling for buffered windows. In one aspect of the invention, a method to scroll a buffered window on a data processing system includes: determining a second region of a second pixel image of a window in a frame buffer, which ... | 12/25/2007 |
| 7295219 | Display driver chips and methods having reduced storage of image data and/or on-screen display (OSD) data Image data and/or On-Screen Display (OSD) data is generated for display on a display having rows of pixels by repeatedly combining a portion of the OSD data and a portion of the display data in a display driver chip without storing more than the portion of the displ... | 11/13/2007 |
| 7295246 | Picture signal processing circuit In a picture signal processing circuit, in the case of converting picture signal data compliant with an analog video standard to a digital video format to obtain progressive data of a digital value, in a line which is included in a picture display period (active per... | 11/13/2007 |
| 7292209 | System and method of driving an array of optical elements A system and/or method for controlling a display array without the use of row and column drivers. The display elements within the system are configured to maintain an active address signal in response to a received signal containing serially encoded display settings... | 11/06/2007 |
| 7286720 | Image processing apparatus, image input/output apparatus, scaling method and memory control method The present invention relates to an image processing apparatus, an image input/output apparatus, a scaling method and a memory control method, by which input image data is written to an external memory in tiles, the tiles written to the external memory are read, and... | 10/23/2007 |
| 7284262 | Receiver/decoder and method of processing video data A method of processing video data in a receiver/decoder including at least one port (31) for receiving data and memory means (40) including a data buffer area (45A0, 45A1) for storing incoming data for display, and a... | 10/16/2007 |
| 7265741 | Display apparatus and display apparatus drive method An EPG extraction portion extracts EPG information; a program type decision portion decides the type of broadcast program using the extracted EPG information, and outputs a ratio modification signal to change the ratio of the image display interval to the black disp... | 09/04/2007 |
| 7256790 | Video and graphics system with MPEG specific data transfer commands A video and graphics system includes a video decoding system for processing compressed video data. The compressed video data includes MPEG-2 video data containing SDTV video data or HDTV video data. The video decoding system includes a video decoder for processing t... | 08/14/2007 |
| 7215708 | Resolution downscaling of video images A method and apparatus for downscaling video images to a lower resolution (e.g. from HDTV to SDTV) is presented. The method comprising the steps of frequency domain anti-aliasing filtering and downscaling the first video signal in a first direction corresponding wit... | 05/08/2007 |
| 7173635 | Remote graphical user interface support using a graphics processing unit Methods, apparatus and systems for the display, on a remote node, of a three-dimensional (3D) image rendered on a host system in a first image format are described. In general, the 3D image is transformed into a second image format that is compressed (i.e., uses few... | 02/06/2007 |
| 7149129 | Memory output data systems and methods with feedback Systems and methods provide output data from a memory. For example, in accordance with an embodiment of the present invention, techniques are disclosed for providing glitch-free output data from a memory through feedback of the output data signal. ... | 12/12/2006 |
| 7106337 | Portable digital graphic processing device The present invention discloses a portable digital graphic processing device having the required graphic processing capability by adopting the advanced multi-chip packaging technology and intelligent stick memory card packaging technology to integrate the graphic pr... | 09/12/2006 |
| 7088369 | Checkerboard buffer using two-dimensional buffer pages and using bit-field addressing Methods and apparatus for storing and retrieving data. In one implementation, a system includes: a data source, providing data in a first order; a data destination, receiving data in a second order; memory devices having memory pages, data stored in parallel and ret... | 08/08/2006 |
| 7075538 | Methods and apparatus for faster line drawing on remote displays The present invention provides methods and apparatus for a computer network system to provide compact and efficient representations of graphics commands on drawing/displaying lines, circles, etc. The methods and apparatus exploit the redundancies and/or relations of... | 07/11/2006 |
| 7065263 | Image processing apparatus, image input/output apparatus, scaling method and memory control method The present invention relates to an image processing apparatus, an image input/output apparatus, a scaling method and a memory control method, by which input image data is written to an external memory in tiles, the tiles written to the external memory are read, and... | 06/20/2006 |
| 7064764 | Liquid crystal display control device A FIFO section having a FIFO memory is provided between a memory control section and a CPU_I/F section in a path through which image data outputted from a CPU is written into the video memory. Data necessary for writing the image data is stored into the FIFO section... | 06/20/2006 |
| 7061545 | Method for displaying menu of TV A method for displaying a menu of a TV is disclosed, in which icons and characters are prevented, to the utmost, from being transformed in a screen mode having a variable width, such as a double window mode or a PIP mode, so that meanings of the icons and characters... | 06/13/2006 |
| 7054218 | Serial memory address decoding scheme A decode circuit for a memory that uses “sequential addressing” includes a series of decoders form a shift register that may be used to provide either wordlines or column select lines for accessing the memory. A pulse generator supplies an appropriate number of ... | 05/30/2006 |
| 6961384 | Still picture processing for MPEG-2 video Still picture images are encoded and transmitted at reduced rates using the MPEG-2 standard. Video frames are captured for processing at a still picture capture rate that is lower than the video input frame rate. The captured frames are compressed as Intra frames at... | 11/01/2005 |
| 6954153 | System and method for communicating map data for vehicle navigation A map data transmitting server is interconnected with a vehicle terminal through a wireless network. The vehicle terminal determines a range of cells of which cell data are required for navigation based on vehicle state information, and requests the map data transmi... | 10/11/2005 |
| 6954209 | Computer CPU and memory to accelerated graphics port bridge having a plurality of physical buses with a single logical bus number A core logic chip set in a computer system provides a bridge between processor host and memory buses and a plurality of Accelerated Graphics Port (AGP) buses. Each of the plurality of AGP buses have the same logical bus number. The core logic chip set has an arbiter... | 10/11/2005 |
| 6924812 | Method and apparatus for reading texture data from a cache A texture data reading apparatus includes a cache memory including a plurality of read ports and a plurality of regions to store pixel texture data. An address comparator includes a plurality of input ports to receive incoming pixels, wherein the address comparator ... | 08/02/2005 |
| 6909836 | Multi-rate real-time players A method of optimizing the scheduling of the drawing of graphical elements of a multi-player display (102) in an image processing environment. Each player (801 to 804) is capable of operating asynchronously and deriving its source from a differe... | 06/21/2005 |
| 6876400 | Apparatus and method for protecting a memory sharing signal control lines with other circuitry An apparatus such as a television signal receiver includes first and second circuit boards. The first circuit board includes a memory, and control circuitry for controlling at least one function of the apparatus. The second circuit board is operably coupled to the f... | 04/05/2005 |
| 6870578 | Apparatus and method for sharing signal control lines An apparatus such as a television signal receiver includes first and second circuit boards. The first circuit board includes a first device such as a memory, and control circuitry for controlling at least one function of the apparatus. The second circuit board is op... | 03/22/2005 |
| 6853385 | Video, audio and graphics decode, composite and display system A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section filtering as well as DVB and DES decryption and to de-multiplex them. The system processes the PES into digita... | 02/08/2005 |
| 6847410 | Picture data memory device with picture data input channels and picture data output channels A picture data memory device which can be used universally comprises a central picture data memory for storing picture data of a plurality of picture data input channels, in which case the stored picture data can additionally be read out via a plurality of picture d... | 01/25/2005 |
| 6798420 | Video and graphics system with a single-port RAM A video and graphics system has an input for receiving compressed video data and an input for receiving graphics data. The compressed video data may include HDTV video and/or SDTV video, and may be included in compressed data streams such as an MPEG-2 Transport stre... | 09/28/2004 |
| 6778179 | External dirty tag bits for 3D-RAM SRAM An external cache management unit for use with a 3D-RAM frame buffer and suitable for use in a computer graphics system is described. The unit may reduce power consumption within the 3D-RAM by performing partial block write-back according to status information store... | 08/17/2004 |
| 6509901 | Image generating apparatus and a method thereof An image generating apparatus which includes a frame buffer having a drawing port and a display port for display and including a drawing area containing a graphic image data and a base picture area containing a base picture data, and a graphics drawing ci... | 01/21/2003 |
| 6466216 | Computer system with optimized display control A computer system having an optimized display controller is disclosed. The computer system has a central processing unit connected to a system bus. Within the computer system, both a system memory and a video memory are connected in parallel to the system... | 10/15/2002 |
| 6307565 | System for dual buffering of asynchronous input to dual port memory for a raster scanned display A system which utilizes two buffers of dual-port memory to seamlessly display video frames on a raster scanned video display device. Dual port memory is organized into two alternate memory banks, each having sufficient capacity to buffer a full frame of v... | 10/23/2001 |
| 6268929 | Data processing device for simultaneously reading out plural lines of image and a method therefor A data processing device and a method by which image data inputted line by line can be distributed as image data of the plural lines, and processing of the image data and converting the image data to a multiple beam image data can be performed by use of s... | 07/31/2001 |
| 6262748 | Frame buffer memory with on-chip AIU and pixel cache A frame buffer dynamic random access memory (FBRAM) is disclosed that enables accelerated rendering of Z-buffered graphics primitives. The FBRAM converts read-modify-write transactions such as Z-buffer compare and RBG alpha blending into a write only oper... | 07/17/2001 |
| 6195106 | Graphics system with multiported pixel buffers for accelerated pixel processing A frame buffer dynamic random access memory (FBRAM) is disclosed that enables accelerated rendering of Z-buffered graphics primitives. The FBRAM converts read-modify-write transactions such as Z-buffer compare and RBG alpha blending into a write only oper... | 02/27/2001 |
| 6188381 | Modular parallel-pipelined vision system for real-time video processing A real-time modular video processing system (VPS) which can be scaled smoothly from relatively small systems with modest amounts of hardware to very large, very powerful systems with significantly more hardware. The modular video processing system include... | 02/13/2001 |
| 6091429 | Video/graphics memory system A video/graphics memory system includes a memory device (30) having a memory core (14) and first and serial registers (16, 36). The memory device thus has a random-access port (24) for graphics data, a first serial access port (22) for image output to a d... | 07/18/2000 |
