Did You Know...
...that to encourage use of his new invention, the shopping cart, market owner Sylvan Goldman hired fake shoppers to push the carts around his store in Oklahoma City? Seems his customers were reluctant to give up their hand-carried baskets.
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| Number | Title | Issue Date |
| 8159497 | Sharing a data buffer A computer-program product may have instructions that, when executed, cause a processor to perform operations including managing execution of application functions that access data in a shared buffer; determining if a first instruction that is stored at a first memo... | 04/17/2012 |
| 8134568 | Frame buffer region redirection for multiple graphics adapters A system and method for representing multiple prefetchable memory resources, such as frame buffers coupled to graphics devices, as a unified prefetchable memory space for access by a software application. A graphics surface may be processed by multiple graphics devi... | 03/13/2012 |
| 8068114 | Mechanism for granting controlled access to a shared resource Disclosed are methods and systems for granting an application-specific integrated circuit (ASIC) in a multi-ASIC environment controlled access to a shared resource. A system includes a first ASIC, a second ASIC, and a shared memory that stores a shared resource and ... | 11/29/2011 |
| 8054315 | Electronic system and method for selectively allowing access to a shared memory An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the... | 11/08/2011 |
| 7898548 | Electronic system and method for selectively allowing access to a shared memory An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the... | 03/01/2011 |
| 7852345 | Storage and support for large amounts of constant data in a graphics library One embodiment of the invention is a method of accessing a bindable uniform variable bound to a buffer object that includes the steps of creating a linked program object comprising one or more shader programs, where each shader program includes instructions written ... | 12/14/2010 |
| 7839410 | Parameter buffer objects for shader parameters in a graphics library One embodiment of the invention is a method for accessing and updating data in a buffer object during the execution of a shader program. The method includes loading a plurality of data portions in the buffer object, initiating a first execution of a shader program t... | 11/23/2010 |
| 7777753 | Electronic system and method for selectively allowing access to a shared memory An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the... | 08/17/2010 |
| 7750915 | Concurrent access of data elements stored across multiple banks in a shared memory resource Methods, apparatuses, and systems are presented for performing multiple concurrent accesses in a shared memory resource comprising storing a first group of data elements in data entries across multiple banks in the shared memory resource, a first data element of the... | 07/06/2010 |
| 7542045 | Electronic system and method for display using a decoder and arbiter to selectively allow access to a shared memory An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the... | 06/02/2009 |
| 7463268 | Providing 3D graphics across partitions of computing device A computing device has a graphics hardware device employed to display graphics on a display, and is partitioned to include a video services partition (VSP) instantiated at least in part to provide graphics capabilities, and also to include a video client partition (... | 12/09/2008 |
| 7436408 | Computer program for generating pictures First and second areas are designated in a source picture. A start picture is generated from a portion of the source picture which extends in the first area. An end picture is generated from a portion of the source picture which extends in the second area. At least ... | 10/14/2008 |
| 7417637 | Fairly arbitrating between clients An apparatus and method for fairly arbitrating between clients with varying workloads. The clients are configured in a pipeline for processing graphics data. An arbitration unit selects requests from each of the clients to access a shared resource. Each client provi... | 08/26/2008 |
| 7400327 | Apparatus, system, and method for a partitioned memory A memory system having a number of partitions each operative to independently service memory requests from a plurality of memory clients while maintaining the appearance to the memory client of a single partition memory subsystem. The memory request specifies a loca... | 07/15/2008 |
| 7369132 | Apparatus, system, and method for delivering data to multiple memory clients via a unitary buffer A graphics processing apparatus includes an output pipeline including a set of memory clients. The graphics processing apparatus also includes a memory controller connected to the output pipeline. The memory controller is configured to retrieve data requested by res... | 05/06/2008 |
| 7321368 | Electronic system and method for display using a decoder and arbiter to selectively allow access to a shared memory An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the... | 01/22/2008 |
| 7318133 | Method and apparatus for replicating volumes A method for operating a storage system includes providing a primary storage device and a secondary storage device. Data from a first storage volume is copied to a second storage volume using an internal mirror operation, the first and second storage volumes being p... | 01/08/2008 |
| 7310332 | Network switch memory interface configuration A network switch for network communications includes a first data port interface, wherein the first data port interface supports a plurality of data ports for transmitting and receiving data at a first data rate. The network switch also includes a second data port i... | 12/18/2007 |
| 7307667 | Method and apparatus for an integrated high definition television controller A method and an apparatus for an integrated high definition television controller are described. The integrated high definition digital television controller includes two or more the following functions in a single chip: MPEG2 Transport, Audio and Video Decoders, Vi... | 12/11/2007 |
| 7304656 | Device for digital display of a video image The present invention relates to a device for digital display of a video image using time-division modulation. This device is intended to display a video image during a video frame comprising a plurality of consecutive subfields distributed within at least two separ... | 12/04/2007 |
| 7298377 | System and method for cache optimized data formatting A system and method for cache optimized data formatting is presented. A processor generates images by calculating a plurality of image point values using height data, color data, and normal data. Normal data is computed for a particular image point using pixel data ... | 11/20/2007 |
| 7272609 | In a distributed hierarchical cache, using a dependency to determine if a version of the first member stored in a database matches the version of the first member returned A solution may be provided in which a cache may assign a version to each object that it caches. The version may be saved in a database along with the object. Each time the business logic accesses the cache for a dependent object, such as a read from the bit mask fie... | 09/18/2007 |
| 7271808 | Image display control method and image display control apparatus When a contention is detected between a memory write address and a display read address in a memory circuit which stores display data, a host retry pulse generating circuit generates a display read signal and a display line data transfer signal based on a memory wri... | 09/18/2007 |
| 7268785 | System and method for interfacing graphics program modules A system and method for interfacing graphics program modules written to execute on a plurality of functional units of a graphics processor using a shared memory. A central processing unit (CPU) receives a first graphics program module that outputs a first parameter ... | 09/11/2007 |
| 7266646 | Least mean square dynamic cache-locking A dynamic cache-locking algorithm may determine the most frequently used function(s) and the number of cache lines that should be locked into the instruction cache embedded into a processor. By evaluating the dynamic cache-locking algorithm, a determination may be m... | 09/04/2007 |
| 7256790 | Video and graphics system with MPEG specific data transfer commands A video and graphics system includes a video decoding system for processing compressed video data. The compressed video data includes MPEG-2 video data containing SDTV video data or HDTV video data. The video decoding system includes a video decoder for processing t... | 08/14/2007 |
| 7248267 | Method and apparatus for simulated direct frame buffer access for graphics adapters A method, data processing system, and computer instructions for simulating direct frame buffer access. A request for access to a frame buffer memory is received from an application. A portion of system memory is allocated for use as the frame buffer memory in respon... | 07/24/2007 |
| 7240170 | High/low priority memory Methods and apparatus are provided for achieving low latency for high priority tasks in digital processing systems. A digital signal processor includes a core processor and a level one memory. In some embodiments, a store buffer is configured to hold write informati... | 07/03/2007 |
| 7221369 | Apparatus, system, and method for delivering data to multiple memory clients via a unitary buffer Apparatus, system, and method for delivering data to multiple memory clients are described. In one embodiment, a graphics processing apparatus includes an output pipeline including a set of memory clients. The graphics processing apparatus also includes a memory con... | 05/22/2007 |
| 7206003 | Controller-driver, display device, and display method A controller-driver, a method of driving the controller-driver, and a method of processing image data enabling scroll or other various functions without adding a storage capacity of a display memory nor increasing power consumption. A built-in display memory having ... | 04/17/2007 |
| 7199805 | Method and apparatus for titling Some embodiments of the invention provide a method for presenting computer-generated characters. The method defines several frames for a character and sequentially presents the frames. Each frame depicts a particular representation of the character. Also, at least t... | 04/03/2007 |
| 7174415 | Specialized memory device A specialized memory chip which includes an embedded application specific signal processing unit ASSPU. The ASSPU handles one or more predetermined tasks instead of a main processing unit. The ASSPU and the main processing unit can access memory on the memory chip s... | 02/06/2007 |
| 7158140 | Method and apparatus for rendering an image in a video graphics adapter In accordance with the invention, a video source is received by a first video adapter. The video source is captured in the video memory associated with the first VGA. The stored video source is associated with a window of an existing application. When the window loc... | 01/02/2007 |
| 7154515 | Method and apparatus for reducing printing artifacts of stitched images A method and apparatus for eliminating artifacts in images formed using more than one image segment. A buffer region associated with two adjacent image segments is defined wherein the intensity levels of the pixels are attenuated. When image segments substantially o... | 12/26/2006 |
| 7139849 | Semiconductor integrated circuit device A semiconductor integrated circuit device includes a plurality of internal memories, a main processor, which constitutes a first processing unit having a codec function, and a video interface and graphics processor, which constitute a second processing unit for vide... | 11/21/2006 |
| 7130935 | System and method for using a switch to route peripheral and graphics data on an interconnect A system and method for using a switch to route graphics data and data for a peripheral data on an interconnect is disclosed. A graphics card includes a switch that is communicatively coupled to a computer system. The switch receives graphics data and data for a per... | 10/31/2006 |
| 7116331 | Memory controller hub interface A memory controller hub includes a graphics subsystem adapted to perform graphics operations on data, and interface circuitry adapted selectively to couple the graphics subsystem to a local memory through electrical connectors and to couple the memory controller hub... | 10/03/2006 |
| 7106339 | System with local unified memory architecture and method Local memory associated with one or more companion devices within a system is mapped into a system memory for use by an application processor. ... | 09/12/2006 |
| 7100118 | Graphical user interface engine for embedded systems In an embedded system, for instance in a household appliance, in addition to the usual embedded microprocessor/microcontroller there is provided another processor which actually executes a user interface HTML document for accepting user input, for instance from a ke... | 08/29/2006 |
| 7085941 | Clock control apparatus and method, for a memory controller, that processes a block access into single continuous macro access while minimizing power consumption A clock control apparatus for a memory controller comprises an interface unit which processes a block access to a plurality of banks of an SDRAM as a single continuous macro access in order to perform arbitration of the macro access, the block access externally supp... | 08/01/2006 |
