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...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 8134562 | Method for assisting in data calculation by using display card A method for assisting in data calculation by using a display card: In the present method, input data stored in a system memory is transformed into texture data, which is then stored in a display memory of the display card. Then, a Graphic processing unit (GPU) of t... | 03/13/2012 |
| 8102398 | Dynamically controlled power reduction method and circuit for a graphics processor A graphics processor may be operated in a reduced power mode to render frames at rate equal to or less than the rate at which frames are presented on an interconnected display. Graphics processor clock speeds are controlled to reduce the time during which the graphi... | 01/24/2012 |
| 8098251 | System and method for instruction latency reduction in graphics processing A system, method and apparatus are disclosed, in which an instruction scheduler of a compiler, e.g., a shader compiler, reduces instruction latency based on a determined instruction distance between a dependent predecessor and successor instructions. ... | 01/17/2012 |
| 8081190 | System and method for optimizing a graphics intensive software program for the user's graphics hardware A system and method for optimizing the performance of a graphics intensive software program for graphics acceleration hardware. This system and method encompasses a procedure that validates the different functions of a 3D acceleration capable video card, decides whe... | 12/20/2011 |
| 7961193 | Video data processing circuits and systems comprising programmable blocks or components The invention refers to a video data processing system and a video data processing circuit, comprising at least two functional blocks of which at least a first functional block is programmable so that different functions can be provided by said first functional bloc... | 06/14/2011 |
| 7868891 | Load balancing Embodiments of methods, apparatuses, devices, and/or systems for load balancing two processors, such as for graphics and/or video processing, for example, are described. ... | 01/11/2011 |
| 7830389 | Dual processor accelerated graphics rendering Dual processor accelerated graphics rendering is a method which allows for optimizing graphics performance using two processors and 3D hardware accelerators. This method allows for real time embedded systems to have multiple partitions to render to multiple windows ... | 11/09/2010 |
| 7742050 | System and method for optimizing a graphics intensive software program for the user's graphics hardware A system and method for optimizing the performance of a graphics intensive software program for graphics acceleration hardware. This system and method encompasses a procedure that validates the different functions of a 3D acceleration capable video card, decides whe... | 06/22/2010 |
| 7663633 | Multiple GPU graphics system for implementing cooperative graphics instruction execution A multiple GPU (graphics processor unit) graphics system is disclosed. The multiple GPU graphics system includes a plurality of GPUs configured to execute graphics instructions from a computer system. A GPU output multiplexer and a controller unit are coupled to the... | 02/16/2010 |
| 7619630 | Preshaders: optimization of GPU pro A shader program capable of execution on a GPU is analyzed for constant expressions. These constant expressions are replaced with references to registers or memory addresses on the GPU. A preshader is created that comprises two executable files. The first executable... | 11/17/2009 |
| 7612779 | Video data processing circuits and systems comprising programmable blocks or components The invention refers to a video data processing system and a video data processing circuit, comprising at least two functional blocks of which at least a first functional block is programmable so that different functions can be provided by said first functional bloc... | 11/03/2009 |
| 7427986 | Hybrid hardware-accelerated relighting system for computer cinematography An interactive cinematic lighting system used in the production of computer-animated feature films containing environments of very high complexity, in which surface and light appearances are described using procedural RenderMan shaders. The system provides lighting ... | 09/23/2008 |
| 7425953 | Method, node, and network for compositing a three-dimensional stereo image from an image generated from a non-stereo application A method of assembling a composite image comprising generating three-dimensional data defining a non-stereo image, assigning a first screen portion to a first rendering node, assigning a second screen portion to a second rendering node, rendering, by the first rende... | 09/16/2008 |
| 7420565 | Point-to-point bus bridging without a bridge controller A computer system includes an integrated graphics subsystem and a graphics connector for attaching either an auxiliary graphics subsystem or a loopback card. A first bus connection communicates data from the computer system to the integrated graphics subsystem. With... | 09/02/2008 |
| 7405741 | Fuzzy logic based LCD overdrive control method A boost table stores adjusted target levels for pairs of original and target pixel levels. The adjusted target levels can be used to as a substitute for the target pixel level to improve pixel response in reaching the desired target pixel level. A reduced boost tabl... | 07/29/2008 |
| 7394464 | Preshaders: optimization of GPU programs A shader program capable of execution on a GPU is analyzed for constant expressions. These constant expressions are replaced with references to registers or memory addresses on the GPU. A preshader is created that comprises two executable files. The first executable... | 07/01/2008 |
| 7395409 | Split embedded DRAM processor A processing architecture includes a first CPU core portion coupled to a second embedded dynamic random access memory (DRAM) portion. These architectural components jointly implement a single processor and instruction set. Advantageously, the embedded logic on the D... | 07/01/2008 |
| 7388588 | Programmable graphics processing engine A fully programmable graphics processing engine is provided. The graphics processing engine includes three independent, programmable processors that run independent sets of instructions from independent instruction storage facilities. Graphics processing tasks may b... | 06/17/2008 |
| 7372465 | Scalable graphics processing for remote display A system and method processes graphics data for remote display. A graphics processing system including a plurality of graphics processing devices is coupled to a host system that includes a host graphics processor and a display device that is remote relative to the ... | 05/13/2008 |
| 7372990 | Texture image compressing device and method, texture image decompressing device and method, data structures and storage medium A texture image compressing device includes a separating unit configured to separate intensity maps, including intensity values and light source-independent texture images, those images including color components from a plurality of texture images corresponding to d... | 05/13/2008 |
| 7367042 | Method and apparatus for hyperlinking in a television broadcast A system and method of adding hyperlinked information to a television broadcast. The broadcast material is analyzed and one or more regions within a frame are identified. Additional information can be associated with a region, and can be transmitted in encoded form,... | 04/29/2008 |
| 7362325 | 2D/3D line rendering using 3D rasterization algorithms This patent discloses a system and method to compile a set of display points that define a two dimensional representation of a straight line graphic object using three dimensional rasterization algorithms. In one embodiment, a three dimensional (3D) graphics acceler... | 04/22/2008 |
| 7363397 | System and method for DMA controller with multi-dimensional line-walking functionality A system and method for a DMA controller with multi-dimensional line-walking functionality is presented. A processor includes an intelligent DMA controller, which loads a line description that corresponds to a shape or line. The intelligent DMA controller moves thro... | 04/22/2008 |
| 7359209 | Hinge with a connector An electronic device includes a first body having a first connector and a second body. A hinge located in the electronic device comprises a first hinge piece fastened to the first body, a second hinge piece fastened to the second body and pivotally coupled to the fi... | 04/15/2008 |
| 7358974 | Method and system for minimizing an amount of data needed to test data against subarea boundaries in spatially composited digital video A method and system for minimizing an amount of data needed to test data against subarea boundaries in spatially composited digital video. Spatial compositing uses a graphics unit or pipeline to render a portion (subarea) of each overall frame of digital video image... | 04/15/2008 |
| 7358970 | Method and apparatus for modifying depth values using pixel programs A method and apparatus for generating depth values in a programmable graphics system. Depth values are calculated under control of a pixel program using a variety of sources as inputs to programmable computation units (PCUs) in the programmable graphics system. The ... | 04/15/2008 |
| 7356823 | Method for displaying single monitor applications on multiple monitors driven by a personal computer A direct access driver solves limitations of DirectX operation under the Microsoft architecture when using multiple monitors. The direct access driver allows applications employing DirectX application program interfaces to use hardware acceleration without display e... | 04/08/2008 |
| 7355598 | System and method for fast generation of high-quality maximum/minimum intensity projections A method for rendering a volumetric image includes providing a digitized volumetric image comprising a plurality of intensities corresponding to a domain of points in a 3-dimensional space, casting a ray through said volumetric image for a first pass to determine a ... | 04/08/2008 |
| 7353372 | Detection of support components for add-in card Embodiments of the present invention provide detection, enumeration, and software configuration of optional choice of add-in cards types through a multiplexed bus interface. The PROM allows identification of the add-in device and software configuration to adapt to s... | 04/01/2008 |
| 7348986 | Image rendering An image is rendered by dividing the image into chunks, rendering the chunks in one of at least two devices, and determining which of the devices renders each one of at least some of the chunks based on at least one device's progress in the rendering of other chunks... | 03/25/2008 |
| 7343482 | Program subgraph identification There is provided an apparatus for processing data under control of a program having program instructions and subgraph suggestion information identifying respective sequences of program instructions corresponding to computational subgraphs identified within said pro... | 03/11/2008 |
| 7333114 | System and method for parallel execution of data generation tasks A CPU module includes a host element configured to perform a high-level host-related task, and one or more data-generating processing elements configured to perform a data-generating task associated with the high-level host-related task. Each data-generating process... | 02/19/2008 |
| 7330182 | 3D graphics processing method A 3D-graphics processing method for processing 3D objects in a computer system defines a visible region having a far plane and a near plane. A clipping process is performed for a first object lying across the near plane while a second object lying across the far pla... | 02/12/2008 |
| 7330964 | Microprocessor with independent SIMD loop buffer An apparatus comprising detection logic configured to detect a loop among a set of instructions, the loop comprising one or more instructions of a first type of instruction and a second type of instruction and a co-processor configured to execute the loop detected b... | 02/12/2008 |
| 7330188 | Texture caching arrangement for a computer graphics accelerator A method and apparatus which includes a graphics accelerator, circuitry responsive to pixel texture coordinates to select texels and generate therefrom a texture value for any pixel the color of which is to be modified by a texture, a cache to hold texels for use by... | 02/12/2008 |
| 7327370 | Memory controller hub interface A memory controller hub includes a graphics subsystem adapted to perform graphics operations on data, and interface circuitry adapted selectively to couple the graphics subsystem to a local memory through electrical connectors and to couple the memory controller hub... | 02/05/2008 |
| 7327371 | Graphic controller, microcomputer and navigation system Image data storage areas of a plurality of pages are allocated for each of a plurality of display planes capable of superimposed display, and display output processing is performed while switching between the image data storage areas is being performed for each disp... | 02/05/2008 |
| 7328270 | Communication protocol processor having multiple microprocessor cores connected in series and dynamically reprogrammed during operation via instructions transmitted along the same data paths used to convey communication data A communication protocol processor is presented including a transmit unit and a receive unit, each having multiple microprocessor cores connected in series. Each microprocessor core performs an operation upon a stream of communication data, conducted along a data pa... | 02/05/2008 |
| 7324072 | Pixel border for improved viewability of a display device A display device having a display matrix including a pixel border of width x and located around the edge locations of the matrix for improved viewability. The pixels of the border are “dummy pixels” each containing a red, a green and a blue subpixel. Each subpix... | 01/29/2008 |
| 7325086 | Method and system for multiple GPU support Supporting multiple graphics processing units (GPUs) comprises a first path coupled to a north bridge device (or a root complex device) and a first GPU, which may include a portion of the first GPU's total communication lanes. A second communication path may be coup... | 01/29/2008 |
