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| Number | Title | Issue Date |
| 8169439 | Scalar precision float implementation on the “W” lane of vector unit Embodiments of the invention are generally related to image processing, and more specifically to vector units for supporting image processing. A combined vector/scalar unit is provided wherein one or more processing lanes of the vector unit are used for performing s... | 05/01/2012 |
| 8120611 | Information processing apparatus and information processing method In an information processing apparatus (1) according to the invention, a GMCH (13) is connected to a CPU (11) through a CPU bus (12), and an ICH (15) is connected to the GMCH (13) through a dedicated bus (14). The GMC... | 02/21/2012 |
| 8111259 | Image processing apparatus having context memory controller An apparatus for use in image processing is set forth that comprises a pixel processor, context memory, and a context memory controller. The pixel processor is adapted to execute a pixel processing operation on a target pixel using a context of the target pixel. The... | 02/07/2012 |
| 8072459 | Data processing unit with multi-graphic controller and method for processing data using the same The present invention relates to a data processing apparatus provided with a multi-graphic controller and a data processing method using the data processing apparatus. A data processing apparatus of the present invention comprises a first graphic controller 10 | 12/06/2011 |
| 8063907 | Apparatus and method for selectable hardware accelerators in a data driven architecture A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A... | 11/22/2011 |
| 8054314 | Applying non-homogeneous properties to multiple video processing units (VPUs) A system and method for applying non-homogeneous properties to multiple video processing units (VPUs) in a multiple VPU system are described. Respective VPUs in the system cooperate to produce a frame to be displayed. In various embodiments, data output by different... | 11/08/2011 |
| 8044963 | System for emulating graphics operations Disclosed is a system for producing images including emulation techniques using multiple processors. The system provides for emulation of graphics processing resources such that a central processing unit may provide graphics support. Disclosed embodiments include em... | 10/25/2011 |
| 8022956 | Settings control in devices comprising at least two graphics processors In a device comprising at least two graphics processors, a determination is made that the device has switched from a first or current graphics processor to a second or target graphics processor. At least a portion of settings corresponding to the first graphics proc... | 09/20/2011 |
| 8018463 | Processor for video data A video processor according to the invention is dynamically configurable as to the attributes of the video data upon which the processor operates. Some embodiments dynamically configure the processor via a sequence of instructions, where the instructions include inf... | 09/13/2011 |
| 8004530 | Video controller switching system and method A video controller switching system comprises a computing platform having a user video controller configured to control non-administrative video output of the computing platform, a management module video controller disposed on the computing platform configured to c... | 08/23/2011 |
| 8004531 | Multiple graphics processor systems and methods Multiple graphics processor system and method embodiments are disclosed. One system embodiment, among others, comprises a multiple graphics processor system, comprising a first graphics processing unit having first status information and a second graphics processing... | 08/23/2011 |
| 7999813 | System and method for data synchronization for a computer architecture for broadband networks A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a contro... | 08/16/2011 |
| 7982741 | Shared graphics infrastructure Systems and methods that provide for a common device enumeration point to a class of software objects, which represent hardware and can emit 2D bitmaps, via a presentation interface component. Such presentation interface component can further include a factory compo... | 07/19/2011 |
| 7982742 | System and method for an information handling system having an external graphics processor system for operating multiple monitors Methods and systems are disclosed for an information handling system comprising an internal graphics system and an external graphics system, wherein both the internal and external graphics systems may operate simultaneously to support multiple monitors. The internal... | 07/19/2011 |
| 7969445 | System, method, and computer program product for broadcasting write operations A system, method, and computer program product are provided for broadcasting write operations in a multiple-target system. In use, a write operation is received at one of a plurality of apertures of an address space. Such write operation is then replicated to produc... | 06/28/2011 |
| 7969443 | System and method for dynamically processing content being communicated over a network for display purposes A system and method are provided for dynamically selecting one or more modules of a graphics processor for processing content to support communication of the content over a wireless network link for subsequent display of the content utilizing a display. ... | 06/28/2011 |
| 7969444 | Distributed rendering of texture data A method and apparatus for distributing the workload of rendering an image where texture mapping is involved among multiple graphics processing units (GPUs) are provided. The method generally entails dividing a texture map among multiple GPUs, performing texture map... | 06/28/2011 |
| 7970262 | Buffer descriptor structures for communication between decoder and display manager A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facili... | 06/28/2011 |
| 7961192 | Multi-graphics processor system and method for processing content communicated over a network for display purposes A system and method are provided including a first graphic processor in communication with a content source. In operation, the first graphics processor is adapted for processing content from the content source. Further included is a second graphics processor in comm... | 06/14/2011 |
| 7907142 | Video tiling using multiple digital signal processors A system and method for creating video tile arrays is disclosed. A first plurality of video streams produced by a first plurality of Analog to Digital Converters (ADCs) are received in a first Digital Signal Processor (DSP). The first DSP processes the first plurali... | 03/15/2011 |
| 7898544 | Detecting connection topology in a multi processor graphics system Multiple graphics processors in a graphics processing system are interconnected in a unidirectional or bidirectional ring topology, allowing pixels to transferred from any one graphics processor to any other graphics processor. The system can automatically identify ... | 03/01/2011 |
| 7868890 | Display processor for a wireless device A display processor includes an interface unit, an instruction processor, a synchronization unit, at least one processing unit, and a device buffer. The interface unit receives input image data (e.g., from a main memory) and provides output image data for a frame bu... | 01/11/2011 |
| 7847800 | System for emulating graphics operations Disclosed is a system for producing images including emulation techniques. The system provides for emulation of graphics processing resources such that a central processing unit may provide graphics support. Disclosed embodiments include emulation of selected graphi... | 12/07/2010 |
| 7800619 | Method of providing a PC-based computing system with parallel graphics processing capabilities A method of providing a PC-based computing system with parallel graphics processing capabilities, wherein the PC-based computing system includes (i) system memory (ii) an operating system (OS, (iii) one or more graphics applications, stored in said system memory, (i... | 09/21/2010 |
| 7796135 | Coherence of displayed images for split-frame rendering in multi-processor graphics system Coherence of displayed images is provided for a graphics processing systems having multiple processors operating to render different portions of a current image in parallel. As each processor completes rendering of its portion of the current image, it generates a lo... | 09/14/2010 |
| 7768517 | Asymmetric multi-GPU processing A system for processing video data includes a host processor, a first media processing device coupled to a first buffer, the first media processing device configured to perform a first processing task on a frame of video data, and a second media processing device co... | 08/03/2010 |
| 7750913 | System and method for implementing graphics processing unit shader programs using snippets Shader programs that execute on graphics processing units (GPUs), such as vertex and pixel shaders may be generated by defining individual shader snippets. Each snippet may represent and/or specifies a particular shader operation. In one embodiment, each snippet may... | 07/06/2010 |
| 7737981 | Information processing apparatus According to one embodiment, an information processing apparatus includes: a plurality of graphics processing units (GPUs) having different characteristics; a memory configured to store information on association between one of the plurality of GPUs and an applicati... | 06/15/2010 |
| 7724260 | Method and system for image monitoring A system for verifying the generation of a critical symbology includes a display processor configured to generate graphic commands from one or more system inputs. The display processor is further configured to determine the critical symbology. A graphics processing ... | 05/25/2010 |
| 7714870 | Apparatus and method for selectable hardware accelerators in a data driven architecture A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A... | 05/11/2010 |
| 7671863 | Method and graphic engine chip for drawing processing Architectures for graphic engine chips with minimum impact on other resources are disclosed. According to one embodiment, a graphic engine architecture includes a scheduler that is configured to schedule an execution time for each of the drawing instructions sent in... | 03/02/2010 |
| 7663632 | Method and apparatus for rendering video Multiple Video Graphic Adapters (VGAs) are used to render video data to a common port. In one embodiment, each VGA will render an entire frame of video and provide it to the output port through a switch. The next adjacent frame will be calculated by a separate VGA a... | 02/16/2010 |
| 7649537 | Dynamic load balancing in multiple video processing unit (VPU) systems Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is... | 01/19/2010 |
| 7629978 | Multichip rendering with state control Circuits, methods, and apparatus that provide multiple graphics processor systems where specific graphics processors can be instructed to not perform certain rendering operations while continuing to receive state updates, where the state updates are included in the ... | 12/08/2009 |
| 7623131 | Graphics processing systems with multiple processors connected in a ring topology Multiple graphics processors in a graphics processing system are interconnected in a unidirectional or bidirectional ring topology, allowing pixels to transferred from any one graphics processor to any other graphics processor. The system can automatically identify ... | 11/24/2009 |
| 7619629 | Method and system for utilizing memory interface bandwidth to connect multiple graphics processing units A methods and system for utilizing memory interface bandwidth to connect multiple graphics processing units are disclosed. According to one embodiment of the present invention, a first graphics processing unit is configured to allocate a portion of an initial memory... | 11/17/2009 |
| 7586492 | Real-time display post-processing using programmable hardware In a graphics processor, a rendering object and a post-processing object share access to a host processor with a programmable execution core. The rendering object generates fragment data for an image from geometry data. The post-processing object operates to generat... | 09/08/2009 |
| 7586493 | System and method for offloading application tasks in a multi-processor environment utilizing a driver A system, method, and computer program product are provided for offloading application tasks in a multi-processor environment. In use, an application is executed utilizing a first processor. Such application performs a plurality of tasks. A driver is provided for de... | 09/08/2009 |
| 7576745 | Connecting graphics adapters A system and method for providing a dedicated interface between two or more graphics adapters installed on a motherboard. Surplus signals within an interface conforming to an interface specification are used to create the dedicated interface. The dedicated interface... | 08/18/2009 |
| 7561163 | Detecting connection topology in a multi-processor graphics system Multiple graphics processors in a graphics processing system are interconnected in a unidirectional or bidirectional ring topology, allowing pixels to transferred from any one graphics processor to any other graphics processor. The system can automatically identify ... | 07/14/2009 |
