"There is no reason anyone would want a computer in their home."
Ken Olsen, chairman and founder of Digital Equipment Corporation ; 1977
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 6972706 | Current folding cell and circuit comprising at least one folding cell A current folding cell has current inputs and current outputs. Input currents are transferred from one current path to another and finally leading to the current outputs to establish a continuous folding characteristic. The signal current through one of the current ... | 12/06/2005 |
| 6972705 | Signal processing system having an ADC delta-sigma modulator with single-ended input and feedback signal inputs Signal processing systems described herein include an analog-to-digital delta sigma modulator to process a single-ended input signal using a single-ended analog feedback reference signal. The delta sigma modulator includes a switched capacitor circuit that integrate... | 12/06/2005 |
| 6970124 | Inherent-offset comparator and converter systems Comparator systems are provided that include first and second differential pairs of transistors with inherent offsets that are a function of their tail currents. Some system embodiments configure the pairs to have substantially-equal, nonzero inherent offset voltage... | 11/29/2005 |
| 6970125 | Multistage analog-to-digital converter An analog-to-digital converter with a pipeline architecture for converting an analog input signal into a digital output signal with a predefined resolution includes a plurality of stages, each stage having a circuit for converting an analog local signal into a digit... | 11/29/2005 |
| 6967603 | ADC background calibration timing A background calibrating, skip and fill, analog/digital converter (ADC) generates an output data sequence having successive data elements representing magnitudes of successive samples of an analog input signal (X) acquired during successive cycles of a clock signal.... | 11/22/2005 |
| 6967509 | Charge recycling amplifier for a high dynamic range CMOS imager A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplificat... | 11/22/2005 |
| 6967611 | Optimized reference voltage generation using switched capacitor scaling for data converters An algorithmic or cyclic data converter uses an RSD stage having a switched capacitor network for efficiently scaling at least one externally supplied reference voltage. A reference voltage is scaled by using capacitor ratios that also function to provide an output ... | 11/22/2005 |
| 6967610 | Low power bit and one-half analog to digital converter A bit-and-one-half analog to digital converter comprises a switched capacitor circuit, including an opamp, that receives an analog input voltage and generates a residual analog output voltage. The switched capacitor circuit samples the analog input voltage during a ... | 11/22/2005 |
| 6965142 | Floating-gate semiconductor structures Hot-electron injection driven by hole impact ionization in the channel-to-drain junction of a p-channel MOSFET provides a new mechanism for writing a floating-gate memory. Various pFET floating-gate structures use a combination of this mechanism and electron tunneli... | 11/15/2005 |
| 6965338 | Cascade A/D converter A cascade A/D converter that has shorter settling time and enables high-speed operation is provided. A cascade A/D converter comprises fundamental constituent elements cascaded in plural stages, each fundamental constituent element comprising a first comparator for ... | 11/15/2005 |
| 6963300 | Pipeline analog-to-digital converter DNL and INL errors are minimized in a pipelined converter that is arranged to use reference pre-sampling. An example first stage in the pipelined converter includes a sample/hold amplifier (SHA) circuit, an evaluator circuit, and a multiplying digital-to-analog conv... | 11/08/2005 |
| 6958722 | SAR ADC providing digital codes with high accuracy and high throughput performance An aspect of the invention improves accuracy of digital codes generated at the output of a SAR ADC by using multiple reference voltages. A first reference voltage is used to generate an equivalent voltage corresponding to previous resolved bits and a second referenc... | 10/25/2005 |
| 6958723 | Method and apparatus for reducing noise in analog-to-digital converter devices An analog-to-digital converter apparatus has a plurality of stages. Each stage includes a residue amplifier having a first and second amplifier unit. Each of the amplifier units has a first input locus, a second input locus and an output locus. The amplifier units c... | 10/25/2005 |
| 6957278 | Reference -switch hysteresis for comparator applications The present invention concerns an apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a reference output voltage in response to a plurality of reference voltages. The second circuit may be configured to generate... | 10/18/2005 |
| 6956517 | Systems and methods for multi-channel analog to digital conversion Systems and methods for analog to digital conversion that may be implemented using a digital to analog converter (DAC) to provide negative feedback to cancel signals at the input of an analog to digital converter (ADC), and that may be used to extend the effective d... | 10/18/2005 |
| 6954169 | 1/f noise, offset-voltage charge injection induced error cancelled op-amp sharing technique The present invention provides an apparatus and method for reducing and canceling 1/f noise, offset voltage, and charge injection introduced in pipeline ADCs in conventional op-amp sharing techniques. The polarity of the residue signals is changed at each phase. Dur... | 10/11/2005 |
| 6950044 | Mixed signal processor with noise management Mixed signal processor with noise management. A method for noise management in a mixed signal processor integrated circuit having a digital processing section and an analog section The digital processing section is clocked at a first clock rate to process digital da... | 09/27/2005 |
| 6950051 | Analog-digital converter with pipeline folding scheme Provided is a pipelined folding analog-digital converter, the pipelined folding analog-digital converter comprising: a first sample-and-hold unit that samples and outputs a number of analog input voltages; a reference voltage generator that generates a number of ref... | 09/27/2005 |
| 6949903 | Method and apparatus for digitizing a voltage When digitizing a voltage, a capacitor is charged, through an impedance, to a voltage value (Um) dependent on the voltage to be digitized. The limits of that one of a plurality of voltage ranges in which said voltage value (Um) lies, are ascertained, and the two lim... | 09/27/2005 |
| 6946987 | Common operational amplifier and gain circuit and A/D converter using thereof A common operational amplifier for a pipeline circuit is provided. The common operational amplifier is used by the stage circuits of the pipeline circuit by turns according to a predetermined timing. The common operational amplifier comprises an operational amplifie... | 09/20/2005 |
| 6946985 | Device for reconfiguring a faulty storage assembly The invention CONCERNS a device for reconfiguring an assembly of N basic electronic modules associated with k redundant modules comprising: N multiplexers each having a first terminal (di) capable of being connected to k+1 second terminals connected to th... | 09/20/2005 |
| 6940444 | Domino asynchronous successive approximation ADC The domino asynchronous successive approximation (ASA) analog-to-digital converter (ADC) converts an analog signal to an n-bits digital signal. The domino ASA ADC is made out of n-blocks, corresponding to the number of n-bits of the digital output. Each of these n-b... | 09/06/2005 |
| 6933875 | Pipelined analog-to-digital converter with unequal work timing A pipelined analog-to-digital converter with unequal work timing comprising several transfer circuits and a decoder is provided. Each transfer circuit includes an analog-to-digital sub-converter, a multiply digital-to-analog converter, a subtractor and an amplifier.... | 08/23/2005 |
| 6933876 | Pipelined analog to digital converter A cell phone is provided that may be used with multiple radio formats, such as GSM and CDMA. The cell phone includes a receiver that receives radio signals and converts them into electrical signals. An analog to digital converter is connected to the receiver and con... | 08/23/2005 |
| 6930545 | Switched-capacitor, common-mode feedback circuit for a differential amplifier without tail current Provided is a switched capacitor feedback circuit including two or more input ports configured to receive a corresponding a number of input signals and at least one output port. The output port is configured to output an adjusting signal. The input signals includes ... | 08/16/2005 |
| 6927723 | A/D converter and A/D conversion method In a charge redistribution type A/D converter, an input-side capacitor terminal and a comparator-side capacitor terminal are connected through first and second analog switches to a fixed-voltage supply circuit, and the input-side capacitor terminal is connected thro... | 08/09/2005 |
| 6914549 | Reconfigurable analog-to-digital converter Configuring an analog-to-digital converter includes receiving a control signal and an input analog signal at an analog-to-digital converter, where the control signal has either a first state or a second state. The first state is associated with a first configuration... | 07/05/2005 |
| 6909391 | Fully differential reference driver for pipeline analog to digital converter An analog to digital conversion (ADC) circuit is disclosed including a fully differential reference voltage source. The reference voltage source includes a programmable current supply adapted to drive a programmed current through a resistor so as to establish an ini... | 06/21/2005 |
| 6909389 | Method and apparatus for calibration of an array of scaled electronic circuit elements A method and apparatus for calibrating an electronic circuit which required scaled matching of some or all of its electronic components with nonvolatile programmably trimmable parameter sources (current, voltage, resistance, capacitance) is carried out in a top-down... | 06/21/2005 |
| 6904583 | Layout method of voltage division resistors With a layout method for voltage division resistors, employing a photolithographic system, resistors which are required to have relative accuracy are disposed in the center of a layout area so as to be adjacent with each other, and another resistor is divided, so th... | 06/07/2005 |
| 6891495 | Analog-to-digital converter An analog-to-digital converter including analog-to-digital converting units connected in serial. The current comparator includes a current input terminal to receive a sampling current, a reference current input terminal to receive a reference current and a bit outpu... | 05/10/2005 |
| 6882297 | Analog-to-digital conversion circuit and image processing circuit for stepwise conversion of a signal through multiple stages of conversion units A multi-stage pipelined AD converter has n stages of conversion units, such as a first conversion unit, a second conversion unit, an (n−1)th conversion unit, and an nth conversion unit, which successively convert an analog signal into a digital signal each by seve... | 04/19/2005 |
| 6879277 | Differential pipelined analog to digital converter with successive approximation register subconverter stages Pipelined analog to digital conversion systems are provided having cascaded multi-bit successive approximation register subconverter stages. Capacitor arrays are provided in the subconverter stages, where switching logic selectively couples the capacitors to operate... | 04/12/2005 |
| 6870495 | Double throughput analog to digital converter A pipelined analog-to-digital converter features an amplifier block that includes a switching network to implement a double sampling and double conversion principle of operation. The amplifier block utilizes both phases of a clock for sampling and conversion. Additi... | 03/22/2005 |
| 6867723 | AD converter with reduced current consumption An AD converter includes a sample-&-hold circuit which samples and holds an input analog potential in a first period, and generates a signal indicative of a magnitude relation between the held input analog potential and a reference potential in a second period, a pl... | 03/15/2005 |
| 6864822 | Reconfigurable analog-to-digital converter A reconfigurable ADC includes a plurality of reconfigurable blocks for allowing the ADC to provide a plurality of architectures. In one embodiment, the ADC can be configured to operate in a pipeline mode and a sigma-delta mode. This arrangement provides an ADC havin... | 03/08/2005 |
| 6864820 | Analog-to-digital conversion using an increased input range One embodiment of the invention is directed to a method of extending the input range of an analog-to-digital converter (ADC) having a nominal input voltage range. The method comprises an act of mapping an over-range input voltage that falls outside of the nominal in... | 03/08/2005 |
| 6861969 | Methods and structures that reduce memory effects in analog-to-digital converters Methods and structures are provided that reduce conversion errors in pipelined analog-to-digital converters which are induced in one converter cycle by component memory of signals in one or more preceding converter cycles. The methods and structures include the use ... | 03/01/2005 |
| 6859387 | Three-state binary adders and methods of operating the same Three-state binary adders are disclosed for use in pipelined analog-to-digital converters. According to one advantageous embodiment, a three-state binary adder is provided for use in a digital signal processing system. The three-state binary adder is operable to gen... | 02/22/2005 |
| 6859159 | Switched-capacitor structures with enhanced isolation Switched-capacitor structures are provided that reduce distortion and noise in their processed signals because they increase isolation between structural elements and ensure that selected elements are securely turned off in one mode and quickly turned on in another ... | 02/22/2005 |