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| Number | Title | Issue Date |
| 8164498 | Proper frequency planning in a synthetic instrument RF system A system and method for clocking in analog-to-digital (ADC) converter in a synthetic instrument unit is presented. A method begins by applying an input clock to an amplifier to produce an amplified clock. The amplified clock is filtered to produce a filtered clock. ... | 04/24/2012 |
| 7969337 | Systems and methods for two tier sampling correction in a data processing circuit Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes an analog to digital converter, a digital interpolation circuit, a phase error circuit, and a phase adjust... | 06/28/2011 |
| 7916053 | Analog-to-digital conversion module adapted for irregular sampling sequences Apparatus and methods are provided for performing a sampling sequence for a plurality of samples. An analog-to-digital conversion module comprises a sampling module, a register, and a sampling control module coupled to the sampling module and the register. The sampl... | 03/29/2011 |
| 7821437 | Line noise analysis and detection and measurement error reduction A method includes sensing a process parameter to generate a sensor signal that includes a process signal and line noise components, digitizing the sensor signal at a sample rate, detecting line noise zero crossings in the sensor signal, determining a line noise freq... | 10/26/2010 |
| 7629907 | Sampled system agility technique A method of modulating the sampling period of a sampled system with a factor N, and correcting the data stream of the sampling system with the same factor N, thus minimizing distortion artifacts induced by sample frequency modulation. At least a one-period delay fro... | 12/08/2009 |
| 7573409 | Variable sized aperture window of an analog-to-digital converter An improvement in sampling a high frequency input analog signal and converting it to a digital output signal is disclosed. This is accomplished by using a multitude of analog-to-digital converters in conjunction with a distributed sampling system. This combination o... | 08/11/2009 |
| 7561084 | Sliding error sampler (SES) for latency reduction in the ADC path A digital control loop within power switchers and the like includes a sliding error sampler analog-to-digital converter producing an error value for a digital loop iteration. A predictor variably sets the timing for initiating analog-to-digital conversion of the cur... | 07/14/2009 |
| 7495591 | Performing a signal analysis based on digital samples in conjunction with analog samples Testing a device under test—DUT—includes providing a test signal from the DUT to a test probe, taking from the test signal being present at the test probe analog samples at a first sampling rate, taking from the test signal being present at the test probe digita... | 02/24/2009 |
| 7492293 | Variable rate analog-to-digital converter An analog-to-digital converter can use a variable sampling rate. By using a variable sampling rate analog-to-digital converter and an anti-aliasing filter lower sampling rates, and accordingly, generally lower power consumption may be achieved. For example, a lower ... | 02/17/2009 |
| 7456765 | Systems and methods for clock mode determination utilizing master clock frequency measurements A system for determining a data converter clock operating mode includes measurement circuitry which measures a master clock frequency of a master clock signal and a frequency ratio between a frequency of a data clock signal and the master clock frequency. A mapping ... | 11/25/2008 |
| 7439889 | AD converter The ΔΣ AD converter includes: a sampling section for sampling an input signal at each cycle Ts; an AD conversion section for performing AD conversion of the input signal; a DA conversion section for performing DA conversion of an output of the AD conversion sectio... | 10/21/2008 |
| 7439897 | Staggered interleaved Nyquist regions avoid guard band induced holes when sampling a band limited signal Staggered interleaved Nyquist regions associated with differing ADC clock rates (FCLK) avoids spectrum lost through disjoint guard bands at the end of or between adjacent Nyquist regions. The staggered interleaved Nyquist regions overlap by an amount at l... | 10/21/2008 |
| 7424275 | Method and system for sampling a signal A system includes a digital circuit that may be clocked by a digital clock signal having an associated clock period. The system also includes a sample clock generation circuit coupled to a sampling circuit. The sample clock generation circuit may be configured to re... | 09/09/2008 |
| 7379834 | Systems and methods for clock mode determination utilizing hysteresis A system for determining a data converter operating mode includes measurement circuitry operable to measure a master clock frequency of a master clock signal, the master clock frequency measurement biased by a past operating mode selection, and operable to measure a... | 05/27/2008 |
| 7353126 | Method of determining coherent test conditions A method of determining coherent test conditions is disclosed. The method includes receiving constraints from a user, wherein the constraints include desired test conditions, desired tolerances for the desired test conditions, and desired instrument. Further, the me... | 04/01/2008 |
| 7352303 | Systems and methods for clock mode determination utilizing prioritization criteria A system for determining a data converter operating mode includes measurement circuitry that measures a master clock frequency of a master clock signal received without a modification in frequency from a master clock signal source and that measures a frequency ratio... | 04/01/2008 |
| 7352167 | Digital trigger An improved digital trigger circuit has a plurality of data samples extracted from an input electrical signal for each sample clock cycle. The plurality of data samples are compared in parallel with a high threshold level and a low threshold level which provides hys... | 04/01/2008 |
| 7345603 | Method and apparatus for compressed sensing using analog projection Embodiments of the present invention provide a method and apparatus for compressed sensing. In some embodiments, the apparatus (10) generally includes a receiving element (12) operable to receive an input signal, an integrate/dump circuit (14), ... | 03/18/2008 |
| 7339512 | Analog-to-digital converter without track-and-hold A system and method for converting an analog signal to a digital signal is provided. The analog to digital conversion is achieved without a dedicated sample-and-hold circuit. An ADC stage, preferably the front-end stage in the case of a pipeline ADC, samples the inp... | 03/04/2008 |
| 7339509 | Sampling system using sampling apertures of different durations A signal sampling system includes an input signal and a plurality of samplers. The plurality of samplers produces a plurality of sample output signals. Each sampler from the plurality of samplers samples the input signal to produce a corresponding sample output sign... | 03/04/2008 |
| 7336208 | Up and down sample rate converter Sample rate converters (12) for converting input sample rates (F81) of signals into output sample rates (Fs4) are provided with sample rate adapters (3,6) for adapting (basic idea) intermediate sample rates (Fs2)... | 02/26/2008 |
| 7334165 | Signal processing apparatus and a data recording and reproducing apparatus including local memory processor In a data recovery processing, the conventional overhead, primarily, latency due to a rotational recording media is removed. Secondary, in a signal processing or in a recording and reproducing apparatus, reliability of data reproduction is improved by repeatedly pro... | 02/19/2008 |
| 7327302 | Equivalent time asynchronous sampling arrangement An asynchronous sampling arrangement utilizes sampling of both a high speed data signal and a trigger (clock) signal. The data signal may be either an optical signal or an electrical signal. The data and trigger signals are sampled in parallel by two separate gates,... | 02/05/2008 |
| 7319422 | Apparatus and method for AD conversion An analog-to-digital (AD) converting apparatus includes a register, a selecting section and an AD converting section. The register holds a channel specifying data indicating whether each of a plurality of analog signals should be subjected to an AD conversion. The s... | 01/15/2008 |
| 7312729 | Universal sampling rate converter in electronic devices and methods A method and apparatus for converting the sampling rate of digital signals including a decimating comprising a low pass filter (122) and a downsampler (124), wherein the input signal is decimated a number of times based on a ratio of an input sampling ... | 12/25/2007 |
| 7307562 | Spectrally-adjusted sampling methods and structures for digital displays Methods and structures are provided for generating a digital display signal in response to an analog display signal whose amplitude varies at a pixel rate and in response to a synchronization signal that defines spatial order for the analog display signal. The struc... | 12/11/2007 |
| 7298296 | Real-time sample rate converter having a non-polynomial convolution kernel A real-time sample rate converter having a non-polynomial convolution kernel provides reduction in die area and power for performing sample rate conversion in real-time. A non-polynomial convolution kernel, which may be a gaussian operator, is used to determine outp... | 11/20/2007 |
| 7292168 | DSP with variable sample frequency An implantable medical device uses a sampling scheme to obtain digital representation from analog signals. The analog signals represent intracardiac activity. Generally, a detector detects the amplitude of the analog signals and generates first and second difference... | 11/06/2007 |
| 7289049 | Method and apparatus for compressed sensing Embodiments of the present invention provide a method and apparatus for compressed sensing. The method generally comprises forming a first compressed sensing matrix utilizing a first set of time indices corresponding to a first sampling rate, forming a second compre... | 10/30/2007 |
| 7286069 | Systems and methods for clock mode determination utilizing divide ratio testing A system for determining a data converter operating mode includes measurement circuitry for measuring master clock frequency of a master clock signal and a frequency ratio between a frequency of a data clock signal and the master clock frequency and a mapping system... | 10/23/2007 |
| 7262716 | Asynchronous sample rate converter and method An asynchronous sample rate converter interpolates and filters a digital audio input signal to produce a filtered, up-sampled first signal. A FIFO memory receives the first signal and stores samples thereof at locations determined by a write address and presents sto... | 08/28/2007 |
| 7257500 | Signal detecting method and device, and radiation image signal detecting method and system A signal detecting method, which employs correlated double sampling, capable of setting an appropriate baseline sampling time and improving signal-to-noise ratio of the signal. The time constant τ in the low-pass filtering by a first holding circuit, which is const... | 08/14/2007 |
| 7253671 | Apparatus and method for compensating for clock drift in downhole drilling components A precise downhole clock that compensates for drift includes a prescaler configured to receive electrical pulses from an oscillator. The prescaler is configured to output a series of clock pulses. The prescaler outputs each clock pulse after counting a preloaded num... | 08/07/2007 |
| 7253756 | Method and device for dynamically accelerating analog-to-digital converter A method and a device for dynamically accelerating an analog-to-digital converter (ADC) are provided. The device for dynamically accelerating ADC is capable of detecting the sampling frequency and controlling the maximum conversion rate by boosting the current into ... | 08/07/2007 |
| 7240143 | Data access and address translation for retrieval of data amongst multiple interconnected access nodes A low-latency storage memory system is built from multiple memory units such as high-density random access memory. Multiple access ports provide access to memory units and send the resultant data out interface ports. The memory units communicate with the access port... | 07/03/2007 |
| 7236532 | Method of initializing a communication system with different bandwidth receivers and transmitters A method of communicating across a channel includes receiving information having a known bandwidth and a known spectrum. The information is preferably in the form of a multicarrier modulated signal, e.g., a DMT signal. In one aspect, this information is received at ... | 06/26/2007 |
| 7236109 | Systems and methods for clock mode determination utilizing operating conditions measurement A system for determining a data converter operating mode includes measurement circuitry which measures a master clock frequency, measures a frequency ratio between a frequency of a data clock signal and the master clock frequency, and measures a selected operating c... | 06/26/2007 |
| 7228450 | Method and device for the formation of clock pulses in a bus system having at least one station, bus system and station A method for forming clock pulses of a second clock cycle (AT, TT) from clock pulses of a specified first clock cycle (ET) in a bus system having at least one user, a first number (E) of the clock pulses of the first clock cycle being determined or specified in a sp... | 06/05/2007 |
| 7218261 | Method of adjusting sampling condition of analog to digital converter and apparatus thereof A method of adjusting a sampling condition to generate a sampling clock in an analog to digital converter includes performing an analog to digital conversion on an analog input signal to thereby produce a digital sampled signal having a plurality of samples; calcula... | 05/15/2007 |
| 7212139 | System for suppressing aliasing interferers in decimating and sub-sampling systems A novel and useful method and apparatus for suppressing aliasing interferers in decimating and sub-sampling discrete time systems. The present invention is operative to reduce the requirements for or completely eliminate the need for the anti-aliasing filter by dyna... | 05/01/2007 |
