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| Number | Title | Issue Date |
| 7825836 | Limit equalizer output based timing loop A timing loop for generating a channel clock signal for driving an analog to digital converter (ADC) includes a slicer bias loop configured to generate an asymmetry compensation signal for a digital output signal from the ADC, the first adder configured to asymmetri... | 11/02/2010 |
| 7477174 | Method for digital sampling and corresponding implementation device A method for cadence detection in a sequence of video fields is based on at least a search for cadence patterns in a sequence of bits representative of the motion in at least a part of the field from one field to another in the field sequence. The signaling of field... | 01/13/2009 |
| 7432836 | Multiplexed signal conditioner A signal conditioning circuit time share multiplexes anti-aliasing filters and an A/D converter. A plurality of first tier multiplexers each time share multiplex one of a plurality of antialiasing filters between a plurality of AC or baseband input signals from a pl... | 10/07/2008 |
| 7382295 | Control unit for electric power steering apparatus Since an abnormality is judged by executing a square calculating process with respect to sin θ and cos θ for detecting an abnormality in an angular resolver, a processing time is elongated, and a burden to a CPU is great. Since the invention prepares a map which c... | 06/03/2008 |
| 7366966 | System and method for varying test signal durations and assert times for testing memory devices A testing system includes a phase interpolator receiving a clock signal. An output of the phase interpolator is coupled to both a first signal distribution tree that includes a first delay line in each of its branches and a second signal distribution tree that inclu... | 04/29/2008 |
| 7352305 | Method and circuit for interpolating encoder output Two-phase sinusoidal signals QA, QB output from an encoder are interpolated by sample-and-hold (S/H) circuits and A/D conversion (ADC) circuits, and data D is output in accordance with a data request signal RQ from exterior. For this interpolation of encoder output,... | 04/01/2008 |
| 7352293 | Multi-mode encoder output generator Various apparatus and methods of a multi-mode encoder output generator are disclosed. ... | 04/01/2008 |
| 7352304 | Interpolation apparatus in encoder An interpolation apparatus in an encoder includes an analog-to-digital converter for digitizing a sine wave signal and a cosine wave signal, respectively. An amplitude level detecting circuit detects each amplitude level of the digitized sine wave signal and cosine ... | 04/01/2008 |
| 7348897 | Apparatus for transmitting position detection signal of multi-shaft motor An apparatus for transmitting a position detection signal of a multi-shaft motor whereby a parallel-form detection signal that is output from position-detecting devices disposed on each of a plurality of motors and used for indicating a motor rotation position can b... | 03/25/2008 |
| 7340114 | Optical waveguide device and optical modulator An optical waveguide device includes a substrate having an electro-optical effect, an optical waveguide formed on the substrate, an electrode provided for the optical waveguide, a monitoring optical waveguide for guiding part of light outputted from the optical wave... | 03/04/2008 |
| 7324038 | Subranging analog to digital converter with multi-phase clock timing An N-bit analog to digital converter includes a reference ladder, a track-and-hold amplifier connected to an input voltage, a coarse ADC amplifier connected to a coarse capacitor at its input and having a coarse ADC reset switch controlled by a first clock phase of ... | 01/29/2008 |
| 7315355 | Method and device for optical distance measurement A method and a device for optically measuring a distance by emitting an amplitude modulated and bundled optical signal and by receiving the signal reflected from a target object. The modulation frequency is continuously regulated by means of a regulating loop in suc... | 01/01/2008 |
| 7295623 | High-speed communications transceiver A communication system is disclosed that allows high data-rate transmission of data between components. N-bit parallel data is transmitted in K-frequency separated channels on the transmission medium so as to fully take advantage of the overall bandwidth of the tran... | 11/13/2007 |
| 7295509 | Signaling method in an OFDM multiple access system A method for reducing the peak-to-average ratio in an OFDM communication signal is provided. The method includes defining a constellation having a plurality of symbols, defining a symbol duration for the OFDM communication signal, and defining a plurality of time in... | 11/13/2007 |
| 7296164 | Power management scheme for external batteries In a method and system for managing power provided to a load, a power supply system includes a first power peripheral operable to receive and convert a first type of power to a second type of power. Also included in the power supply system is a second power peripher... | 11/13/2007 |
| 7292651 | Pilot-aided channel estimation for OFDM in wireless systems A method and apparatus for pilot-symbol aided channel estimation in a wireless digital communication system which transmits packets of N OFDM data blocks, each data block comprising a set of K orthogonal carrier frequencies. At the transmitter, pilot symbols are ins... | 11/06/2007 |
| 7289048 | Duo-binary encoder and optical duo-binary transmission apparatus using the same A duo-binary encoder performs a parallel processing and an optical duo-binary transmission apparatus using the encoder to enhance transmission capability. The duo-binary encoder has a judgment unit for judging whether an odd number or even number of ‘0’s exists ... | 10/30/2007 |
| 7277519 | Frequency and phase correction in a phase-locked loop (PLL) In one embodiment, a system for frequency and phase correction in a phase-locked loop (PLL) includes a phase frequency detector, first and second charge pumps respectively generating a first current and a voltage, a voltage-to-current (V2I) converter, a current summ... | 10/02/2007 |
| 7271755 | Resistor ladder interpolation for PGA and DAC A voltage interpolation circuit includes a resistive ladder connected between ground and a voltage input and having a plurality of resistors with voltage taps between the resistors. An amplifier (optionally) has first and second capacitors connected together at thei... | 09/18/2007 |
| 7268710 | Logic device for the transformation of the output of the RDC into series A-B pulses A logic device for the transformation of the output of the RDC into series A-B pulses according to the present invention comprises: a chip with its two minimal bits (LSB-LSB-1) simulating as the clock source of A-B pulses, a signal-processing pin (BUSY) which... | 09/11/2007 |
| 7266567 | Absolute encoder and absolute value signal generation method An absolute encoder comprising a first memory operable to store a first absolute value signal produced every constant time period, the absolute value signal representing an absolute value position. A second memory stores a second absolute value signal produced in a ... | 09/04/2007 |
| 7265693 | Method and apparatus for detecting position of movable device A method and apparatus for detecting the position of a movable device are provided, in which an acceleration signal of the movable device is obtained and the acceleration signal is converted to a digital signal using an acceleration sensor; a high level time of the ... | 09/04/2007 |
| 7250880 | Analog to digital converter An analog to digital converter comprising at least two analog to digital conversion engines and a controller for controlling the operation of the analog to digital conversion engines such that during a first phase of an analog to digital conversion process the engin... | 07/31/2007 |
| 7248655 | Digital radio receiver A receiving unit (2) receives a modulated signal resulting from modulating a carrier signal with a digital encoded train resulting from error-correction encoding a digital signal train. A demodulating unit (4) demodulates the digital encoded train from... | 07/24/2007 |
| 7242335 | System on chip for digital control of electronic power devices An integrated digital controller for controlling power electronic devices and method of its use, comprises an analog-to-digital converting scanner module for scanning analog data inputs and used to create digital data correlated with the analog inputs, a loop contro... | 07/10/2007 |
| 7205916 | Digital method and apparatus for resolving shaft position An apparatus and method for determining an angular position of a shaft are disclosed, which comprise resolving an excitation signal at an excitation frequency into at least two orthogonal signals, converting the orthogonal signals to a digital estimate, for each of ... | 04/17/2007 |
| 7193539 | Precoder and optical duo-binary transmission apparatus using the same A precoder for an optical duo-binary transmission apparatus disposing the precoder before a time division multiplexer includes a judgment unit for judging whether an odd number or even number of ‘1’s exist in data input signals of N channels inputted at an n | 03/20/2007 |
| 7190288 | Look-up table delta-sigma conversion Signal conversion is implemented employing a memory system operating as a look-up table that stores a plurality of sets of output samples associated with each of a plurality of respective input samples. The look-up table thus can generate a corresponding set of outp... | 03/13/2007 |
| 7187732 | Start-up automatic frequency control (AFC) method and apparatus Method and apparatus for adjusting the frequency of a voltage controlled oscillator (VCO) at a receiver to synchronize the receiver with the transmitter by correlating a synchronization code channel with training sequences to estimate positive and negative offsets w... | 03/06/2007 |
| 7154947 | Coincidence detection apparatus and method This invention is to allow accurate high-speed coincidence detection while preventing any increase in circuit scale. To achieve this object, a coincidence detection apparatus includes a detector which outputs at least two periodical signals in accordance with the di... | 12/26/2006 |
| 7154495 | Analog interface structures and methods for digital displays Structures and methods are provided for generating a digital display signal from an analog signal that is limited to 2N discrete analog levels and from a synchronization signal that defines spatial order for the digital display signal. These structures an... | 12/26/2006 |
| 7149269 | Receiver for clock and data recovery and method for calibrating sampling phases in a receiver for clock and data recovery A receiver for clock and data recovery includes n sampling latches (SL1 . . . SLn) for determining n sample values (SV1 . . . SVn) of a reference signal (Ref2) at n sampling phases (φ1a . . . (φna) having sampling latch inputs an... | 12/12/2006 |
| 7123175 | Angle detection apparatus computing phase differences between first and second phase angles A resolver use angle detection IC subjected to a phase lock operation so as to follow not an angle θ(t) for detection, but a phase angle ωot±θ(t) having an offset of a frequency ωot in the phase lock units. For this reason, when the excitation frequency ωot is... | 10/17/2006 |
| 7116907 | Acousto-optical tunable filters cascaded together A configuration of acousto-optical tunable filters (AOTF) having stable output characteristics so that the output does not significantly vary with time. The configuration includes a plurality of AOTFs cascaded together. Each AOTF generates a surface acoustic wave in... | 10/03/2006 |
| 7099396 | Multicarrier modulation using weighted prototype functions A method of modulating a multicarrier signal involves obtaining a set of 2M representative complex coefficients of transmitted data. 2LM linear combinations are calculated so as to leave 2M obtained complex coefficients. Coefficients of balancing used in these combi... | 08/29/2006 |
| 7100067 | Data transmission error reduction via automatic data sampling timing adjustment A data transmission error reduction circuit is formed including a delay circuit, a detection circuit and a control circuit. In one embodiment, the delay circuit includes n delay element and multiplexor pairs, selectively employable to apply an aggregate amount of ti... | 08/29/2006 |
| 7085668 | Time measurement method using quadrature sine waves A time measurement circuit includes N time stamping units that each includes a dual sinusoid interpolator for achieving high timing resolution. The time measurement circuit is capable of time stamping input signals at a high re-trigger rate, and is thus well suited ... | 08/01/2006 |
| 7071909 | Reducing sparkle artifacts with low brightness processing A method for reducing sparkle artifacts in a liquid crystal imager, comprises the steps of: low pass filtering only a first lower brightness level signal component of a video signal; and, slew rate limiting only a second lower brightness level signal component of th... | 07/04/2006 |
| 7069209 | Techniques for quantization of spectral data in transcoding A transcoder reduces excess requantization error in quantization of spectral data. The transcoder phase shifts data decompressed by a decompressor. The phase shifting causes a change to corresponding spectral data produced in later transform coding of the decompress... | 06/27/2006 |
| 7066591 | Analog encoder An analog encoder of one embodiment of the invention is disclosed that includes an input mechanism, a digital signal processing mechanism, and an output mechanism. The input mechanism is to receive and digitize different analog encoder signals. The digital signal pr... | 06/27/2006 |
