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| Number | Title | Issue Date |
| 8169347 | Parallel-to-serial converter and parallel data output device A parallel data output device includes a first latch circuit that latches and outputs one of at least two data signals input in parallel in accordance with a first clock signal; a second latch circuit that latches and outputs another of the at least two data signals... | 05/01/2012 |
| 8169348 | Parallel-serial converter circuit In a parallel-serial converter circuit of a multistage configuration, there is formed a clock propagation path so that when multistage connected data converters are operated according to the timing of a clock signal, a reference clock signal or a clock signal in whi... | 05/01/2012 |
| 8169346 | Apparatus and method for processing parallel digital input signals from plurality of circuit breakers An apparatus for processing digital input signals transferred from a plurality of circuit breakers includes: a plurality of signal input terminals configured to receive a plurality of digital input signals, which are generated from the plurality of circuit breakers ... | 05/01/2012 |
| 8154431 | Data generator providing large amounts of data of arbitrary word length A waveform memory 66 stores data streams with each data stream having M-bit parallel data. A sequence memory 60 stores sequence information and data discard information on the amount of data to discard from the last data in each data stream. A sequence... | 04/10/2012 |
| 8106798 | Circuit and method for parallel to serial conversion A parallel to serial conversion circuit makes output data normally swing even in a high-speed operation. The parallel to serial conversion circuit includes a main selection block configured to drive an output node sequentially in response to data on a first line and... | 01/31/2012 |
| 8102288 | Data transmitting circuit and method A data transmitting circuit that converts parallel data into serial data to output the serial data, includes a first data input port that receives first parallel data at a first data rate based on a reference input clock; a second data input port that receives secon... | 01/24/2012 |
| 8094047 | Data serializer apparatus and methods Some embodiments include apparatus and methods having an output line, clock nodes to receive clock signals, the clock signals being out of phase with each other, and selector circuits to receive data in parallel. In at least one embodiment, the selector circuits are... | 01/10/2012 |
| 8081095 | Data output circuit A data output circuit includes: a data generating circuit configured to generate output data; and a serial output circuit configured to receive an address corresponding to the data generating circuit, hold a parallel data input during a time period over which the ad... | 12/20/2011 |
| 8049649 | Parallel-to-serial conversion circuit and method thereof A parallel-to-serial conversion circuit for converting pieces of parallel data into serial data, and a parallel-to-serial converting method thereof include: a shifter configured to sequentially shift an initiation signal to generate a plurality of transfer activatio... | 11/01/2011 |
| 8044833 | High speed serializer According to one embodiment, a high speed serializer for multiplexing 2N data inputs, N being a positive integer, comprises one less than 2N multiplexing cells arranged in N stages. The stages are numbered 1 through N, and the output of the N | 10/25/2011 |
| 8004433 | Semiconductor integrated circuit and transmitter apparatus having the same A semiconductor integrated circuit (10D) for receiving a parallel data signal and a first clock signal and outputting a serial data signal and a second clock signal, wherein a first clock generation circuit (15) produces a third clock signal obtained b... | 08/23/2011 |
| 7994950 | 100BASE-FX serializer/deserializer using 1000BASE-X serializer/deserializer A physical layer (PHY) device including a first encoder, a second encoder, and a selector. The first encoder is configured to receive a first data stream at a first data rate, encode the first data stream using a first type of encoding, and output a first encoded da... | 08/09/2011 |
| 7990294 | Parallel-serial conversion circuit and data receiving system A parallel-serial conversion circuit includes: a plurality of data terminals each receiving a data signal; a selection circuit configured to select at least one of the data signals received through the plurality of data terminals; a first latch circuit configured to... | 08/02/2011 |
| 7990296 | High speed low power cell providing serial differential signals Techniques are provided to serialize and delay parallel input data signals and are particularly useful for low power applications. In one example, a device includes a plurality of data input ports adapted to receive N parallel single-ended input data signals, and a ... | 08/02/2011 |
| 7990295 | Data transfer apparatus A data transfer apparatus includes a clock generation unit to generate a clock signal, a control unit to output parallel data and a reset signal, and a plurality of transmission units. Each of the plurality of transmission units uses continuous rising edges of a bit... | 08/02/2011 |
| 7982639 | Deserializer circuitry including circuitry for translating data signals between different formats or protocols In order to help convert serial data, which includes extra protocol encoding bits, to parallel data having the protocol bits removed (or at least separated from the actual data), the serial data is at least partially deserialized using a low-speed clock having diffe... | 07/19/2011 |
| 7982638 | Data transmission circuit and data communication system A data transmission circuit that converts parallel data signals into a serial data signal to transmit the serial data signal includes a clock generation circuit, an output circuit, and a shift register circuit for securely conducting data communication among interna... | 07/19/2011 |
| 7982640 | Digital signal transmitting apparatus and digital signal transmitting method A digital signal transmitting apparatus includes an encoder which converts parallel input signals of multiple channels into serial data in a manner synchronized with a first clock signal, and a decoder which converts the serial data into parallel output signals of t... | 07/19/2011 |
| 7973682 | Configurations for data ports at digital interface for multiple data converters A data converter includes N analog-to-digital converters (ADCs) to sample multiple analog signals in response to an input clock to produce N signal samples per sample period. For each sample period, the bits of the N signal samples are multiplexed to M sets of multi... | 07/05/2011 |
| 7876245 | Parallel-to-serial converting circuit A parallel-to-serial converting circuit includes a first alignment unit configured to receive and serially align parallel data included in a first group selected from a plurality of parallel data and to output serially aligned parallel data. The parallel-to-serial c... | 01/25/2011 |
| 7864084 | Serializer architecture for serial communications A serializer includes a first stage configured to convert m-bit-wide parallel data into n-bit-wide parallel data, where n is 2x, m≧2x+y, x is an integer of at least 1, and y is an integer of at least 1, where the first stage includes a memory... | 01/04/2011 |
| 7830282 | Semiconductor device A semiconductor device includes a plurality of synchronization blocks configured to sequentially synchronize a plurality of input signals swinging in a complementary metal oxide semiconductor (CMOS) region with multi-phase clock signals to output a plurality of outp... | 11/09/2010 |
| 7821428 | MCU with integrated voltage isolator and integrated galvanically isolated asynchronous serial data link An integrated circuit comprises a first microcontroller unit for executing instructions in accordance with a first clock frequency. The microcontroller located on a first die and includes a first processing core for providing a parallel stream of data in accordance ... | 10/26/2010 |
| 7821429 | Parallel to serial conversion circuit A parallel to serial conversion circuit includes a plurality of switching units and a voltage output unit providing an operating voltage for the switching units. Each of the plurality of switching units is operable to receive a first clock signal and a second clock ... | 10/26/2010 |
| 7796064 | Parallel-to-serial converter A parallel-to-serial converter includes a data input unit configured to receive a plurality of parallel data by using a plurality of clock signals having different phases, and a parallel-to-serial conversion unit configured to sequentially select and output an outpu... | 09/14/2010 |
| 7791512 | 100Base-FX serializer/deserializer using 1000Base-X serializer/deserializer A physical layer (PHY) device includes a first encoder that receives a first data stream at a first data rate, that encodes the first data stream using a first type of encoding, and that outputs first encoded data. A second encoder receives a second data stream at a... | 09/07/2010 |
| 7764206 | Parallel-to-serial data sort device A data sort device for converting parallel data to serial data is disclosed and provided. The data sort device may include a plurality of switches for receiving parallel data, each of which are controlled by a respective control signal and configured to alternatingl... | 07/27/2010 |
| 7728746 | Signal transition feature based coding for serial link Signal transition feature based coding for serial link is described herein. According to one embodiment, in response to a data stream transmitted onto a serial communication link, one or more bits of the data stream are encoded according to bit order determined base... | 06/01/2010 |
| 7719450 | Device for the parallel-serial conversion of several signal parameters each detected by a detector A device for parallel-serial conversion of several evaluation parameters determined respectively by a detector from detected signal values. The device includes a primary buffer memory for the synchronized buffering of each determined evaluation parameter, a synchron... | 05/18/2010 |
| 7692565 | Systems and methods for performing off-chip data communications at a high data rate An electronic device is described. The electronic device includes a first integrated circuit (IC) and a second integrated circuit (IC). The electronic device also includes a multiplexer configured to multiplex a parallel data signal into a serial data signal, and a ... | 04/06/2010 |
| 7642939 | Configurations for data ports at digital interface for multiple data converters A data converter includes multiple analog to digital converters (ADCs) and uses a reduced number of data ports at the digital interface for transferring signal samples. The bits of the signal samples generated in parallel by the ADCs are multiplexed into fewer data ... | 01/05/2010 |
| 7626523 | Deserializer, related method, and clock frequency divider A deserializer and method for deserializing data are disclosed. The method includes converting data from a serial data domain to a parallel data domain, detecting a comma related to the parallel data while the data is in the serial data domain, wherein conversion of... | 12/01/2009 |
| 7551107 | Multiplexer for controlling data output sequence and parallel-to-serial converter using the same Provided are a multiplexer for controlling a data output sequence and a parallel-to-serial converter using the multiplexer. The multiplexer is configured to simply control the output sequence of input data in accordance with a value of a selection signal. The parall... | 06/23/2009 |
| 7528748 | Serial data receiving circuit and serial data receiving method A serial data receiving circuit and a serial data receiving method are provided which are capable of performing interconversion on bit sequences of data bit groups, between LSB first and MSB first, in serial data transmitted serially in successive data bit groups. C... | 05/05/2009 |
| 7492291 | Methods and apparatus for interfacing a plurality of encoded serial data streams to a serializer/deserializer circuit Methods and apparatus are provided for interfacing a plurality of encoded serial data streams, such as Serial Gigabit Media Independent Interface streams, to a serializer/deserializer circuit. A plurality of encoded serial data streams are transmitted by receiving t... | 02/17/2009 |
| 7477172 | 100base-FX serializer/deserializer using 1000base-X serializer/deserializer A transmit path in a physical layer device comprises a first transmit encoding device that has N outputs, that receives a first data stream at a first data rate and that performs a first type of encoding on the first data stream. A second transmit encoding device ha... | 01/13/2009 |
| 7474236 | Method of and apparatus for transmitting digital data A method of transmitting digital data, with which parallel data, which are constituted with first, second and third data sequences each constituting 12-bit word sequence and multiplexed in parallel with one another to form a digital video signal, are first converted... | 01/06/2009 |
| 7468685 | Clockless serialization using delay circuits A serializer is described that incorporates a register and a delay circuit for each serial bit. The serializer provides a timing signal that is generated and output simultaneously with the output of the data bit that ensures close timing alignment of the data bit an... | 12/23/2008 |
| 7450039 | Transmission device and electronic apparatus with self-diagnostic function, and self-diagnostic method for use therein A transmission device includes: parallel/serial conversion units; a clock signal transmission unit; a known-parallel data generation unit for inputting known-parallel data to the parallel/serial conversion units; a clock shift unit for sequentially shifting a clock ... | 11/11/2008 |
| 7440702 | Method for transmitting digital image signal, digital image transmitting device, digital image sending device and digital image receiver A multiplexer of a transmission section generates a clock signal by multiplying a reference clock signal of a digital image signal by a predetermined number ‘K’. A parallel digital image signal is converted into a serial digital signal on the basis of the clock ... | 10/21/2008 |
