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| Number | Title | Issue Date |
| 8183935 | Phased shifted oscilator and antenna This invention describes new and improved phased shifted injection oscillator, a phased shifted injection locked push-push oscillator and a phased array antennas (PAA). The PAAs in accordance with an exemplary embodiment of the present invention are low cost, and th... | 05/22/2012 |
| 8154350 | PLL with continuous and bang-bang feedback controls An apparatus is provided. The apparatus comprising a voltage controlled oscillator (VCO), an amplifier, a switch, a calibration capacitor, and a control loop. The VCO includes a capacitive network that receives a first tuning voltage that is based at least in part o... | 04/10/2012 |
| 8143957 | Current-mode gain-splitting dual-path VCO Techniques to effectively handle large voltage-controlled oscillator (VCO) gain are described. The techniques utilize (1) a slow high-gain path to provide an average control current that adjusts the center frequency of a VCO and (2) a fast low-gain path to provide a... | 03/27/2012 |
| 8138842 | PLL frequency synthesizer A frequency synthesizer includes a voltage-controlled oscillator, a frequency range tuning circuit which detects a frequency control code that sets a voltage-controlled frequency range of the voltage-controlled oscillator corresponding to the frequency division rati... | 03/20/2012 |
| 8134412 | Synchronization of a data output signal to an input clock A digital apparatus for phase aligning output signals of a silicon device to an applied input clock signal in same device allows synchronization of data transfers between the device and another device such as a controller. It includes a digital or analog oscillator ... | 03/13/2012 |
| 8134413 | Low-power oscillator Techniques for synthesizing a signal having a desired frequency from an oscillation signal. In an aspect, a reference signal having a known frequency may be periodically used to determine a ratio between the desired frequency and the frequency of the oscillation sig... | 03/13/2012 |
| 8130047 | Open loop coarse tuning for a PLL In many types of wireless applications (like wireless modems), it is important that the phase locked loops (PLLs) be able to synthesize clock frequencies in a wide tuning range. Because of the complexity of many conventional PLLs (which were deigned to cover wide tu... | 03/06/2012 |
| 8130046 | Frequency calibration of radio frequency oscillators A wireless communication device incorporating a set of comparators and logic interrupt into the local oscillator generation circuit block is described. In one design, the local oscillator circuit block includes a RF VCO with coarse and fine frequency tuning. The RF ... | 03/06/2012 |
| 8120431 | Variable loop bandwidth phase locked loop An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in respon... | 02/21/2012 |
| 8120430 | Stable VCO operation in absence of clock signal A semiconductor device having a phase-locked loop (“PLL”) (100) drives a VCO (114) of the PLL circuit with a first control voltage (VCTRL) produced by a loop filter (112) when a first clock signal (clk_ref) is present. The VCO pro... | 02/21/2012 |
| 8089317 | Phase-locked loop circuit, recording-and-reproducing apparatus, and electronic apparatus A phase-locked loop circuit includes a phase detection unit, a loop filter unit including a series circuit of a resistor and a capacitor, first and second pulse-current output units which supply differential and single-end pulse currents corresponding to phase infor... | 01/03/2012 |
| 8058932 | Digital pulse width modulation device A digital pulse width modulation device includes a counter, a first comparator and a second comparator, wherein the first and second comparators are connected in parallel with each other and in series with the counter. The counter is capable of sending a count signa... | 11/15/2011 |
| 8040191 | PLL circuit with VCO gain control A PLL circuit includes first and second charge pump circuits controlling an output voltage according to an output signal of a phase comparator, a first filter filtering out predetermined frequency component included in a signal generated according to current output ... | 10/18/2011 |
| 8040190 | Phase-locked loop A phase-locked loop includes: a variable oscillator connected to a first resonator, said oscillator being able to deliver an output signal at a first output frequency Fout1, a first frequency divider receiv... | 10/18/2011 |
| 8035451 | On-the-fly frequency switching while maintaining phase and frequency lock A difference between a reference clock and feedback clock is detected to generate a difference signal that is filtered to generate a voltage controlled oscillator control signal and produce an oscillation signal having an oscillation frequency. A first frequency div... | 10/11/2011 |
| 8031009 | Frequency calibration loop circuit A frequency calibration loop circuit having a pre-set frequency channel word (FCW) command value, a bit inputted to obtain a target frequency in an oscillator and a pre-set minimum division ratio n (n is a constant) of a programmable divider, includes: an oscillator... | 10/04/2011 |
| 8031008 | PLL with loop bandwidth calibration circuit A phase locked loop (PLL) with a loop bandwidth calibration circuit is provided. The mixed-mode PLL comprises an analog phase correction path, a digital frequency correction path, a calibration current source, and a loop bandwidth calibration circuit. The analog pha... | 10/04/2011 |
| 8026769 | Frequency-locked clock generator A frequency-locked clock generator includes a voltage-controlled oscillator (VCO), a frequency-to-current converter, a reference current source and a gain stage. The VCO generates an output signal. The frequency-to-current converter generates a converter current pro... | 09/27/2011 |
| 8022773 | Clock signal generation device, and wireless base station A wireless base station (11) includes a wireless communication unit (17) and a clock signal generation unit (20). The clock signal generation unit (20) includes a voltage-controlled oscillation unit (21) that outputs a clock signal... | 09/20/2011 |
| 8013682 | Frequency synthesizer and method for controlling same A frequency synthesizer includes compensation variable capacitance diodes 53 and 54 in a voltage-controlled oscillator 5 in addition to a variable capacitance diode 52 whose DC bias voltage is controlled by a control voltage signal 11 | 09/06/2011 |
| 8008979 | Frequency synthesizer and radio transmitting apparatus A frequency synthesizer (100) can selectively set an output band of VCO, and consumes less power. The frequency synthesizer (100) has a frequency converting circuit (110) that has a mixer (111) and a frequency divider (112) connect... | 08/30/2011 |
| 7999622 | Adaptive phase noise cancellation for fractional-N phase locked loop An embodiment of the invention is a circuit for adaptive phase noise cancellation for a fractional-N PLL. A preferred embodiment employs a split loop filter architecture. Two loop filter halves separately drive half-sized parallel varactors in a voltage controlled o... | 08/16/2011 |
| 7999623 | Digital fractional-N phase lock loop and method thereof A method for reducing a phase noise in a digital fractional-N phase lock loop (PLL) is disclosed. The method comprises: quantifying a time difference between a reference clock and a feedback clock into a time difference signal; generating a residual error signal acc... | 08/16/2011 |
| 7986191 | Self-biased phase locked loop A self-biased PLL includes a first charge pump and a second charge pump, an output terminal of the first charge pump is connected with a discharge-charge capacitor to output a control voltage, an output terminal of the second charge pump is connected with an output ... | 07/26/2011 |
| 7978014 | Digital fast-locking frequency synthesizer A digital PLL frequency synthesizer characterized by fast-locking and low-jitters is presented. The PLL comprises a phase detector, a controllable oscillator, a loop filter having an automatically-adjusted loop gain, a feedback phase integration circuit, and a refer... | 07/12/2011 |
| 7978013 | Phase synchronizing circuit A constant determination unit (90) determines various constants, that are the magnitude of a charge current outputted from a charge pump circuit (30), the time constant of a loop filter (40), and the gain of a voltage controlled oscillator (5... | 07/12/2011 |
| 7973607 | RTC circuit with time value adjustment A technique involves the use of an electronic device having a real-time clock (RTC) circuit. In particular, the technique involves obtaining an RTC value from the RTC circuit. The RTC value is based on a previous time value and being arranged to represent current ti... | 07/05/2011 |
| 7969248 | Oscillator tuning for phase-locked loop circuit In one example, a method of tuning an oscillator of a phase-locked loop (PLL) circuit includes adjusting a coarse control signal to select one of a plurality of frequency tuning curves of the oscillator. The method includes adjusting a fine control signal to select ... | 06/28/2011 |
| 7969247 | Charge pump linearization technique for delta-sigma fractional-N synthesizers A delta-sigma fractional-N frequency synthesizer having a charge pump with error canceling circuitry eliminates a non-linear term from the charge pump transfer function. The charge pump includes a matched pair of charging current sources, each supplying a first curr... | 06/28/2011 |
| 7961054 | Timing recovery for partial-response maximum likelihood sequence detector An embodiment of the present invention is a technique for timing recovery. A frequency acquisition loop locks a voltage controlled oscillator (VCO) clock of a multi-band VCO to a reference clock. The frequency acquisition loop generates first and second feedback clo... | 06/14/2011 |
| 7952436 | Phase lock loop circuit A phase lock loop (PLL) circuit is provided. A voltage controlled oscillator (VCO) generates an output clock signal based on a control voltage. A controller provides a first digital control word, a second digital control word and a loop factor. A frequency modifier ... | 05/31/2011 |
| 7952435 | Phase locked loop and method for compensating temperature thereof Embodiments of a phase lock loop and a method for compensating a temperature thereof can output an initial tuning digital value for a voltage controlled oscillator configured to output a desired phase lock loop frequency compensated according to a temperature change... | 05/31/2011 |
| 7952437 | Quality of phase lock and loss of lock detector A systems and methods for providing phase lock conditions detection, such as a quality of phase lock and loss of lock detection, are described herein. One exemplary method comprises detecting an output frequency, comparing the output frequency with a first reference... | 05/31/2011 |
| 7940128 | High speed PLL clock multiplier The present invention relates to a mixed mode electronic circuit that implements a PLL cell that employs an auto-range algorithm to lock to a wide range of input reference signals. ... | 05/10/2011 |
| 7928805 | Broadband frequency synthesizer for suppressing parasitic low frequency transmissions A broadband frequency synthesizer including a VCO for supplying a high frequency output signal, a dual mode divider circuit, a means for selecting a division mode of the divider circuit, a phase detector and a low pass filter. The divider circuit divides the frequen... | 04/19/2011 |
| 7911281 | PLL circuit and radio communication apparatus A PLL circuit includes: a voltage-controlled oscillator including: a first oscillating portion configured to generate first differential signals; and a second oscillating portion configured to generate second differential signals with a phase difference of 90 degree... | 03/22/2011 |
| 7907017 | Phase locked loop circuit that locks the oscillation frequency to a target frequency In a PLL circuit, an oscillation frequency is quickly and accurately locked to a target frequency. There is provided a PLL circuit, including a VCO that controls the frequency of an output signal according to a voltage of an input signal, a loop divider that divides... | 03/15/2011 |
| 7907018 | Phase noise minimized phase/frequency-locked voltage-controlled oscillator circuit A phase noise minimization circuit is disclosed, to be used in a voltage-controlled oscillator (VCO) circuit embedded in a feedback system. The phase noise minimization circuit includes a noise power meter to analyze the control voltage fed into the VCO by the feedb... | 03/15/2011 |
| 7907016 | Method and system of jitter compensation A phase locked loop frequency synthesizer with jitter compensation having a tapped delay line for compensating the jitter prior to passing a signal subject to jitter through a non-linearity; and, a ΣΔ modulator for generating, or a storing element for pre-generate... | 03/15/2011 |
| 7898343 | Frequency-locked loop calibration of a phase-locked loop gain The present invention relates to a calibrated phase-locked loop (PLL), which has a calibration mode for measuring a tuning gain of a variable frequency oscillator (VFO) and a PLL mode for normal operation. Calibration information based on the tuning gain is used dur... | 03/01/2011 |
