The ice cream cone was invented at the St. Louis Worlds Fair by Ernest Hamwi in 1904. His waffle booth was next to an ice cream vendor who ran short of dishes. Hamwi rolled a waffle to hold ice cream and the cone was born.
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| Number | Title | Issue Date |
| 8179196 | High voltage amplification using low breakdown voltage devices Methods and apparatus for amplifying signals over a wide frequency range to generate high voltage outputs feature a pair of switching modules which are connected in series. Switching modules, e.g., field-effect transistors (FETs), operate based on the voltage differ... | 05/15/2012 |
| 8179197 | Electronic circuits including a MOSFET and a dual-gate JFET Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above ... | 05/15/2012 |
| 8174319 | Amplifier An amplifier includes a first amplifier comprising an N-type field-effect transistor receiving a reference voltage at a gate, a P-type field-effect transistor connected between a drain of the N-type field-effect transistor and a power supply voltage line, and a cons... | 05/08/2012 |
| 8018284 | Method of using integrated power amplifier An output-impedance in a power amplifier is provided. A first transistor QBUF of a buffer stage is connected to a first side of a resistor RF and a second transistor QAMP to a second opposite side of the resistor RF. The f... | 09/13/2011 |
| 8004362 | Gate bias circuit Multiple unit transistors each having the same gate length are arranged in a gate-lengthwise direction to form a group of unit transistors. At least one unit transistor included in the group of unit transistors is used as a part of a gate bias circuit and acts as un... | 08/23/2011 |
| 7969243 | Electronic circuits including a MOSFET and a dual-gate JFET Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above ... | 06/28/2011 |
| 7948317 | Power amplifier integrated circuit with compensation mechanism for temperature and output power A power amplifier integrated circuit, which generates an RF output signal by amplifying an RF input signal, includes a thermal-sensing circuit, a feedback circuit, a logic judging circuit, an adjusting circuit, and an amplifying circuit. The thermal-sensing circuit ... | 05/24/2011 |
| 7944305 | RF pre-amplifiers and power amplifiers An RF amplifier circuit includes a MOSFET connected to an RF output of the circuit via an impedance matching network including an inductor and a tuning capacitor connected in parallel with the inductor and the MOSFET. DC voltage is applied to the MOSFET via a series... | 05/17/2011 |
| 7944304 | High efficiency millimeter wave field-effect transistor (FET) amplifier with coupled line matching network The present invention is a system for providing an optimal power match to an output of an amplifier using a matching network. The system may include a Field-Effect Transistor (FET) amplifier and a load. The system may further include a coupled line matching network ... | 05/17/2011 |
| 7944303 | Super source follower output impedance enhancement A source follower circuit is disclosed with an added amplifier that extends the low input voltage linear range while providing a lower output impedance. The drain of the source follower MOSFET is coupled to a gain stage that drives a second MOSFET (or other type tra... | 05/17/2011 |
| 7932780 | Method for implementation and parameter settings of a voltage enhancement circuit for amplifiers as an integrated circuit (IC) Voltage Enhancement Circuitry (VEC) for amplifiers, suitable of being implemented as an Integrated Circuit (IC), that comprises a VEC driver with a low output resistance (Rdson) while being in its inactive mode and a linearly increasing resistance that is changing l... | 04/26/2011 |
| 7671679 | Semiconductor integrated circuit and amplifier for suppressing pop sound while minimizing voltage transition settling time A semiconductor integrated circuit includes a capacitor element which defines a prescribed decay time constant with one or more resistors, an MOS transistor connected to the capacitor element via its gate, and a constant current generating element which generates a ... | 03/02/2010 |
| 7663440 | Amplifier circuit, semiconductor device, and controlling method An amplifier circuit including a plurality of CMOS (Complementary Metal Oxide Semiconductor) inverter circuits connected in parallel with each other. The CMOS inverter circuits each include a first PMOS (P-channel Metal Oxide Semiconductor) transistor, a first NMOS ... | 02/16/2010 |
| 7659781 | Active resistor used in a feedback amplifier particularly useful for proximity communication An active resistor and its use in a negative feedback amplifier allow wide voltage swings on the input and output signals. One embodiment includes parallel pass-gate MOS transistors of opposite conductivity types connected between the input and output nodes. Bootstr... | 02/09/2010 |
| 7612610 | Active input load wide bandwidth low noise HEMT amplifier A relatively wide bandwidth low noise amplifier with an active input matching network. The active load maybe formed from a field effect transistor (FET) or high electron mobility transistor (HEMT) in a common gate configuration. The active load input matching networ... | 11/03/2009 |
| 7489194 | Common gate with resistive feed-through low noise amplifier A radio-frequency amplifier is provided. The radio-frequency amplifier includes a transistor having an input terminal, an output terminal, a control terminal, and a transconductance gm. A series-connected feed-through resistance Rf and feed-thr... | 02/10/2009 |
| 7439805 | Enhancement-depletion Darlington device An apparatus comprising a Darlington transistor pair comprising a first transistor and a second transistor. The first transistor may have a gate configured to receive an input signal. The second transistor may have a gate coupled to a source of the first transistor.... | 10/21/2008 |
| 7420420 | FET bias circuit The present invention discloses an FET (Field Effect Transistor) bias circuit comprising a current-changing information circuit having a power source, a resistor connected to the signal output end of this circuit, the other end of the resistor connected to a referen... | 09/02/2008 |
| 7420417 | Two-port dual-gate HEMT for discrete device application A two-port dual-gate field-effect transistor for amplifier applications, wherein a self-bias circuit includes a number of passive elements, such as resistors, diodes and capacitors, is utilized to coupled the output of the amplifier with a second gate of the dual-ga... | 09/02/2008 |
| 7420418 | Circuit for improving amplification and noise characteristics for MOSFET, and frequency mixer, amplifier and oscillator using the circuit A circuit for improving amplification and noise characteristics of a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), and a frequency mixer, an amplifier and an oscillator using the circuit are provided. A gate terminal of the MOSFET is connected to a bod... | 09/02/2008 |
| 7391269 | Amplifying circuit The invention provides an amplifying circuit for reducing electric power consumption at a standby mode time. Therefore, in DMOS and NMOS transistors constituting a cascode amplifier, the gate of the DMOS transistor of an initial stage is biased to a grounding voltag... | 06/24/2008 |
| 7368993 | Transconductance circuit with improved linearity A transconductance circuit, comprising: first and second field effect transistors, each having a drain, a source and a gate; wherein the first transistor is in a first current flow path between first and second nodes of the circuit, and is biased so as to operate in... | 05/06/2008 |
| 7368995 | Power amplifier with active bias circuit A power amplifier with an active bias circuit and operating method thereof are provided. The power amplifier comprises a power amplifier transistor and an active bias circuit. The active circuit receives input power and applies a bias voltage to the gate of the powe... | 05/06/2008 |
| 7368994 | Class AB enhanced transconductance source follower A low voltage, high bandwidth, enhanced transconductance, source follower circuit constructed from MOS FET devices, which operates in a class AB mode. The drain current of the source follower is sensed with a folded cascode device. The sensed current is multiplied b... | 05/06/2008 |
| 7366482 | Transmission device, transmission output control method, and radio communications device Either linear operating mode or saturation operating mode is set as the operating mode of a high-frequency power amplifier on the basis of an operating mode set signal. The gain of a variable gain amplifier provided in front of the high-frequency power amplifier and... | 04/29/2008 |
| 7362796 | Signal relay circuit for securing amplitude of voltage of transmitting signals In a signal relay circuit according to the present invention, while a capacitor serves to pass an AC component of a digital signal having a first potential level and a second potential level higher than the first potential level, a first resistor and a second resist... | 04/22/2008 |
| 7358806 | Method and apparatus for an improved power amplifier A power amplifier assembly has a first power amplifier with a first input conditioning circuit. At least first and second amplifiers are in parallel with each other and having inputs and outputs. An input signal is coupled to the inputs of the first and second ampli... | 04/15/2008 |
| 7358816 | Variable gain amplifier A variable gain amplifier (VGA) having stable input impedance matching and a stable noise figure in spite of a variation of an amplification gain is provided. In an embodiment of the VGA, a first stage of a cascode amplification unit has a fixed impedance regardless... | 04/15/2008 |
| 7356092 | Wireless communication system and communication semiconductor integrated circuit device When a transmitting oscillator is built in a communication semiconductor integrated circuit device like a high-frequency IC constituting a wireless communication system, the system prevents degradation of the accuracy of control on the output power of a power amplif... | 04/08/2008 |
| 7355476 | Input stage for an amplifier In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming... | 04/08/2008 |
| 7349681 | Self-biased high-speed receiver A self-biased high-speed receiver is described. The receiver is powered by one power supply with the core operation voltage and one power supply with the IO operation voltage. The receiver is self-biased to provide a stable bias voltage. A reference voltage and an I... | 03/25/2008 |
| 7348850 | Electronic circuit for amplification of a bipolar signal Consistent with an example embodiment, there is an electronic circuit for amplification of bipolar symmetric current signals. The electronic circuit has a pair of complimentary current mirrors. Depending on the polarity of the bipolar current signal one or the curre... | 03/25/2008 |
| 7345528 | Method and apparatus for improved clock preamplifier with low jitter A clock signal preamplifier comprises complementary pairs of differentially coupled transistors, with an output signal coupled to an inverter further comprising a totem-pole arrangement of complementary MOSFET transistors. The input signal to the preamplifier is typ... | 03/18/2008 |
| 7345545 | Enhancement mode transceiver and switched gain amplifier integrated circuit Methods and apparatus are provided for RF switches (504, 612) integrated in a monolithic RF transceiver IC (500) and switched gain amplifier (600). Multi-gate n-channel enhancement mode FETs (50, 112, 114, Q1-3, Q4- | 03/18/2008 |
| 7342453 | Cascode circuit A cascode circuit in which two field effect transistors (“FET”) are connected in cascode has a first FET having its source grounded, a second FET having its source connected to the drain of the first FET, and a Schottky barrier diode having an anode connected to... | 03/11/2008 |
| 7342456 | DC-bias network for a distributed amplifier Systems are disclosed for providing a DC-bias network for a RF distributed amplifier. One embodiment may include a DC-bias network comprising a planar substrate having an input port configured to receive a DC input signal and provide a DC bias at an output port, a m... | 03/11/2008 |
| 7340229 | High frequency amplification circuit and mobile communication terminal using the same A gain control circuit 12 comprises an FET 41 operating as a variable resistor. A gate terminal of the FET 41 is supplied with a control voltage VC applied to a gain control terminal 23. A source terminal and a drain terminal of the FET | 03/04/2008 |
| 7338855 | Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided, wherein a large MIM capacitor including an uneven surface if formed to increase capacitance. The method includes forming a polysilicon layer on a lower metal layer by plasma-enhanced chemical vapor deposit... | 03/04/2008 |
| 7339431 | CMOS amplifiers with frequency compensating capacitors The frequency and transient responses of a CMOS differential amplifier are improved by employing one or more compensating capacitors. A compensating capacitor coupled to a differential input of the CMOS differential amplifier is used to inject current into the diffe... | 03/04/2008 |
| 7336127 | Doherty amplifier configuration for a collector controlled power amplifier An efficient power amplifier circuitry for a mobile terminal or similar wireless communication device is provided. The power amplifier circuitry includes an output stage configured as a collector controlled Doherty amplifier, wherein the collector controlled Doherty... | 02/26/2008 |