Walt Disney was no Mickey Mouse inventor. He devised a serious animation camera which he patented. With the device, his company created "Snow White".
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| Number | Title | Issue Date |
| 6806744 | High speed low voltage differential to rail-to-rail single ended converter A method and system is arranged to convert a differential low-voltage input signal (e.g. LVDS or RSDS) into a single-ended output signal. An operational trans-conductance amplifier (OTA) is configured to convert the input signal into a current. A trans-impedance sta... | 10/19/2004 |
| 6806743 | Semiconductor integrated circuit device The present invention provides a semiconductor integrated circuit device equipped with an input circuit capable of stably performing a high-speed operation up to a low voltage. A rail to rail circuit constitutes a differential input circuit, and a circuit similar to... | 10/19/2004 |
| 6803800 | Negative voltage switch and related flash memory for transferring negative voltage with triple-well transistors A negative voltage switch for use in flash memory. The switch has a control end and two voltage output ends, and includes two inverting units for transferring a positive voltage, two driving units for transferring a negative voltage, and two negative voltage pass-ga... | 10/12/2004 |
| 6803795 | Comparator circuit A comparator circuit includes a differential amplifier including load resistors, for amplifying difference between two input voltages of the comparator circuit; an emitter follower circuit for applying positive feedback with respect to a differential amplifier and o... | 10/12/2004 |
| 6801059 | Comparator with offset voltage A comparator according to the present invention can generate an output signal of low or high level by comparing a first and second input voltages that have a common voltage. An input stage circuit of a comparator according to the present invention receives a common ... | 10/05/2004 |
| 6798251 | Differential clock receiver with adjustable output crossing point Described is a differential clock receiver comprising a converter, a differential input stage, and a differential output stage. The converter converts a control signal indicative of a timing relationship into a DC offset signal. The differential input stage receives... | 09/28/2004 |
| 6791372 | Active cascode differential latch An active cascode differential latch for providing a logic output signal indicative of whether or not a first current is greater than a second current. The first and second currents are fed into two input ports of the active cascode differential latch. The active ca... | 09/14/2004 |
| 6791371 | Power-down activated by differential-input multiplier and comparator A power-down mode is activated when equal voltages are detected on a pair of differential inputs. The voltage difference across the differential inputs is applied to a multiplier, which generates a squared difference. The squared difference is smoothed and filtered ... | 09/14/2004 |
| 6788099 | System and method for effectively implementing an active termination circuit in an electronic device A system and method for effectively transferring electronic information in an electronic device may include a transmission line that connects a source device and a destination device. The foregoing transmission line may be implemented to include a conductor A and a ... | 09/07/2004 |
| 6784818 | Analog to digital converter with interpolation of reference ladder An N-bit analog to digital converter includes a reference ladder connected to an imput voltage at one end, and to ground at another end, an array of differential amplifiers whose differential inputs are connected to taps from the reference ladder, wherein each ampli... | 08/31/2004 |
| 6781445 | Low power large signal RF tuned buffer amplifier Methods and apparatus for buffering RF signals. A method includes receiving an input signal, wherein the input signal alternates between a first polarity and a second polarity. From the input signal, a first current is generated, wherein the first current is proport... | 08/24/2004 |
| 6777983 | Differential voltage transmission circuit A differential voltage transmission circuit. The reference bias circuit outputs a first reference voltage, a second reference voltage and a reference current corresponding to a reference current adjusting signal. The differential comparator compares the difference b... | 08/17/2004 |
| 6768442 | Advanced digital antenna module An Advanced Digital Antenna Module (ADAM) for receiving and exciting electromagnetic signals. The ADAM ASIC integrates a complete receiver/exciter function on a monolithic SiGe device, enabling direct digital-to-RF (Radio Frequency) and RF-to-digital transformations... | 07/27/2004 |
| 6762628 | METHOD FOR OPERATING A COMPARATOR AND A PRE-AMPLIFIER OF AN INTEGRATED CIRCUIT, WHICH PRE-AMPLIFIER IS CONNECTED IN SERIES TO THE COMPARATOR, AS WELL AS AN INTEGRATED CIRCUIT ARRANGEMENT COMPRISING A COMPARATOR AND A PRE-AMPLIFIER WHICH IS CONNECTED IN SERIES TO THE COMPARATOR The invention relates to a method for operating a comparator (10) and a pre-amplifier (20) of an integrated circuit, which pre-amplifier is connected in series to the comparator, wherein the comparator (10) is operated with clock pulses in order... | 07/13/2004 |
| 6759887 | Mixer circuit A mixer circuit includes a local frequency multiplication unit including a pair of transistors having bases receiving local oscillation waves inverted in phase. A reference transistor is differentially connected with the pair of transistors. The pair of transistors ... | 07/06/2004 |
| 6759701 | Transistor circuit MOS transistors A and B form a transistor circuit (an inverter in this case). A MOS transistor D is one for interrupting leakage current that has a channel length longer than those of the MOS transistors A and B. Under the action of an enable terminal (Enable), the ... | 07/06/2004 |
| 6744286 | System and method for comparator threshold adjustment A system and method are provided for compensating a comparator threshold level. The method comprises: accepting an input signal with an ac component; lowpass filtering the input signal to generate the input signal average voltage; accepting the input signal average ... | 06/01/2004 |
| 6737892 | Method and apparatus for detecting valid clock signals at a clock receiver circuit One embodiment of the present invention provides a system for detecting a valid clock signal at a clock receiver. The system operates by receiving a clock signal at the clock receiver, and directing the clock signal into a control input of a voltage-controlled varia... | 05/18/2004 |
| 6734722 | Method for reducing area in continuous-time filter for low frequency applications A transconductor includes a first transistor having a first electrode electrically coupled to a first node, a control electrode electrically coupled to a first input voltage, and a second electrode connected to a third node; a second transistor having a first electr... | 05/11/2004 |
| 6727732 | High speed differential signal detection A method and a circuit detect the presence of a high-speed signal, such as a high-speed differential signal, based on a software-programmable signal amplitude threshold. In one embodiment, when the amplitude threshold is exceeded, a current is generated to charge a ... | 04/27/2004 |
| 6720798 | Class AB digital to analog converter/line driver A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and ... | 04/13/2004 |
| 6714053 | Fast set reset latch with complementary outputs having equal delay and duty cycle For use in a strobed comparator circuit of the type comprising a decision circuit and a set-reset (SR) latch for holding an output of the decision circuit, an apparatus and method is disclosed for reducing output delay between two complementary output signals of the... | 03/30/2004 |
| 6710734 | Parallel AD converter An interpolation parallel AD converter is provided in which a switch is installed at each pre-amplifier in a first pre-amplifier array for selectively short-circuiting a portion between a comparison input end and a reference input end thereof, while a load transisto... | 03/23/2004 |
| 6707410 | Digital pixel sensor with a dynamic comparator having reduced threshold voltage sensitivity A digital pixel sensor architecture has a comparator located within the pixel and a frame memory located outside the pixel. The comparator is used with additional circuitry to perform analog-to-digital conversion. Replacing the analog-to-digital converter and memory... | 03/16/2004 |
| 6703872 | High speed, high common mode range, low delay comparator input stage The comparator input stage uses low voltage transistors 20 and 21 as the input pair. They have a small threshold voltage, and hence support a low common mode. The circuit includes a current sink 22 coupled to the input pair 20 and 21; a first resistor 33 ... | 03/09/2004 |
| 6700438 | Data comparator using non-inverting and inverting strobe signals as a dynamic reference voltage and input buffer using the same A data comparator using a dynamic reference voltage and an input buffer using the same. The data comparator comprises a comparator circuit for receiving a data signal and a pair of non-inverting/inverting signals, which are periodic and complementary. The... | 03/02/2004 |
| 6683479 | Multiphase comparator A multiphase comparator circuit includes a first differential stage; a first switching arrangement for connecting an output of the first differential stage to an input of a load circuit; and two or more regeneration stages. Each regeneration stage is conn... | 01/27/2004 |
| 6680626 | High speed differential receiver A differential receiver having a pair of cross-coupled signal conditioning devices improves transition time and data signal integrity. In an embodiment, the differential receiver includes two signal input nodes and a plurality of transistors, and two sign... | 01/20/2004 |
| 6670859 | Differential ring oscillator stage The present invention relates to a differential ring oscillator stage, comprising differential delay means (Q1, Q2) having a first input (IN+) and an inverse second input (IN-) and a first output and an inverse second output, a first output buffer means (... | 12/30/2003 |
| 6664814 | Output driver for an integrated circuit A circuit and method for driving the output signal, having a common-mode voltage and an output swing, of an integrated circuit. In accordance with an aspect of an embodiment of the present invention, a first power supply provides the termination voltage f... | 12/16/2003 |
| 6650149 | Latched active fail-safe circuit for protecting a differential receiver A fail-safe circuit for a differential receiver can tolerate noise. A latch is enabled when both differential inputs V+, V- rise above a reference voltage that is close to Vcc. The latch, once enabled, is set by an offset amplifier, signaling the fail-saf... | 11/18/2003 |
| 6642771 | Integrated XOR/summer/multiplexer for high speed phase detection A high speed phase detector utilizes an integrated XOR/SUMMER/MUX circuit having a higher bandwidth and lower power than conventional designs. The XOR/SUMMER/MUX circuit combines the functionality of two parallel XOR devices in series with a summer/multip... | 11/04/2003 |
| 6639431 | Differential input comparator A comparator circuit is disclosed that senses a differential input polarity even when operating with a common mode voltage near the power rails (e.g., 50 millivolts) and under a wide range of process, temperature, and power supply conditions. In one aspec... | 10/28/2003 |
| 6639427 | High-voltage switching device and application to a non-volatile memory A high voltage switching device includes a switching circuit for switching a high voltage to an output line and for providing a control signal. The high voltage switching device also includes a switching transistor connected to the switching circuit for s... | 10/28/2003 |
| 6636109 | Amplification circuit with constant output voltage range An amplification circuit of the present invention includes a first MOS transistor having a gate to which a first input terminal for inputting a positive logic input signal or a reference potential is connected and a drain to which a first load is connecte... | 10/21/2003 |
| 6630847 | Rail-to-rail CMOS comparator A full rail-to-rail CMOS comparator is provided. The comparator includes a gain stage and a bias stage. The bias stage is responsive to the common mode input voltage level to provide a bias signal that maintains the gain stage with an optimum operating ra... | 10/07/2003 |
| 6628150 | System and method to speed-up operation of a driver Transitions (e.g. high to low and/or low to high) associated with operation of the driver are employed to implement control, which can be applied as a pulse in response to an occurrence of the transition. The control operates to speed up the transition at... | 09/30/2003 |
| 6624667 | Comparator and analog-to-digital converter A comparator for an analog-to-digital converter having a tri-state inverter provided on the side where an input of a data register section is located, wherein the need for a switch on the input side in the data register section is eliminated to allow redu... | 09/23/2003 |
| 6617887 | Differential comparator with offset correction A differential comparator having offset correction and common mode control for providing stable op amp output that changes only due to the original inputs coming into the comparator. The difference comparator has increased common-mode difference tolerance... | 09/09/2003 |
| 6617886 | Differential pair with high output signal crossover A buffer circuit includes a differential pair output switch having an additional NPN device and resistor operational to increase the common mode output voltage of the buffer during a switching event, such that the voltage movement at the common emitter no... | 09/09/2003 |