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| Number | Title | Issue Date |
| 8149018 | Sense amplifier and electronic apparatus using the same A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second tra... | 04/03/2012 |
| 8058908 | Level detector, voltage generator, and semiconductor device A level detector, a voltage generator, and a semiconductor device are provided. The voltage generator includes a level detector that senses the level of an output voltage to output a sensing signal and a voltage generating unit that generates the output voltage in r... | 11/15/2011 |
| 8049534 | Low-power high-speed differential driver with precision current steering In bipolar CMOS or BiCMOS process technologies, drivers (such as mixed mode or hybrid mode drivers) using both bipolar and CMOS transistors (i.e., field effect transistors or FETs) may have undesirable properties, such as reduced speed, ringing, latch-up, or lower e... | 11/01/2011 |
| 8049535 | Sense amplifier for low voltage high speed sensing A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input o... | 11/01/2011 |
| 7898299 | Current sense amplifier A system includes a current sense amplifier to receive an input voltage based on a sense current provided to load circuitry. The current sense amplifier is configured to generate an output voltage from the input voltage based, at least in part, on one or more reconf... | 03/01/2011 |
| 7855583 | Sense amplifier for low voltage high speed sensing A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input o... | 12/21/2010 |
| 7847598 | Sense amplifier and electronic apparatus using the same A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second tra... | 12/07/2010 |
| 7825698 | Method and apparatus for systematic and random variation and mismatch compensation for multilevel flash memory operation Method and means for random or systematic mismatch compensation for a memory sensing system are disclosed. A sense amplifier includes a bulk voltage source to set the bulk of the sensing transistor to be a voltage different than the voltage driving the sensing trans... | 11/02/2010 |
| 7804333 | Input buffer circuit An input buffer circuit is disclosed. The input buffer circuit includes a buffer configured to receive an input signal and differentially amplify and buffer the received input signal, and a current regulator for regulating the amount of current in the buffer at a tu... | 09/28/2010 |
| 7710162 | Differential amplifier A differential amplifier includes an amplification unit and a feedback unit. The amplification unit amplifies a voltage difference between a first input signal and a second input signal and outputs a first output signal and a second output signal. The feedback unit ... | 05/04/2010 |
| 7701256 | Signal conditioning circuit, a comparator including such a conditioning circuit and a successive approximation converter including such a circuit A signal conditioning circuit for a latching comparator comprising first and second transistors arranged in a long tail pair, the long tail pair having an active load and configured to act as an integrator. ... | 04/20/2010 |
| 7616028 | Sense amplifier for low voltage high speed sensing A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input o... | 11/10/2009 |
| 7579876 | Multi-use input/output pin systems and methods Systems and methods provide multi-use input/output (I/O) pads for an integrated circuit. For example in accordance with an embodiment, the multi-use pads may be shared to support different integrated circuit functions via the pads, such as selectively for high-speed... | 08/25/2009 |
| 7525346 | Driver circuits and methods In one system embodiment, the system is characterized by: a differential amplifier including but not limited to at least one amplifying transistor having an emitter coupled directly to a ground. In one embodiment of a method of making a system, the method is charact... | 04/28/2009 |
| 7518411 | Data receiving apparatus using semi-dual reference voltage A semi-dual reference voltage data receiving apparatus includes a first input buffer, a second input buffer, and a phase detector wherein the first input buffer includes a first input receiving unit, a first sense amplifier, and a first current offset controlling un... | 04/14/2009 |
| 7511538 | Data input buffer in semiconductor device A data input buffer in a semiconductor is capable of avoiding operation speed deterioration of the data input buffer due to the temperature condition or process characteristic. The data input buffer in a semiconductor device includes an input detecting unit for dete... | 03/31/2009 |
| 7456662 | Differential circuit, output buffer circuit and semiconductor integrated circuit for a multi-power system An output buffer circuit includes: a differential circuit; and first and second load circuits coupled between the differential circuit and a high power supply voltage VDDH. Such a differential circuit includes first and second NMOS transistors having low-voltage gat... | 11/25/2008 |
| 7453289 | Transmission circuit, CMOS semiconductor device, and design method thereof A transmission circuit, which transmits a differential signal having pulse time larger than a predetermined minimum pulse time, includes: a driving unit for feeding the differential signal as a potential difference between two transmission lines; a driven unit for o... | 11/18/2008 |
| 7443207 | Differential output circuit with stable duty A differential output circuit includes a bias circuit connected with a first voltage. An input circuit section includes first and second MOS transistors of a first conductive type, and the first and second MOS transistors are connected with the first voltage through... | 10/28/2008 |
| 7432743 | Data input butter for use in a semiconductor device The present invention provides a semiconductor design technology, in particular a data input buffer for use therein. This data input buffer secures a data level sensing margin in a weak data transmission cycle upon an asymmetrical data pattern transmission. Specific... | 10/07/2008 |
| 7429881 | Wide input common mode sense amplifier According to embodiments of the subject matter disclosed in this application, a wide input common mode sense amplifier may include a level shifter stage and an amplifier stage. The level shifter comprises a CMOS differential amplifier that has a rail-to-rail input c... | 09/30/2008 |
| 7411420 | High-speed input signal receiver circuit An input integrating circuit and a differential amplifier circuit are provided in a receiver circuit which samples a pair of differential input signals, detects the levels of said pair of input signals, and latches the detected levels. The above-mentioned input inte... | 08/12/2008 |
| 7411431 | Dual output differential line driver using single current Box switches are stacked sharing a common current from power sources. The power sources may be current, voltage or a combination of such sources. In preferred embodiments, the transistor switches in the box switches may be paralleled by different polarity transistor... | 08/12/2008 |
| 7400183 | Voltage controlled oscillator delay cell and method A delay cell circuit (200) is disclosed. The delay cell circuit may include a differential stage (202) and a cross-coupled stage (204). The cross-coupled stage can include resistors (210-0 and 210-1) the function to r... | 07/15/2008 |
| 7378881 | Variable gain amplifier circuit Embodiments of a variable gain amplifier circuit are described. In one embodiment, multiple resistor devices are coupled in series to form a string of resistor devices and to receive an input current. A multiple input operational amplifier device has an amplifier ou... | 05/27/2008 |
| 7368955 | Current-balanced logic circuit In accordance with some embodiments, a current-balanced logic circuit includes a first sense amplifier, a second sense amplifier, and a current-source transistor which provides bias current to the first and second sense amplifiers. The first and second sense amplifi... | 05/06/2008 |
| 7362153 | Receiver latch circuit and method In some embodiments, a receiver latch circuit, includes a dynamic latch having at least one input terminal to receive an input data signal and at least one latch terminal. The dynamic latch is adapted to generate an amplified output data signal based at least in par... | 04/22/2008 |
| 7358777 | Current feedback amplifiers Current feedback amplifiers circuits that generate common mode (CM) and/or differential mode (DM) currents are provided herein. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objec... | 04/15/2008 |
| 7345512 | Sense amplifier for low voltage high speed sensing A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input o... | 03/18/2008 |
| 7339403 | Clock error detection circuits, methods, and systems Clock error detections circuits can detect clock duty cycle error and/or quadrature phase error. During an evaluation phase, capacitors are charged. During an evaluation phase, the capacitors are unequally discharged based on the error. A positive feedback mechanism... | 03/04/2008 |
| 7336108 | Semiconductor integrated circuit with stepped-up voltage pump circuit A semiconductor integrated circuit includes a pump circuit configured to raise an external power supply voltage to generate a stepped-up voltage, and a detector circuit configured to detect the stepped-up voltage generated by the pump circuit to control activation/d... | 02/26/2008 |
| RE40075 | Method of multi-level storage in DRAM and apparatus thereof A method of processing data having one of four voltage levels stored in a DRAM cell is comprised of sensing whether or not the data voltage is above or below a voltage level midway between a highest and a lowest of the four levels, setting the voltage on a reference... | 02/19/2008 |
| 7327620 | Differential input buffer for receiving signals relevant to low power Disclosed herein are exemplary embodiments of an improved differential input buffer for receiving low power signals and associated methods. The disclosed buffer circuit comprises at least one differential amplifier for receiving as inputs an enable signal (e.g., a c... | 02/05/2008 |
| 7327621 | Current sense amplifier with lower sensing error rate by using smaller sensing current difference A sensing amplifier comprising a program cell current sensing circuit, an erase cell current sensing circuit and a latch circuit is provided. Each of the program and erase cell current sensing circuits further comprises a plurality of program/erase memory cells, a f... | 02/05/2008 |
| 7327184 | Low-power multi-level pulse amplitude modulation driver and semiconductor device having the driver A low-power multi-level pulse amplitude modulation (PAM) driver, and a semiconductor device having the same, in which the multi (M)-level PAM driver includes a load unit, first and second current sources, a pair of first input transistors, a pair of second input tra... | 02/05/2008 |
| 7323911 | Differential sense amplifier circuit and method triggered by a clock signal through a switch circuit A differential sense amplifier is described that can be configured as a preamplifier or a latch circuit as triggered by a clock signal connected to a switch circuit. When the clock signal is set at a first signal level, the switch circuit in the differential sense a... | 01/29/2008 |
| 7308044 | Technique for receiving differential multi-PAM signals A technique for receiving differential multi-PAM signals is disclosed. In one particular exemplary embodiment, the technique may be realized as a differential multi-PAM extractor circuit. In this particular exemplary embodiment, the differential multi-PAM extractor ... | 12/11/2007 |
| 7307867 | Over-driven access method and device for ferroelectric memory An over-driven access method and device for ferroelectric memory. When accessing the data stored in a ferroelectric memory, the invention further provides an over-driven current to slightly reduce/raise the voltages in bit lines BL and BL′ to further enlarge the v... | 12/11/2007 |
| 7301373 | Asymmetric precharged flip flop A flip-flop circuit includes a differential stage coupled to a latch stage. The differential stage comprises cross-coupled dynamic logic and only provides a single output to the latch stage. During an evaluation phase, the state of a data input signal is sensed. Dep... | 11/27/2007 |
| 7298180 | Latch type sense amplifier A latch type sense amplifier includes a latch unit, an amplifying unit and a circuit module for charging or discharging the latch unit. The latch unit is configured by two sets of serially coupled PMOS and NMOS transistors, whose gates and drains are cross-coupled. ... | 11/20/2007 |
