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| Number | Title | Issue Date |
| 7830197 | Adjustable integrator using a single capacitance An integrating amplifier on an IC, which comprises a feedback loop using an external device as an integrating capacitor, has added a second feedback loop that provides an additional current to the input of the amplifier, which current can be used to increase the inp... | 11/09/2010 |
| 7626442 | Low latency multi-level communication interface A memory system uses multiple pulse amplitude modulation (multi-PAM) output drivers and receivers to send and receive multi-PAM signals. A multi-PAM signal has more than two voltage levels, with each data interval now transmitting a “symbol” at one of the valid ... | 12/01/2009 |
| 7541858 | Integration circuit, decrement circuit, and semiconductor devices An ignitor comprising a circuit with a millisecond order time constant and with a minimum circuit size and area, which is capable of self-shutdown without leading to erroneous ignition upon detection of an abnormality. An ignitor 1 capable of self-shutdown up... | 06/02/2009 |
| 7439515 | Pipeline processing of pulse pile-up correction in a nuclear medicine imaging system Correction of scintillation event data from a nuclear medicine imaging system for effects of pulse pile-up is carried out by separating event data packets into total energy and individual detector energy data packets, executing pile-up correction algorithms on each ... | 10/21/2008 |
| 7417485 | Differential energy difference integrator Embodiments of the invention are generally directed to a high-speed differential energy difference integrator (EDI) for adaptive equalizers. In an embodiment, the EDI includes two differential full-wave rectifiers providing differential outputs that are cross-couple... | 08/26/2008 |
| 7372717 | Methods for resistive memory element sensing using averaging A system for determining the logic state of a resistive memory cell element, for example an MRAM resistive cell element. The system includes a controlled voltage supply, an electronic charge reservoir, a current source, and a pulse counter. The controlled voltage su... | 05/13/2008 |
| 7365597 | Switched capacitor amplifier with higher gain and improved closed-loop gain accuracy A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the ... | 04/29/2008 |
| 7352826 | Analog delay circuit An analog delay circuit to impart a group delay to an analog input signal is described. The analog delay circuit may comprise a capacitor to impart at least a portion of the group delay to the analog output signal and a buffer circuit coupled between the capacitor a... | 04/01/2008 |
| 7332967 | Variable gain amplifier with low phase variation A VGA is provided that is designed to reduce or even eliminate entirely variations in phase response/shift with changes in gain. Compensation is made for parasitic capacitances of elements in the VGA that would otherwise cause variation in phase with changes in gain... | 02/19/2008 |
| 7332950 | DLL measure initialization circuit for high frequency operation A memory device, delay lock loop circuit (DLL) and DLL reset circuitry are described. The DLL includes a shift register and a measured delay for pre-loading the shift register. The reset circuitry selectively filters a clock signal propagation through the measured d... | 02/19/2008 |
| 7334148 | Optimization of integrated circuit device I/O bus timing The invention includes a method to adjust integrated circuit device I/O bus timing. In one embodiment, the method includes comparing an alignment between an edge of a first clock signal to a center of a data packet to produce an alignment offset signal and adjusting... | 02/19/2008 |
| 7330390 | Noise resistant small signal sensing circuit for a memory device Apparatus and method for data sensing circuitry that uses averaging to sense small differences in signal levels representing data states. The apparatus periodically switches the coupling of input terminals and output terminals of an integrator circuit from a first c... | 02/12/2008 |
| 7323911 | Differential sense amplifier circuit and method triggered by a clock signal through a switch circuit A differential sense amplifier is described that can be configured as a preamplifier or a latch circuit as triggered by a clock signal connected to a switch circuit. When the clock signal is set at a first signal level, the switch circuit in the differential sense a... | 01/29/2008 |
| 7315476 | System and method for communicating information to a memory device using a reconfigured device pin System and method for communicating information to and from memory devices. In one embodiment, the invention includes a memory system having a memory device having at least one extraneous device pin, a memory controller configured to control the memory device and a ... | 01/01/2008 |
| 7315200 | Gain control for delta sigma analog-to-digital converter Gain control for delta sigma analog-to-digital converter. A method is disclosed for driving the input of an integrator in a delta-sigma converter having an amplifier with a non-inverting input, an output and a positive input connected to a reference voltage and an i... | 01/01/2008 |
| 7308044 | Technique for receiving differential multi-PAM signals A technique for receiving differential multi-PAM signals is disclosed. In one particular exemplary embodiment, the technique may be realized as a differential multi-PAM extractor circuit. In this particular exemplary embodiment, the differential multi-PAM extractor ... | 12/11/2007 |
| 7301392 | Tunable resonator for use in active-RC continuous-time filters An integrated circuit (IC) resonator in which resonator parameters potentially affected by IC fabrication processes are correctable after fabrication. Resonance frequency tuning is effected by forming each feedback capacitor in a pair of integrator circuits to inclu... | 11/27/2007 |
| 7301391 | Filtering variable offset amplifier A current summing FIR filter can be implemented with multiple differential input stages and variable tail currents. The variable tail currents can be used to appropriately weight the present and previous digital input signals. The weighted outputs of the differentia... | 11/27/2007 |
| 7301371 | Transmitter of a semiconductor device Embodiments of the present invention provide a transmitter of a semiconductor device, which can output signals corresponding to input signals having various common mode levels and amplitudes. The transmitter may include a pre-driver unit, main driver unit, and a con... | 11/27/2007 |
| 7254077 | Circuit and method for high speed sensing A circuit and method for sensing a difference between a first signal, such as a signal from the source side of a memory cell, and a second signal, such as a signal from a reference dummy cell, includes developing first and second voltages respectively in response to... | 08/07/2007 |
| 7247862 | Afterglow detection and count rate generation in a nuclear imaging system The afterglow and count rate/dead time of a nuclear imaging detector are calculated for use in correcting event detection and energy integration circuits. Energy value signals and event triggering signals are respectively integrated as a function of the decay settin... | 07/24/2007 |
| 7246284 | Integration type input circuit and method of testing it An input interface circuit is provided which includes an input transistor for receiving a digital input signal, a circuit for generating a reference value, and an integrating capacitor connected in series to a pair of current conducting electrodes of the input trans... | 07/17/2007 |
| 7235737 | Electromagnetic shielding sleeve which is intended, for example, to protect bundles of cables for use in aeronautics A tubular electromagnetic shielding sleeve has a longitudinal slit. The inventive sleeve includes a substrate (11) and a layer (12) of electrically-conductive material which is fixed to the inner face of the substrate (11), the layer (12)... | 06/26/2007 |
| 7233175 | Amplitude limiting circuit An amplitude limiting value can be set to an intended value of a designer and the dependence of the amplitude limiting value on the temperature can be avoided. An amplitude limiting circuit according to the present invention includes a pair of first conductivity typ... | 06/19/2007 |
| 7230985 | Look-ahead decision feedback equalizing receiver A look-ahead decision feedback equalizing receiver includes an equalizing block for amplifying a high-frequency component of an external data signal fed thereto in response to a first and a second input signal, to provide a first and a second equalized external data... | 06/12/2007 |
| 7227413 | Audio amplification device with antipop circuitry An audio amplification device includes an input for receiving an input audio signal and an output for delivering an output audio signal and an amplifier (OA1) comprising a differential pair of MOS transistors. The gate of the first transistor is coupled to th... | 06/05/2007 |
| 7224193 | Current-voltage conversion circuit A CV conversion circuit capable of measuring a plurality of capacitances with a simple circuit is provided. A time-division signal is applied to each capacitor, whereby a plurality of capacitances of the capacitors can be measured in series by a circuit with a small... | 05/29/2007 |
| 7203859 | Variable clock configuration for switched op-amp circuits A clock configuration for driving switched op-amp circuits operated in opposite phases is presented in which a common off-phase of variable length is inserted between the on-phases of the individual operational amplifiers. The length of the off-phase can be adapted ... | 04/10/2007 |
| 7180357 | Operational amplifier integrator An integrator circuit comprises an operational amplifier which has a transistor stage (1) with an input terminal (4) and an output terminal(3), a feedback capacitor (2) connected between the input terminal (4) and the output termin... | 02/20/2007 |
| 7176724 | High speed chip-to-chip communication links A very low voltage swing is used to achieve very high data rates (up to 4 Gbps double data rate) at very low power consumption. A differential signaling approach is used for noise rejection, and a constant current approach also is used to minimize switching noise. | 02/13/2007 |
| 7173230 | Electromagnetic wave detection arrangement with capacitive feedback An approach is provided for detecting EM waves using a photodetector coupled to an amplifier stage. The amplifier stage uses capacitive feedback to reduce or cancel intrinsic capacitance of the photodetector. A variety of capacitance structures may be used to provid... | 02/06/2007 |
| 7164997 | Bus line current calibration Disclosed herein is a method and system for calibrating line drive currents in systems that generate data signals by varying line drive currents and that interpret the data signals by comparing them to one or more reference voltages. The calibration includes varying... | 01/16/2007 |
| 7164379 | Pipeline analog to digital converter An analog to digital conversion circuit includes a first circuit (10) for receiving an analog signal (16) applied to an input (e.g., 26) of the first circuit via a connection to an analog source (e.g., 18) and generating a first residue (... | 01/16/2007 |
| 7161513 | Apparatus and method for improving resolution of a current mode driver A method for improving resolution of a current mode driver. The current mode driver is operable to provide an output that falls within a predetermined range. An embodiment of the method includes sensing a condition, such as a process condition, a voltage condition a... | 01/09/2007 |
| 7158422 | System and method for communicating information to a memory device using a reconfigured device pin A system and method for communicating information to and from memory deices. In one embodiment, the invention includes a memory system having a memory device having at least one extraneous device pin, a memory controller configured to control the memory device and a... | 01/02/2007 |
| 7158729 | Optical receiving device Provided is an optical receiving device which can achieve a wide dynamic range while keeping a constant extinction ratio against the changes in the input amplitude. A signal current of a light receiving element is converted to a signal voltage by an amplifier and th... | 01/02/2007 |
| 7139364 | X-ray-tomographic imaging apparatus, X-ray-tomographic imaging method, and program An X-ray-tomographic imaging apparatus for obtaining image data on a predetermined tomographic section of a subject with efficiency and effectiveness by using a plurality of X-ray projection images achieved by a plurality of X-rays that is made incident on the tomog... | 11/21/2006 |
| 7139544 | Direct down-conversion receiver with transconductance-capacitor filter and method A direct-down conversion receiver may include a transconductance-capacitor (GmC) filter to filter undesirable mixing products and provide a filtered baseband-differential signal. The GmC filter may include first and second transconductance-capacitor (GmC) circuits i... | 11/21/2006 |
| 7138848 | Switched capacitor integrator system A switched capacitor integrator system includes an input cascoded amplifier circuit; a summing junction; an integrating switched capacitor circuit connected to the output of the input cascoded amplifier circuit and to the summing junction; the integrating switched c... | 11/21/2006 |
| 7133307 | Resistive memory element sensing using averaging A system for determining the logic state of a resistive memory cell element, for example an MRAM resistive cell element. The system includes a controlled voltage supply, an electronic charge reservoir, a current source, and a pulse counter. The controlled voltage su... | 11/07/2006 |
