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| Number | Title | Issue Date |
| 7436238 | Integrated voltage switching circuit An integrated circuit can be switched between operating modes without the need for a dedicated mode selection pin. A circuit for operation at a specified maximum supply voltage comprises first and second supply terminals, a first signal input for application of a re... | 10/14/2008 |
| 7408396 | High voltage protection circuit Disclosed is a circuit to provide protection from an over voltage signal. The circuit protects against load dumps or positive transients applied to any electronic unit. The circuit isolates the protected circuitry from the transient voltage by two ways. The circuit ... | 08/05/2008 |
| 7376358 | Location specific optical monitoring An optical spike is generated at an arbitrarily selected location within an arbitrary optical link. The optical spike is generated by deriving a spike signal having a plurality of components, and launching the spike signal into the a transmitter end of the optical l... | 05/20/2008 |
| 7362157 | Circuit arrangement with a transistor having a reduced reverse current A circuit arrangement is disclosed herein having an input terminal configured to receive an input voltage, and an output terminal to provide an output voltage for a load. A first transistor with a load path and a control terminal is connected between the input termi... | 04/22/2008 |
| 7348809 | Input buffer In one embodiment, the present invention includes an input buffer with a common gate amplifier having input terminals coupled to receive an incoming common mode voltage. The common gate amplifier may be configured to receive the incoming common mode voltage over a w... | 03/25/2008 |
| 7330704 | Electrical signal pre-conditioning A method and circuitry for pre-conditioning an electrical signal. The method comprises limiting the strength of the signal to not exceed a limit signal strength corresponding to the onset of substantial non-linear response of an amplifier to which the limited signal... | 02/12/2008 |
| 7327620 | Differential input buffer for receiving signals relevant to low power Disclosed herein are exemplary embodiments of an improved differential input buffer for receiving low power signals and associated methods. The disclosed buffer circuit comprises at least one differential amplifier for receiving as inputs an enable signal (e.g., a c... | 02/05/2008 |
| 7323922 | Digitally controlled gain stage having an analogue control input A signal processing system has a first, digitally controlled, gain element, a second, analogue controlled, gain element and a gain control unit configured to receive a gain request signal and to generate a first gain control signal to be input to the first gain elem... | 01/29/2008 |
| 7276954 | Driver for switching device A driver for a switching device has a plurality of driver circuits for driving the switching device and a control circuit. The control circuit selectively operates the driver circuits in response to a plurality of predetermined drive modes. Alternatively, a driver f... | 10/02/2007 |
| 7269551 | Apparatus including an error detector and a limiter for decoding an adaptive differential pulse code modulation receiving signal An apparatus for decoding encoded voice data comprises a demodulator (101) which demodulates the encoded voice data (RF) and provides a demodulated encoded voice data (APO, RD), an adaptive differential pulse code modulation decoder (102) which decodes... | 09/11/2007 |
| 7266406 | Magnetic resonance apparatus In a magnetic resonance apparatus, the transmission coil for generating the radiofrequency excitation field is stationarily arranged. The geometry of the transmission coil is permanently prescribed. For acquiring the magnetic resonance signal, the reception arrangem... | 09/04/2007 |
| 7262470 | Semiconductor device With a microwave FET, the internalized Schottky junction capacitance or pn junction capacitance is small and these junctions are weak against static electricity. However, with a microwave device, a protecting diode could not be connected since the increase of parasi... | 08/28/2007 |
| 7253064 | Cascode I/O driver with improved ESD operation A cascode I/O driver is described that includes a barrier formed in the shared region between the two transistors. The barrier region allows the I/O driver to be designed to primarily meet I/O requirements. Accordingly, improved operating speeds are achieved. An sys... | 08/07/2007 |
| 7248095 | Bus driver with well voltage control section A bus driving device is provided with a driver circuit for driving a bus line thereof. The driver circuit includes an MOS transistor whose well is separated from other circuits. Further, the bus driving device is provided with a voltage control section for adjusting... | 07/24/2007 |
| 7245174 | Analogue switch A switching circuit (20) comprising first and second switch terminals (2,3) and a switch (21). The switch (21) comprises a first bipolar transistor (22), having a collector connected to the first switch terminal (2) and an e... | 07/17/2007 |
| 7245171 | Voltage clamping circuit for a bicycle dynamo A voltage clamping circuit comprises a first high current gain circuit adapted to receive current from the first line; and a first switching circuit that turns on the first high current gain circuit to flow current away from the first line when the first switching c... | 07/17/2007 |
| 7215178 | MOS type semiconductor integrated circuit device A plurality of MOS type circuits is provided, and are connected in a multistage manner. A first transistor is inserted between a power source voltage VDD and a power supply node of each of MOS type circuits at an odd numbered stage. A second transistor is inserted b... | 05/08/2007 |
| 7212640 | Variable attack and release system and method Variable attack and release system and method are disclosed for dynamically modifying the various elements of the system, including modifying compander response time to dynamically adjust for changing parameters such as environmental or input signal changes, to main... | 05/01/2007 |
| 7209332 | Transient detection circuit A transient detection circuit which may be used in an electrostatic discharge (ESD) clamp circuit. The transient detection circuit includes a filter circuit and an inverter circuit. The voltage switch point of the inverter circuit has a constant voltage offset from ... | 04/24/2007 |
| 7196890 | Electrostatic discharge protection power rail clamp with feedback-enhanced triggering and conditioning circuitry Electrostatic discharge protection circuitry includes a timing circuit operably coupled between the high supply side and low supply side of an associated circuit. The timing circuit has an RC node used for triggering a series of inverters configured to control an ES... | 03/27/2007 |
| 7190292 | Input level adjust system and method A method of matching input amplitudes in a system wherein one or more of a plurality of inputs may be selected, with each input capable of having different characteristics, involving selecting an input signal and mapping the input signal to a predetermined signal am... | 03/13/2007 |
| 7180797 | Reduced power registered memory module and method A registered memory module includes a plurality of flip-flops having respective data terminals, respective clock terminals receiving a clock signal and output terminals coupled to a plurality of SDRAM devices in the module. A logic gate decodes respective chip selec... | 02/20/2007 |
| 7154309 | Dual-mode output driver configured for outputting a signal according to either a selected high voltage/low speed mode or a low voltage/high speed mode An integrated circuit includes a dual mode output driver configured for outputting an output signal according to either a high voltage mode or a low voltage mode, and a controller for controlling the dual mode output driver at the selected mode. The dual mode output... | 12/26/2006 |
| 7135908 | Input stage resistant against high voltage swings An input stage includes a signal input (IN) for receiving an input signal s(t) and a digital input stage (15) designed for operation at a supply voltage (VDD). The input stage (15) includes CMOS transistors, which are sensitive to voltages across trans... | 11/14/2006 |
| 7126370 | Power gating techniques able to have data retention and variability immunity properties A power gated semiconductor integrated circuit comprises: (1) logic circuit to be power gated, said logic circuit having a virtual ground rail; (2) footer device disposed between said virtual ground rail and a ground rail for reducing power consumption of said logic... | 10/24/2006 |
| 7123076 | Semiconductor integrated circuit A semiconductor integrated circuit according to the present invention comprises a circuit as a controlled object including an MOS transistor, wherein a control potential (at least one of a substrate potential and source potential) is to be controlled, a control sign... | 10/17/2006 |
| 7123059 | Output stage resistant against high voltage swings Circuit comprising a signal input (11) for receiving an input signal (s(t)) and a digital output stage (15) being designed for operation at a supply voltage (VDD). The output stage (15) comprises a series of two n-channel CMOS transis... | 10/17/2006 |
| 7119586 | Circuit arrangement for control of a semiconductor circuit A circuit arrangement for control of a regulated path and a semiconductor circuit (1) comprises a control connection, with an input, to which a switching signal (3) for control of the semiconductor circuit (1) is applied, an output, to which the... | 10/10/2006 |
| 7116537 | Surge current prevention circuit and DC power supply A surge current prevention circuit and DC power supply for preventing surge current in various operation applications with a small circuit configuration. A power switch connects an external power supply and a load. A first PMOS transistor is connected to a constant ... | 10/03/2006 |
| 7110560 | Electret condensor microphone preamplifier that is insensitive to leakage currents at the input A preamplifier having extremely high input impedance amplifies the electrical signal output from an electret condenser microphone (ECM) without suffering from the effects of a DC leakage current at the input. The preamplifier circuit includes a pair of cross-coupled... | 09/19/2006 |
| 7098717 | Gate triggered ESD clamp The clamp circuit of the present invention comprises a low voltage, thin oxide MOS transistor and a trigger element comprising a timing element and at least one inverter. The source and drain of the MOS transistor are connected between a first node and a second node... | 08/29/2006 |
| 7095084 | Emitter switching configuration and corresponding integrated structure An emitter switching configuration having at least one bipolar transistor and a MOS transistor having a common conduction terminal and a Zener diode inserted between a control terminal of the bipolar transistor and the common conduction terminal. A monolithic struct... | 08/22/2006 |
| 7079439 | Low power auto-refresh circuit and method for dynamic random access memories A power saving circuit disables input buffers for command and address signals during an auto-refresh of a DRAM. The input buffers are re-enabled at the end of the auto-refresh in a manner that does not cause spurious commands to be generated. The power saving circui... | 07/18/2006 |
| 7072231 | Reduced power registered memory module and method A registered memory module includes a plurality of flip-flops having respective data terminals, respective clock terminals receiving a clock signal and output terminals coupled to a plurality of SDRAM devices in the module. A logic gate decodes respective chip selec... | 07/04/2006 |
| 7057450 | Noise filter for an integrated circuit A noise filter for an integrated circuit is proposed. The noise filter comprises a CMOS inverter and two capacitors. The input of the CMOS inverter is coupled with an input pad of the integrated circuit and the output of the CMOS inverter is coupled with an input bu... | 06/06/2006 |
| 7057425 | Propagation of a dynamic signal to a quasi-differential receiver biased by an ungrounded driver-side bias signal In one disclosed method, a dynamic signal is driven onto a driven end of a first signal line, and an ungrounded bias signal is driven onto a driven end of a second signal line. The ungrounded bias signal is then received at a receiving end of the second signal line,... | 06/06/2006 |
| 7055069 | Spare input/output buffer An integrated circuit (“IC”) package includes an input/output (“I/O”), a spare I/O circuit, and a resident IC for processing data. The I/O circuit is coupled with a plurality of external pins, which provide external electrical connections for the communicati... | 05/30/2006 |
| 7027981 | System output control method and apparatus Output control system and method includes calculating gain for an input signal, detecting a predetermined condition, and modifying the gain calculation in accordance with one or more kneepoints to provide a varying output signal. A companding ratio is then establish... | 04/11/2006 |
| 6985020 | Inline predistortion for both CSO and CTB correction An inline predistortion circuit for producing composite second order (CSO) and composite triple beat (CTB) distortion correction of a laser transmitter is disclosed having an RF input signal, a diode for producing nonlinear current, and a DC voltage bias for control... | 01/10/2006 |
| 6977524 | High current 5V tolerant buffer using a 2.5 volt power supply Using at best a 2.5V nominal power supply, 3.3V technology can be used to implement a 5V tolerant open drain output buffer. High voltage and/or current tolerance is achieved with only the 2.5V power supply. A p-channel FET transistor is connected between a power sup... | 12/20/2005 |
