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| Number | Title | Issue Date |
| 8248135 | Circuit including current-mode logic driver with multi-rate programmable pre-emphasis delay element A circuit (10) includes a circuit input (12), a circuit output (16) and a one or more delay elements (22) positioned between the circuit input (12) and the circuit output (16). The delay elements (22) each include a d... | 08/21/2012 |
| 7403057 | CML delay cell with linear rail-to-rail tuning range and constant output swing A current mode logic (CML) delay cell with linear rail-to-rail tuning range and constant output swing. The CML delay cell can include a tuning voltage input on a first and second transistor, contributing to a CML delay cell load, and a bias voltage input on a third ... | 07/22/2008 |
| 7385426 | Low current offset integrator with signal independent low input capacitance buffer circuit A buffer circuit (318) including a first half circuit and a second half circuit. Each half circuit includes a first MOS transistor (M4, M9) as the input device and a source follower, a second MOS transistor (M23, M22) as a transcon... | 06/10/2008 |
| 7355488 | Differential amplifier for use in ring oscillator A differential amplifier circuit for use in a ring oscillator includes first and second MOS transistors to each source of which an operating power source voltage is applied, and which individually respond to first and second input signals with mutually contrary phas... | 04/08/2008 |
| 7307483 | Electronic oscillators having a plurality of phased outputs and such oscillators with phase-setting and phase-reversal capability Disclosed are multiphase oscillators comprising a plurality of delay stages serially coupled in a loop by a plurality of nodes, with the loop being folded to provide two concentric rings of delay stages with equal numbers of allocated nodes. A second plurality of ne... | 12/11/2007 |
| 7283596 | PAM-4 data slicer having symmetrical offset A PAM-4 data slicer includes first, second, and third comparators which provide first, second, and third thresholds, respectively. Each of the comparators has an offset. The first and third comparators have an offset generating arrangement at their outputs to provid... | 10/16/2007 |
| 7276950 | Prevention of the propagation of jitters in a clock delay circuit The clock delay circuit according to the present invention includes a delay circuit section, a selection circuit section, and jitter suppression elements. The delay circuit section provides a plurality of delay clock signals that are obtained by delaying a clock sig... | 10/02/2007 |
| 7202726 | Voltage controlled oscillator delay cell A voltage-controlled oscillator design is disclosed that provides greater tuning range than a prior art differential amplifier design using “varactor” diodes. The design employs CMOS capacitors to replace varactor diodes. The CMOS capacitors are formed from PMOS... | 04/10/2007 |
| 7187248 | Differential oscillator having two sides, an integrated circuit including the differential oscillator, a mobile telephone including the differential oscillator, and method of operating the differential oscillator A differential oscillator circuit, including an oscillator having a first side and a second side and bias circuitry for applying a bias voltage to the first and second sides of the oscillator wherein the bias circuitry is arranged such that, upon start-up, the bias ... | 03/06/2007 |
| 7176737 | Phase-locked loop and delay-locked loop including differential delay cells having differential control inputs A differential delay cell is provided herein that not only receives a pair of differential input values, but also receives a pair of differential control values for delaying the differential input values to produce a pair of differential output values. As such, a de... | 02/13/2007 |
| 7148726 | Digital signal buffer circuit A delay circuit is provided with a plurality of variously sized equalization transistors, a plurality of equalization resistors having different resistance values, a plurality of equalization capacitors having difference capacitance values, and switch circuits. The ... | 12/12/2006 |
| 7145377 | Device and method for converting an input signal A device for converting an input signal having a bipolar pulse with a positive part and a negative part of same duration, into a difference signal includes a delay member with an input for receiving the input signal and an output. The delay member delays the input s... | 12/05/2006 |
| 7116147 | Circuit and method for interpolative delay A circuit and a method for interpolative delay is provided. The circuit includes a delay locked loop with interpolation delay. The delay locked loop includes a differential inverter, an interpolation circuit, and a differential compare circuit. The differential inve... | 10/03/2006 |
| 7116141 | Frequency-doubling delay locked loop A frequency multiplier circuit comprising a delay line receiving at one end thereof a reference clock for generating clock tap outputs from respective ones of a plurality of period matched delay elements; a clock combining circuit responsive to pairs of tap outputs ... | 10/03/2006 |
| 7106142 | Ring-type voltage oscillator with improved duty cycle A ring-type voltage-controlled oscillator with a good duty cycle for use in a PLL frequency synthesizer. The delay cell circuit used in the ring-type VCO comprises two first inverters, two resistance units, and a differential delay circuit. The inverters receive res... | 09/12/2006 |
| 6967515 | Single-ended to differential conversion circuit with duty cycle correction A circuit to provide a differential signal output in response to a single-ended signal input, the circuit allowing for a wide common-mode input signal by providing complementary amplifier structures. ... | 11/22/2005 |
| 6963251 | High noise rejection voltage-controlled ring oscillator architecture A ring oscillator circuit, such as a VCO, with a relatively high level of noise rejection for noise originating from both the voltage supply and ground. The ring oscillator circuit is composed of a plurality of differential delay circuits, each differential delay ci... | 11/08/2005 |
| 6943608 | Wide frequency range voltage-controlled oscillators (VCO) A structure for a delay cell in a Voltage-Controlled Oscillators (VCO) and method for operating the delay cell. The delay cell comprises a latch and an impedance circuit (comprising resistance and capacitance elements). The impedance circuit electrically couples dif... | 09/13/2005 |
| 6909316 | Variable delay circuit with high resolution Variable delay circuits and methods for delaying a waveform by an adjustable time delay are disclosed herein. One such variable delay circuit comprises a delay range limitation circuit having a first differential input, a first differential output, and a second diff... | 06/21/2005 |
| 6888389 | Digital control variable delay circuit which is hardly susceptible to noise A digital control variable delay circuit includes n amplitude control units which are connected in parallel and each of which receives a pair of input clock signals to be supplied to a differential pair and receives m-bit digital control signals, and a waveform shap... | 05/03/2005 |
| 6870415 | Delay generator with controlled delay circuit A delay circuit generates delayed signals. The delay circuit includes a delay locked loop having an input terminal coupled to a periodic input signal, the delay locked loop generating one or more delayed periodic signals and a control signal for controlling the time... | 03/22/2005 |
| 6828866 | High noise rejection voltage-controlled ring oscillator architecture A ring oscillator circuit, such as a VCO, with a relatively high level of noise rejection for noise originating from both the voltage supply and ground. The ring oscillator circuit is composed of a plurality of differential delay circuits, each differential delay ci... | 12/07/2004 |
| 6737901 | Integrable, controllable delay device, delay device in a control loop, and method for delaying a clock signal using a delay device A delay device has multiplexers connected in series in a differential configuration. First connections of the multiplexers are connected to the output of an upstream multiplexer. Second inputs of the multiplexers are connected to the input connection to which the si... | 05/18/2004 |
| 6696897 | System and method for voltage controlled oscillator phase interpolation A system and method are provided for controlling the phase of a voltage controlled oscillator output. The method comprises: accepting a plurality of VCO outputs coarsely differentiated by phase; selecting one of the VCO outputs; finely modifying the phase... | 02/24/2004 |
| 6677825 | Ring oscillator circuit and a delay circuit The ring oscillator circuit is made by connecting K units of inverter circuits U11, U12, . . . , U1K in a ring shape. The inverter circuit U11 comprises a CMOS inverter IV1 which includes MOS transistors MP4 and MN4, a P-channel MOS transistor MP3 which f... | 01/13/2004 |
| 6657503 | High noise rejection voltage-controlled ring oscillator architecture A ring oscillator circuit, such as a VCO, with a relatively high level of noise rejection for noise originating from both the voltage supply and ground. The ring oscillator circuit is composed of a plurality of differential delay circuits, each differenti... | 12/02/2003 |
| 6642761 | Interface circuit of various clock period between a fast slope signal and a very slow slope, voltage controlled delay cell A particular wide band interface circuit provides an interface between a very fast slope clock signal input and a very slow slope voltage controlled delay cell of a delay lock loop. The invention generates the internal clock signal to track the slope of e... | 11/04/2003 |
| 6535070 | Variable frequency oscillator, and phase locked loop and clock synchronizer using thereof The variable frequency oscillator is capable of operation at a low power supply voltage and oscillating at a high frequency. A phase locked loop and a clock synchronizer use the variable frequency oscillator and have a wide oscillation frequency range. Th... | 03/18/2003 |
| 6512420 | Variable frequency oscillator utilizing selectively combined dual delay paths A variable frequency oscillator provides an output frequency that is adjustable by selectively combining different delay signals from separate signal paths. The present invention's oscillator includes first and second differential signal paths, each exhib... | 01/28/2003 |
| 6501317 | High speed, low-power CMOS circuit with constant output swing and variable time delay for a voltage controlled oscillator A delay circuit is provided for use in a ring oscillator of a phase locked loop (PLL). The delay circuit includes a differential pair of NMOS transistors 102 and 103 with an NMOS transistor 101 providing the tail current for the differential pair. Complem... | 12/31/2002 |
| 6472944 | Voltage controlled oscillator with delay circuits A VCO (voltage-controlled oscillator) that can realize stable oscillation operation over a broad frequency range with a low level of jitter. The VCO includes a plurality of basic cells having differential input/output, and a center frequency adjustment ci... | 10/29/2002 |
| 6426662 | Twisted-ring oscillator and delay line generating multiple phases using differential dividers and comparators to match delays A phase-locked loop (PLL) or a delay-locked loop (DLL) has differential delay stages with differential outputs driving differential clock inputs to a pair of differential toggle flip-flops. One flip-flop changes state on the rising edge and the other on t... | 07/30/2002 |
| 6414557 | High noise rejection voltage-controlled ring oscillator architecture A ring oscillator circuit, such as a VCO, with a relatively high level of noise rejection for noise originating from both the voltage supply and ground. The ring oscillator circuit is composed of a plurality of differential delay circuits, each differenti... | 07/02/2002 |
| 6348839 | Delay circuit for ring oscillator A delay circuit for a ring oscillator includes a first electric potential line, a pair of output lines, a pair of two first transistors arranged between the first electric potential line and the pair of output lines, respectively, a second electric potent... | 02/19/2002 |
| 6268753 | Delay element that has a variable wide-range delay capability A precision wide-range variable delay system whose delay is independent of process, voltage, and temperature variations. A delay controller supplies a voltage, that is independent of process, voltage, and temperature variations, and that is used in a dela... | 07/31/2001 |
| 6255881 | High tunability CMOS delay element The delay element consists of a differential amplifier (M15, M8, M2, M6, M5) in which the load transistors (M2, M5) are associated to respective gate biasing transistors (M21, M22) connected in a source follower configuration, and to feedback transistors ... | 07/03/2001 |
| 6215364 | Variable frequency oscillator, and phase locked loop and clock synchronizer using thereof The variable frequency oscillator is capable of operation at a low power supply voltage and oscillating at a high frequency. A phase locked loop and a clock synchronizer use the variable frequency oscillator and have a wide oscillation frequency range. Th... | 04/10/2001 |
| 6177822 | Variable phase shifting circuit manufactured in simple integrated circuit A variable phase shifting circuit includes a resistance unit and a variable capacitance unit. The resistance unit includes at least one resistor element. The resistance unit input a first signal and a second signal and also output a third signal and a fou... | 01/23/2001 |
| 6133773 | Variable delay element A method and apparatus for an adjustable phase interpolator is provided. The adjustable phase interpolator includes a phase interpolator circuit that has a voltage input and a voltage output. The adjustable phase interpolator further includes a controllab... | 10/17/2000 |
| 6087903 | Voltage-controlled oscillator with variable output frequency from oscillation circuit A voltage-controlled oscillator has a feedback circuit connected to the gate of a transistor which controls a current flowing through an oscillation unit. The feedback circuit applies a voltage depending on the DC voltage of an oscillated signal to the ga... | 07/11/2000 |
