Class 327/199 - Circuit having only two stable states (i.e., bistable)

Subclass of Class 327 - Miscellaneous active electrical nonlinear devices, circuits, and systems
Definition: Subject matter including a circuit with exactly two
No. of patents: 301
Last issue date: 02/14/2012

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Number	Title	Issue Date
8115530	Robust time borrowing pulse latches Configurable time-borrowing flip-flops may be based on configurable pulse generation circuitry and pulse latches. The circuitry may use a self-timed architecture that controls the width of clock pulses that are generated so that the pulse latches that are controlled...	02/14/2012
8076964	Sampling circuit A sampling circuit for use in a semiconductor device, includes a first sampling unit configured to sample a data signal in synchronism with a reference clock signal and output a first output signal, a second sampling unit configured to sample a delayed data signal i...	12/13/2011
8072251	Latch circuit and electronic device A latch circuit includes: four or more gates; three input terminals and one or two output terminals which are connected to at least one of the four or more gates; a feedback circuit in which respective input terminals of the four or more gates are connected to outpu...	12/06/2011
7966589	Structure for dynamic latch state saving device and protocol The invention comprises a design structure for a dynamic voltage state-saving latch electrical circuit comprising a charge device adapted as a storage element, an integrated recovery mechanism, a supply voltage rail connected to the charge device, a hold signal allo...	06/21/2011
7956661	Standard cell and semiconductor device The present invention provides a standard cell and a scan flip flop circuit capable of introducing a scan test also to a system LSI having an ACS circuit. One standard cell is configured by: a 3-input selection circuit for selecting one signal from three input signa...	06/07/2011
7795939	Method and system for setup/hold characterization in sequential cells An on-chip logic cell timing characterization circuit is provided. Also provided are a method of conducting setup/hold characterization on a sequential cell and a method of characterizing propagation delay on a logic cell. A sequential cell on which setup/hold time ...	09/14/2010
7768329	Semiconductor device A shift register capable of supplying only a necessary clock signal to a necessary unit register with simple constitution. A semiconductor device is provided with a shift register in which a plurality of stages of unit registers is connected, in which the unit regis...	08/03/2010
7714627	Double-triggered logic circuit A double-triggered logic circuit is a composite circuitry consisting of a plurality of PMOS, NMOS, inverters and a signal line. It includes an AND logic circuit and a XNOR logic circuit to generate an adjustable pulse mode to solve the problem of threshold voltage l...	05/11/2010
7649394	Latch circuit A latch circuit (1) comprising a first input device (10a) in a first branch (4a) and a second input device (10b) in a second branch (4b). The latch circuit comprises a first estimator unit (40a...	01/19/2010
7626433	Flip-flop circuit assembly A flip-flop circuit arrangement having a total of four differential amplifiers (1, 2, 3, 4), which are connected to one another to produce a D flip-flop, is specified. According to the suggested principle, the two shared emitter nodes (E1, E2) o...	12/01/2009
7521976	Low power high speed latch for a prescaler divider A high-speed latch is disclosed that can function at high-speed input clocking frequencies. The active loads used within the latch design exhibit an input impedance that is inductive to the rest of the circuit to improve the driving capability of the overall latch i...	04/21/2009
7518426	Low power flip-flop circuit and operation A low power flip-flop circuit and its operation are described. In one example, the circuit includes a clocked gate for producing an output in response to an input when a clock is received, and a clock control circuit to receive the clock and the input, to determine ...	04/14/2009
7443217	Circuit and method to balance delays through true and complement phases of differential and complementary drivers A circuit for balancing delays through true and complement phases of complementary drivers includes: a first driver; a second driver; a first delay device coupled to an input of the first driver and having an input coupled to an input signal node; a second delay dev...	10/28/2008
7443218	Semiconductor integrated circuit with pulsed clock data latch A low power consumption in a semiconductor integrated circuit device can be achieved by reducing a glitch power in a flip-flop. In a pulse-generator-incorporated auto-clock-gating flip-flop in which data latch is performed by using a pulsed clock, input data is latc...	10/28/2008
7427884	Semiconductor device A shift register capable of supplying only a necessary clock signal to a necessary unit register with simple constitution. A semiconductor device is provided with a shift register in which a plurality of stages of unit registers is connected, in which the unit regis...	09/23/2008
7427875	Flip-flop circuit Signal delivery delay margin of a bypass flip-flop circuit is stabilized during high-frequency operation. An input controller for logically operating a bypass signal and a clock produces first and second output signals having different states depending on whether or...	09/23/2008
7417481	Controlling signal states and leakage current during a sleep mode A circuit includes an input terminal, an output terminal and a latch. The input terminal receives an input signal. The latch is programmable with a value. The latch communicates the input signal to the output terminal in response to the circuit not being in a sleep ...	08/26/2008
7414449	Dynamic scannable latch and method of operation A latch has a first mode in which the latch functions as a dynamic latch and a second mode in which the latch functions as a static latch. The latch has a feedback circuit that in turn has two parallel switchable loads. The first load is responsive to a data input s...	08/19/2008
7411413	Pulse latch circuit and semiconductor integrated circuit The disclosed invention is intended to decrease the power consumption of a pulse latch circuit. A pulse latch circuit that operates in sync with a pulsed clock signal, including a first operation mode in which shifting test pattern scan data is performed and a secon...	08/12/2008
7405605	Storage elements using nanotube switching elements Data storage circuits and components of such circuits constructed using nanotube switching elements. The storage circuits may be stand-alone devices or cells incorporated into other devices or circuits. The data storage circuits include or can be used in latches, ma...	07/29/2008
7388417	Output circuit of a semiconductor memory device and method of outputting data in a semiconductor memory device An output circuit of a semiconductor memory device includes a first data path, a second data path and a third data path. The first data path transfers a sense output signal, and latches the sense output signal to output the sense output signal to a first node. The s...	06/17/2008
7378869	Lookup table circuits programmable to implement flip-flops A lookup table (LUT) is programmable to function as a flip-flop. The LUT includes a plurality of memory cells, a plurality of transmission gates, and first and second logic gates. The transmission gates are coupled between the memory cells and an output terminal of ...	05/27/2008
7373575	Method and apparatus for generating expect data from a captured bit pattern, and memory device using same Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly captured. A first group of the applied data signals is captured, and a group of expect data signals are generated ...	05/13/2008
7362154	Radiation hardened latch A programmable phase frequency divider for space applications is implemented in CMOS technology, and consists of three radiation hardened D-type flip flops and combinational logic circuits to provide the feedback controls that allow programmable frequency division r...	04/22/2008
7352222	Clock generator with programmable non-overlapping-clock-edge capability A system and method for generating and optimizing clock signals with non-overlapping edges on a chip using a unique programmable on-chip clock generator. Overlapping of the edges of the clocking signals is avoided by adjusting an amount of delay introduced in the on...	04/01/2008
7336114	High-speed latching technique and application to frequency dividers The inventive technique can dynamically adjust the current being applied within the components of a prescaler or divider. This dynamic scaling of the current can improve the speed of the divider by a factor of two or reduce the average current in half when compared ...	02/26/2008
7329928	Voltage compensated integrated circuits A method and system of voltage compensated integrated circuits. Operating characteristics of integrated circuitry are enhanced by application of voltage compensation. ...	02/12/2008
7328385	Method and apparatus for measuring digital timing paths by setting a scan mode of sequential storage elements A method and apparatus are provided for performing on-board, in-circuit, and/or wafer level scan-based testing of integrated circuits. With the apparatus and method, one or more sequential storage elements, e.g., flip/flops, are coupled to combinational logic and ar...	02/05/2008
7319344	Pulsed flop with embedded logic In one embodiment, an apparatus comprises a logic circuit, a plurality of passgates, at least one pulse generator, and a plurality of latch elements. The logic circuit has a plurality of inputs, and each of the passgates has an output directly connected to one of th...	01/15/2008
7319353	Non-latching enveloping curves generator An enveloping curves generator is disclosed that guarantees that one curve will envelop or overlap another when both are traversing from one logic level to another, and where the other overlaps the first when both traversing the other direction. In one case, a steer...	01/15/2008
7315191	Digital storage element architecture comprising dual scan clocks and reset functionality A digital storage element comprising a master transparent latch that receives functional data from a data input port and scan data from a scan input port and comprises a master feedback loop with a first transistor coupled to the master feedback loop. The first tran...	01/01/2008
7310755	Data retention latch provision within integrated circuits An integrated circuit having a plurality of processing stages includes a low power mode controller operable to control the integrated circuit to switch between an operational mode and a standby mode. At least one of the processing stages has a non-delayed latch to c...	12/18/2007
7305571	Power network reconfiguration using MEM switches A structure and method for power distribution to a network for an integrated circuit chip complex are provided. The chip complex has at least two sectors, each having at least one power providing connection with at least one of said connections beings individually a...	12/04/2007
7304503	Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability, is provided and described. In one embodiment, switches are set to a first switch position to operate the repeater circuit...	12/04/2007
7284145	Clock control circuit and integrated circuit A clock management control circuit of the present invention is a clock control circuit for supplying a valid clock signal to a target circuit in accordance with a system clock signal. When a valid input instruction signal indicating timings of data input to the targ...	10/16/2007
7279948	Schmidt trigger circuit having sensitivity adjusting function and semiconductor device including the same To maintain the noise removal characteristic of a Schmidt trigger circuit stably. There are provided a Schmidt trigger circuit 10 constituted from a Vp/Vn setting unit 11 for determining the threshold level of an input signal and an RS latch unit 12...	10/09/2007
7262563	Method and apparatus for providing a dynamic rotational alignment of a cathode ray tube raster A method and apparatus used to step and correct the position of raster lines in a sinusoidal or zig-zag deflection system. By combining the magnetic flux generated with a rotation “twister” coil and a vertical deflection coil, scan lines can be uniformly spaced ...	08/28/2007
7256634	Elastic pipeline latch with a safe mode An elastic pipelined latch. The latch includes a control input for configuring the latch into a repeater state or a latch state, a drive component responsive to the control input and for driving an input signal through as an output signal, and a pulse width/inhibit ...	08/14/2007
7242234	Edge-triggered flip-flop An edge-triggered flip-flop is provided that includes one or more storage nodes and a pre-charge circuit in communication with the storage circuit. The storage circuit is configured to pre-charge the one or more storage nodes to a pre-determined voltage potential. T...	07/10/2007
7236001	Redundancy circuits hardened against single event upsets A decision block is incorporated into a circuit design to provide hardening against single event upset and to store data. The decision block includes a storage element that stores data as long as inputs to the decision block remain constant. The decision block recei...	06/26/2007

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Class 327/199 - Circuit having only two stable states (i.e., bistable)