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| Number | Title | Issue Date |
| 8188777 | Charge pump circuit and PLL circuit using the same A charge pump circuit (31), and a PLL circuit using the charge pump circuit, has a glitch compensation circuit (36) to compensate for a slow glitch which occurs along charging/discharging of electric charges in a parasitic capacitance. The glitch compe... | 05/29/2012 |
| 8188778 | Calibration for phase-locked loop Systems and methods for calibrating a bandwidth of a phase-locked loop are disclosed. Some such systems can detect an error signal generated by the phase-locked loop in response to a stimulus signal and adjust the bandwith of the phase-locked loop based at least par... | 05/29/2012 |
| 8183900 | Charge pump for a phase-locked loop A charge pump circuit causes a current to flow either into or out of another circuit in dependence on a current output by first and second current paths, each including a current source and a current control device having two switched nodes, and a control node arran... | 05/22/2012 |
| 8179175 | Reliable charge pump circuit A reliable charge pump circuit includes an operational amplifier; an upper current mirror; a lower current mirror; a startup circuit; and an anti-lock circuit, wherein the anti-lock circuit includes a current source and a diode-connected NMOS transistor, which incre... | 05/15/2012 |
| 8179176 | Apparatus for detecting jitter of phase locked loop A method and apparatus for detecting jitter of a Phase Locked Loop (PLL), which is capable of detecting a jitter level of the PLL without using a separate jitter measurement device, is disclosed. The apparatus for detecting the jitter of the PLL includes the PLL con... | 05/15/2012 |
| 8164367 | Spread spectrum clock generation technique for imaging applications A clock signal generator includes a phase-lock loop for generating an imaging clock signal having a frequency based on a reference clock signal. The imaging clock signal generator also includes a modulation circuit for determining a number of pixels in a horizontal ... | 04/24/2012 |
| 8149031 | Duty-cycle feedback charge pump A charge pump includes a reference charge pump with an input interface to accept a phase detector signal and a duty-cycle feedback signal, and an output to supply a control voltage. A replica charge pump accepts the phase detector signal supplies the duty-cycle feed... | 04/03/2012 |
| 8149032 | Circuit for clamping current in a charge pump A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current fro... | 04/03/2012 |
| 8125256 | Bias generator providing for low power, self-biased delay element and delay line An improved bias generator incorporates a reference voltage and/or a reference current into the generation of bias voltages. In some cases, the output of a biased delay element has a constant voltage swing. A delay line of such constant output voltage swing delay el... | 02/28/2012 |
| 8089307 | Charge transfer in a phase-locked loop A phase-locked loop arranged to generate an output signal having a first frequency that is a static value times the frequency of a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a divider arranged to rec... | 01/03/2012 |
| 8085071 | Phase-locked loop circuit and delay-locked loop circuit A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference signal indicating a phase difference therebetween; a charge pump that outputs a charge pump current according... | 12/27/2011 |
| 8076962 | Frequency synthesis system with self-calibrated loop stability and bandwidth In a frequency synthesis system with self-calibrated loop stability and bandwidth, a detector produces a detection signal based on a difference between an input signal and a feedback signal; a charge pump produces a control signal based on the detection signal; a fi... | 12/13/2011 |
| 8063678 | Charge pump for phase locked loop A charge pump includes a charge pump core circuit having a first current source transistor, a second current source transistor and an output terminal (64), and a replica bias circuit. The replica bias circuit has a first reference current source transistor, a... | 11/22/2011 |
| 8054115 | Phase-locked loop integrated circuits having dual feedback control Phase-locked loop (PLL) integrated circuits according to embodiments of the invention provide dual feedback control. The first feedback control utilizes a conventional phase locking scheme that passes a feedback clock signal to an input of a phase-frequency detector... | 11/08/2011 |
| 8049541 | Charge pump for PLL/DLL A charge pump for use in a Phase Locked Loop/Delay Locked Loop minimizes static phase error through the use of an operational amplifier. The operational amplifier also mitigates the effects of low power supply voltage. ... | 11/01/2011 |
| 8049540 | Calibration system and method for phase-locked loops A method for calibrating a bandwidth of a phase-locked loop begins with detecting an error signal generated by the phase-locked loop in response to a stimulus signal. The difference between the integral of the error signal and a nominal value thereof is computed, an... | 11/01/2011 |
| 8040168 | Charge pump circuit The charge pump circuit includes: a first switch for controlling either one of push operation and pull operation based on a first control signal; a current mirror circuit composed of a transistor different in attribute from the first switch; and a second switch comp... | 10/18/2011 |
| 8022740 | Fast-response phase-locked loop charge-pump driven by low voltage input Phase-locked loop charge pump driven by low voltage input. In one aspect, a phase-locked loop circuit includes a phase frequency detector operating at a low voltage and providing low-voltage sourcing control signals and low-voltage sinking control signals at the low... | 09/20/2011 |
| 8022739 | Charge pump circuit A charge pump circuit and a method of compensating current mismatch in a charge pump circuit. The charge pump circuit comprises a core charge pump circuit; a replica charge pump circuit for sensing a current mismatch in the core charge pump circuit and for convertin... | 09/20/2011 |
| 8008956 | Frequency synthesizer and high-speed automatic calibration device therefor A frequency synthesizer and an automatic calibration device are disclosed. An automatic calibration device for a phase-locked loop based frequency synthesizer includes: a frequency-to-digital converter for converting a frequency of a signal outputted from a voltage ... | 08/30/2011 |
| 7994830 | Systems and methods for PLL linearity measurement, PLL output duty cycle measurement and duty cycle correction Systems and methods for enabling the determination of voltage controlled oscillator (VCO) linearity, duty cycle determination and duty cycle correction in phase locked loop circuits (PLL's.) One embodiment comprises a method including the steps of determining the fr... | 08/09/2011 |
| 7990192 | Phase locked loop and method for charging phase locked loop A phase locked loop (PLL) and a method for charging the PLL are disclosed. The charge circuit includes: a threshold judging module, adapted to output a signal to a receiving module, and when the voltage of a filter reaches a preset threshold, output a valid signal t... | 08/02/2011 |
| 7982510 | Self-calibration method for a frequency synthesizer using two point FSK modulation The frequency synthesizer for implementing a self-calibration method includes (i) a first phase lock loop comprising: a reference oscillator, a phase comparator, a first charge pump, a first loop filter, a voltage controlled oscillator, and a multimode divider count... | 07/19/2011 |
| 7977985 | Bias generator providing for low power, self-biased delay element and delay line An improved bias generator incorporates a reference voltage and/or a reference current into the generation of bias voltages. In some cases, the output of a biased delay element has a constant voltage swing. A delay line of such constant output voltage swing delay el... | 07/12/2011 |
| 7977984 | High-speed charge pump circuits A charge pump circuit includes at least one switching transistor and a level-shifter. The level-shifter has a cross-coupled pair of transistors. The level-shifter shifts a voltage of a first input signal to generate a level-shifted signal. The level-shifted signal c... | 07/12/2011 |
| 7965117 | Charge pump for phase locked loop A charge pump includes a charge pump core circuit having a first current source transistor, a second current source transistor and an output terminal (64), and a replica bias circuit. The replica bias circuit has a first reference current source transistor, a... | 06/21/2011 |
| 7961016 | Charge pump and charging/discharging method capable of reducing leakage current A charge pump includes a first transistor, a second transistor, a first, a second and a third selectors. The first transistor includes a gate electrode, a first electrode, and a second electrode which serves as an output port of the charge pump. The second transisto... | 06/14/2011 |
| 7948286 | Bandwidth control apparatus for phase lock loop and method thereof A loop bandwidth control apparatus applied to a phase locked loop (PLL) includes a first loop filter module, a second loop filter module, a control module, a first switching module, and a second switching module. The first filter module and the second loop filter mo... | 05/24/2011 |
| 7944257 | Method and system of optimizing a control system using low voltage and high-speed switching A phase-locked loop charge pump driven by low voltage input is disclosed. In one aspect, a charge pump for a phase-locked loop circuit includes a sourcing current source providing a sourcing current, wherein the sourcing current source is coupled to a high-voltage o... | 05/17/2011 |
| 7924073 | Semiconductor memory device having back-bias voltage in stable range A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units ... | 04/12/2011 |
| 7915933 | Circuit for clamping current in a charge pump A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current fro... | 03/29/2011 |
| 7906998 | Charge pumping circuit and clock generator A charge pumping circuit comprises: a charging pump capacitance; a charging unit; a discharging unit; a detection resistor having one terminal and the other terminal, the one terminal being connected between a first node and a second node in a second mode; a voltage... | 03/15/2011 |
| 7902888 | Charge pump with reduced current mismatch Charge pump circuitry is provided that is insensitive to charge sharing and current mismatch effects. The charge pump circuitry has an output node at which a charge pump output voltage is provided. A first current source charges the output node to increase the outpu... | 03/08/2011 |
| 7893737 | Charge pump for PLL/DLL A charge pump for use in a Phase Locked Loop/Delay Locked Loop minimizes static phase error through the use of an operational amplifier. The operational amplifier also mitigates the effects of low power supply voltage. ... | 02/22/2011 |
| 7888980 | Charge pump with low charge injection and low clock feed-through A charge pump with low charge injection and low clock feed-through for a phase locked loop (PLL). A first source-switched current mirror has a source transistor and an output transistor. The source transistor has a drain connected to a first current source. The outp... | 02/15/2011 |
| 7876136 | Phase-locked-loop circuit having a pre-calibration function and method of pre-calibrating the same A phase-locked loop (PLL) integrated circuit includes an oscillation control voltage generating circuit therein. The oscillation control voltage generating circuit is configured to pre-scale an output current of a charge pump therein to a first level in response to ... | 01/25/2011 |
| 7834672 | Low power charge pump A charge pump is configured to control current flow at an output node in response to input signals. A plurality of control signals are generated based upon the input signals. The control signals operate to control the timing and duration of current flows within the ... | 11/16/2010 |
| 7804343 | Disturbance suppression capable charge pump One embodiment described is a charge pump arrangement that includes a regulator to regulate signals associated with two output nodes. A switching mechanism may be coupled to the regulator. The switching mechanism is to interrupt the regulator. ... | 09/28/2010 |
| 7777541 | Charge pump circuit and method for phase locked loop A charge pump circuit can include a pump-up circuit having a first disable switch coupled between a pump-up output node and a first power supply node that is enabled and then disabled in response to a source current path between the pump-up node and a second power s... | 08/17/2010 |
| 7772897 | Switched-capacitor charge pump device for generation of output direct-current voltage with wide amplitude range A switched-capacitor charge pump device is proposed, which is designed for integration to a circuit system, such as a PLL (phase-locked loop) circuit system, for generation of an output direct-current (DC) voltage with a wide amplitude range; and which is characteri... | 08/10/2010 |
