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"I hate what they've done to my child...I would never let my own children watch it. "
Vladimir Zworykin, television pioneer ; Talking about an invention in which he played a critical role.
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| Number | Title | Issue Date |
| 8040167 | Method and apparatus for charge leakage compensation for charge pump An apparatus is disclosed, the apparatus comprising: a charge pump for receiving a phase signal representing a result of a phase detection and for outputting a current flowing between an internal node and an output node; a capacitive load shunt at the output node; a... | 10/18/2011 |
| 7868669 | Self-regulated charge pump with loop filter One embodiment described is a charge pump arrangement that includes at least one input node and two output nodes. A regulator is included to regulate at least one of the two output nodes, the regulator is decoupled from one of the two output nodes, and the regulator... | 01/11/2011 |
| 7772895 | Signal generating circuit having filtering circuit coupled between level shifters A signal generating circuit includes a detecting circuit, a charge pump, a first level shifter, a filtering circuit, a second level shifter and a controllable oscillator. The detecting circuit outputs a detecting signal according to a reference signal and an oscilla... | 08/10/2010 |
| 7750695 | Phase-locked loop circuitry using charge pumps with current mirror circuitry A system and method for performing phase-locked loop is disclosed. The system includes phase frequency detector circuitry, charge pump circuitry having first current mirror circuitry and second current mirror circuitry, loop filter circuitry, and voltage controlled ... | 07/06/2010 |
| 7733136 | Frequency synthesizer A frequency synthesizer includes: a fractional-N synthesizer configured to provide, in a locked condition, an output signal with an output frequency based on an input signal with a reference frequency, the fractional-N synthesizer including a charge pump outputting ... | 06/08/2010 |
| 7692458 | Wide dynamic range charge pump A wide dynamic range charge pump is provided for use in a phase-locked loop (PLL) circuit. The charge pump includes a first, second, and third set of current sources. The charge pump further includes a first capacitor having an input connected to the first set. A fi... | 04/06/2010 |
| 7466173 | Radio transceiver having a phase-locked loop circuit The invention relates to a phase-locked loop circuit (1) in a radio transceiver for the detection of the linear operation of a first voltage controlled oscillator (2), which comprises a frequency divider (8), a reference oscillator (10), ... | 12/16/2008 |
| 7439784 | Charge pump for reducing current mismatch A charge pump circuit is disclosed, including: a dummy current path comprising a first junction node; a normal current path comprising a second junction node; a switch, coupled between the dummy current path and the normal current path; wherein when the switch is cl... | 10/21/2008 |
| 7436920 | Burst mode receiver based on charge pump PLL with idle-time loop stabilizer An improved burst mode receiver includes a digital phase detector, receiving an incoming signal. The receiver also includes a charge pump, receiving pulse signals from the digital phase detector to compare the incoming clock phase to the local generated clock phase ... | 10/14/2008 |
| 7428169 | Nonvolatile semiconductor memory device and voltage generating circuit for the same A nonvolatile semiconductor memory device includes a memory cell array of a plurality of memory cells; and a voltage generating circuit for generating a programming voltage to be applied to the memory cells. The voltage generating circuit includes a first voltage ge... | 09/23/2008 |
| 7428407 | Amplitude modulator, in particular for mobile radio, and a method for modulation of a signal An amplitude modulator is provided, which has a first supply connection for supplying a supply potential and a second supply connection for supplying a ground potential. An amplifier stage with a push-pull output stage has a signal input for supplying a signal, and ... | 09/23/2008 |
| 7424629 | Data controlled power supply apparatus A power supply, and a method of controlling the power supply, in which more or less power capacity of the power supply is activated depending on the state of a digital data signal on a data bus. The power supply has a control circuit which detects the number of “z... | 09/09/2008 |
| 7418071 | Method and apparatus for generating a phase dependent control signal A phase detector generates a phase dependent control signal according to the phase relationship between a first and second clock signal. The phase detector includes first and second phase detector circuits receiving the first and second clock signals and generating ... | 08/26/2008 |
| 7417491 | Constant current output charge pump A constant current output charge pump includes a switch module configured to compare a reference voltage with a load voltage and output a switch signal, a voltage margin control module configured to compare a first voltage and a second voltage with an output voltage... | 08/26/2008 |
| 7409027 | System and method for recovering a clock using a reduced rate linear phase detector and voltage controlled oscillator An improved clock recovery system, phase-locked loop, and phase detector are provided as well as a method for generating charge pump signals. The clock recovery system includes a phase-locked loop. The phase-locked loop includes a phase detector and a voltage-contro... | 08/05/2008 |
| 7408391 | Charge pump for PLL/DLL A charge pump for use in a Phase Locked Loop/Delay Locked Loop. The charge pump includes a pull-up circuit a pull-down circuit and a reference current source. The reference current source includes a number of select transistors and a number of mirror master transist... | 08/05/2008 |
| 7397882 | Digital phase locked circuit capable of dealing with input clock signal provided in burst fashion A digital phase locked circuit provides an output clock signal whose phase is synchronous with the phase of an input clock signal under a desired level of a phase absorption characteristic even if the input clock signal is supplied in a burst fashion. A phase compar... | 07/08/2008 |
| 7385429 | Charge pump with reduced current mismatch Charge pump circuitry is provided that is insensitive to charge sharing and current mismatch effects. The charge pump circuitry has an output node at which a charge pump output voltage is provided. A first current source charges the output node to increase the outpu... | 06/10/2008 |
| 7365582 | Bootstrapped charge pump driver in a phase-lock loop A charge pump includes first and second pairs of differential transistors. Each transistor includes control, first, and second terminals. First and second charge pump drivers communicate with the control terminal of one of the first pair of differential transistors ... | 04/29/2008 |
| 7355463 | Loop filter integration in phase-locked loops A phase-locked loop and method are disclosed. One method embodiment includes providing a dual-path filter of a phase-locked loop, the dual-path filter consisting of passive components, and summing control signals in the dual-path filter using the passive components.... | 04/08/2008 |
| 7348653 | Resistive memory cell, method for forming the same and resistive memory array using the same A resistive memory cell employs a photoimageable switchable material, which is patternable by actinic irradiation and is reversibly switchable between distinguishable resistance states, as a memory element. Thus, the photoimageable switchable material is directly pa... | 03/25/2008 |
| 7342528 | Circuit and method for reducing electromagnetic interference A spread spectrum system having a self-oscillating delay-line digital pulse width modulator and a method for mitigating electromagnetic interference. The spread spectrum system has a pseudo-random pattern generator connected to a digital-to-analog converter, which i... | 03/11/2008 |
| 7336110 | Differential amplitude controlled sawtooth generator A dual differential sawtooth signal generator includes a first sawtooth voltage generator that has a first capacitor and a second capacitor that are alternately charged with a feedback control source current from a low voltage reference voltage level. A second sawto... | 02/26/2008 |
| 7330058 | Clock and data recovery circuit and method thereof A clock and data recovery circuit having parallel dual path is disclosed, which includes a phase detecting circuit, a first charge pump, a proportional load circuit, a second charge pump, an integration load circuit, and a voltage control oscillating circuit. The ph... | 02/12/2008 |
| 7323914 | Charge pump circuit Adverse effects of switching noise produced by a charge pump circuit on a displayed image are prevented. In a synchronizing separation circuit 18, a synchronizing signal is separated from a video signal. The separated synchronizing signal is subjected to ½ f... | 01/29/2008 |
| 7317345 | Anti-gate leakage programmable capacitor An anti-gate leakage programmable capacitor including at least one capacitor having a first terminal coupled to a first node and a second terminal, a second node, and a control circuit which selectively couples the second terminal of the capacitor to the second node... | 01/08/2008 |
| 7307460 | Method and apparatus for capacitance multiplication within a phase locked loop A method and apparatus for capacitance multiplication using two charge pumps. A first charge pump (206) provides a current signal (I216) that is first conducted by a resistor (310) of an RC network and then split into three current paths pri... | 12/11/2007 |
| 7298190 | Phase locked loop having enhanced locking characteristics A phase locked loop (PLL) integrated circuit includes a voltage-controlled oscillator (VCO) configured to generate a clock signal at an output terminal thereof. The VCO is further configured to improve the frequency response of the PLL by varying a capacitance of th... | 11/20/2007 |
| 7295198 | Voltage booster circuit, power supply circuit, and liquid crystal driver A charge-pump circuit includes: MOS transistors connected in series and having one end to which a system ground power supply voltage is supplied; and a discharge transistor. The discharge transistor has one end connected to a node which is connected to the MOS trans... | 11/13/2007 |
| 7292078 | Phase locked loop integrated circuits having fast locking characteristics and methods of operating same An integrated circuit device includes a fast-locking phase locked loop (PLL). This PLL includes a phase-frequency detector and first and second charge pumps, which are responsive to first and second control signals generated by the phase-frequency detector. The firs... | 11/06/2007 |
| 7277518 | Low-jitter charge-pump phase-locked loop A phase-locked loop includes a voltage-controlled oscillator and a charge-pump loop filter. The voltage-controlled oscillator includes a varactor having a first set of capacitor cells configured to adjust a capacitance based on a first control voltage, and a second ... | 10/02/2007 |
| 7274764 | Phase detector system with asynchronous output override In one embodiment, the present invention provides a phase-locked loop comprising a charge-pump loop filter and a phase detector system. The charge-pump loop filter is configured to provide a control voltage having a voltage level based on a state of a first control ... | 09/25/2007 |
| 7271633 | Charge pump structure for reducing capacitance in loop filter of a phase locked loop A charge pump and loop filter circuit of a phase locked loop includes a resistor, first and second capacitors, first and second input current sources for supplying first and second currents to the circuit, a first output current source for outputting the first curre... | 09/18/2007 |
| 7271645 | Smart charge-pump circuit for phase-locked loops The smart charge-pump circuits basically include a high-performance charge-pump circuit as well as a smart lock-in circuit. After the smart charge-pump circuit sensors an initial condition and responds accordingly, it will begin to operate fully as a high performanc... | 09/18/2007 |
| 7271619 | Charge pump circuit reducing noise and charge error and PLL circuit using the same Operation noise and charge error of a charge pump circuit are reduced, thereby the jitter characteristics and the spectrum characteristics of a PLL circuit are improved, and further a time period elapsed until the PLL circuit is locked is shortened. The charge pump ... | 09/18/2007 |
| 7271545 | Ballast and igniter for a lamp having larger storage capacitor than charge pump capacitor A ballast according to the present invention operates in an ignition state, a warm-up state, and a steady state for igniting and powering a lamp. The ballast comprises an igniter that ignites the lamp during the ignition state and a switching power inverter, for exa... | 09/18/2007 |
| 7266172 | Fully differential CMOS phase-locked loop The present invention relates in general to integrated circuits, and in particular to method and circuitry for implementing an improved phase-locked loop (PLL) in complementary metal-oxide-semiconductor (CMOS)technology using current-controlled CMOS (C3MO... | 09/04/2007 |
| 7250808 | Differential charge pump circuit A differential charge pump circuit has two current paths and generates a differential current in accordance with currents inputted to the two current paths. The two current paths have a pair of current sources respectively and form a differential pair. The different... | 07/31/2007 |
| 7242228 | Method and device for generating an output signal having a predetermined phase shift with respect to an input signal An output signal is generated with a predetermined phase shift with respect to an input signal using a closed loop control. The input and output signal of the closed loop control are logically combined in accordance with first and second combinatory logic to generat... | 07/10/2007 |
| 7236425 | Charge pump circuit A charge pump circuit is provided which outputs a high voltage by using a boosting circuit with a smaller number of stages. A diode is used to give a back-gate voltage for a MOS transistor composing the charge pump circuit, thereby minimizing a reduction in a booste... | 06/26/2007 |
