Did You Know...
...that one person who claimed to be the inventor of the television is Russian emigre Vladimir Zworykin? In 1929 David Sarnoff, founder of RCA, asked Zworykin what it would take to develop TV for commercial use. He said: a year and a half and $100,000. In reality, it took 20 years and $50 million! Before his death in 1982 at the age of 92, Zworykin said of his invention: "The technique is wonderful. It is beyond my expectations. But the programs! I would never let my children even come close to this thing."
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| Number | Title | Issue Date |
| 8188771 | Pulse width modulation frequency conversion A pulse width modulation (PWM) frequency converter converts an input PWM signal to an output PWM signal having a different frequency while maintaining a substantially equal duty ratio. The PWM frequency converter samples the input PWM signal for a PWM cycle using a ... | 05/29/2012 |
| 7409568 | Power supply voltage droop compensated clock modulation for microprocessors A voltage source droop compensated clock modulation for microprocessors is described. Specifically, the circuit reduces the clock frequency if a voltage source droop is detected. ... | 08/05/2008 |
| 7405631 | Oscillating divider topology An oscillator includes a first circuit that asynchronously generates an oscillating signal in response to a second circuit of the oscillator acknowledging each cycle of the oscillating signal. ... | 07/29/2008 |
| 7373575 | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly captured. A first group of the applied data signals is captured, and a group of expect data signals are generated ... | 05/13/2008 |
| 7353362 | Multiprocessor subsystem in SoC with bridge between processor clusters interconnetion and SoC system bus A System-on-Chip (SoC) component comprising a single independent multiprocessor subsystem core including a plurality of multiple processors, each multiple processor having a local memory associated therewith forming a processor cluster; and a switch fabric means con... | 04/01/2008 |
| 7328354 | Apparatus and method for real-time adjusting system performance of a computer An apparatus for adjusting system performance of computer is fabricated on a motherboard. The apparatus comprises a plurality of performance monitor means and a performance control chip. The performance monitor means are connected separately to bus lines which are a... | 02/05/2008 |
| 7327171 | Charge pump clock for non-volatile memories A charge pump clock circuit for a memory device generates pump clock signals at an adaptive rate. Clock edges are generated at a minimum of TD seconds apart so long as address transitions do not exceed a pre-determined limit. However, if address changes a... | 02/05/2008 |
| 7320081 | Clock-signal generation device, communication device, and semiconductor device A clock-signal generation device which changes an average frequency of a clock signal independently of a reference clock signal. A reference-clock-signal generation circuit generates a reference clock signal. A frequency-division circuit divides the frequency of the... | 01/15/2008 |
| 7310587 | Programmed method and apparatus for quadrature output sensors A sensor is provided in one illustrative embodiment that includes a microcontroller that executes a program that generates quadrature output signals that indicate the change in a parameter being measured. As an example, the sensor could comprise a linear position tr... | 12/18/2007 |
| 7296176 | Method and apparatus for limiting the number of asynchronous events that occur during a clock cycle One embodiment of the present invention provides a system that limits a maximum repetition rate of an asynchronous circuit. The system operates by receiving a clock signal at a rate-controlling circuit for the asynchronous circuit from a source external to the async... | 11/13/2007 |
| 7282966 | Frequency management apparatus, systems, and methods Apparatus and systems, as well as methods and articles, may operate to select a microprocessor clock frequency responsive to a desired voltage and/or a desired temperature of operation. ... | 10/16/2007 |
| 7281140 | Digital throttle for multiple operating points A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline. The monitored activity is scaled according to the current operating point of the processor and a power state is determined from the sc... | 10/09/2007 |
| 7262645 | System and method for adjusting the phase of a frequency-locked clock A clock signal regeneration system and method to adjust the phase of a frequency-locked clock signal is provided. The system includes a numerically controlled oscillator, a clock source, and an adder. In one embodiment, additional components are included in the syst... | 08/28/2007 |
| 7262644 | Method and apparatus for switching frequency of a system clock A system clock switching apparatus, which includes a clock source for providing a reference clock signal; a frequency divider electrically connected to the clock source for dividing the reference clock signal to produce a frequency-divided signal and a system clock ... | 08/28/2007 |
| 7250800 | Clock pulse width control circuit In one embodiment, a clock pulse width control circuit, comprises a plurality of timer circuits to generate a corresponding plurality of delayed pulse signals from an input clock signal, a corresponding plurality of AND gates, each AND gate generating an output sign... | 07/31/2007 |
| 7246022 | Initiation of differential link retraining upon temperature excursion A method includes detecting a change in temperature in an integrated circuit that is coupled to a differential communication link, and responding to the detected change in temperature by initiating a retraining process for the differential communication link. ... | 07/17/2007 |
| 7236039 | Spread spectrum clock generating apparatus Disclosed is a spread spectrum clock generator comprising a phase interpolator, which receives a clock signal from a clock input terminal and a control signal (an up signal and/or down signal), for adjusting the phase of an output clock signal in accordance with sai... | 06/26/2007 |
| 7234070 | System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding A memory system includes a memory hub controller that sends write data to a plurality of memory modules through a downstream data bus and receives read data from the memory modules through an upstream data bus. The memory hub controller includes a receiver coupled t... | 06/19/2007 |
| 7230458 | Delta/sigma frequency discriminator Delta/sigma frequency discriminator (1) for converting a frequency (Fv) of an input signal into a digital output signal (C) comprising a frequency divider (8) which divides the input signal at a frequency dividing ratio which can be switched... | 06/12/2007 |
| 7224563 | Method and device for circuit control One disclosed embodiment of the invention is directed to circuit control that comprises sensing a delivered voltage to a portion of an integrated circuit, determining an appropriate frequency for the portion of the integrated circuit, and providing the appropriate f... | 05/29/2007 |
| 7225349 | Power supply voltage droop compensated clock modulation for microprocessors A voltage source droop compensated clock modulation for microprocessors is described. Specifically, the circuit reduces the clock frequency if a voltage source droop is detected. ... | 05/29/2007 |
| 7222248 | Method of switching voltage islands in integrated circuits when a grid voltage at a reference location is within a specified range An integrated circuit has a power grid and a set of independently switchable voltage islands, together with a system and method for measuring the voltage and history of the voltage on the power grid to determine the correct time to allow a large capacitive load (suc... | 05/22/2007 |
| 7222030 | Method and apparatus for profiling power performance of software applications Techniques for profiling systems, such as mobile or embedded devices, are provided. The techniques can profile code executing on these systems based on power used by that code. The system may profile power usage for the entire system or a subsystem, component, or fu... | 05/22/2007 |
| 7218077 | Systems and methods for signal generation using limited power A signal generator provides an output signal having a series of pulses and a pulse repetition rate. The signal generator includes an energy storage circuit and a switch control circuit. The energy storage circuit includes a switch operated by the switch control circ... | 05/15/2007 |
| 7209852 | Circuit for producing a variable frequency clock signal having a high frequency low jitter pulse component Embodiments of the present invention include first and second pulse trains input to a switch in synchronization. The first and second pulse trains may have a repeating high and low values at first and second frequencies, respectively, and the first pulse train may t... | 04/24/2007 |
| 7193596 | Display apparatus with reduced noise emission and driving method for display apparatus A display apparatus has a clock generating circuit, a drive waveform generating circuit, and a display panel. The drive waveform generating circuit is used to generate a drive waveform by using a clock from the clock generating circuit, and the display panel is used... | 03/20/2007 |
| 7180974 | Frequency division method and device A method and device of frequency division with a division ratio: comprising: an input divider with a division ratio NPs receiving the frequency Fe at input and delivering a signal to an insertion/substitution divider, the insertion/substitution divider having an inp... | 02/20/2007 |
| 7168027 | Dynamic synchronization of data capture on an optical or other high speed communications link A method and system that dynamically adjusts link control parameters of a communications network. The communications network includes a transmitter coupled through a first data link to a receiver. The transmitter and receiver each have at least one associated link c... | 01/23/2007 |
| 7159092 | Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same A method and circuit adaptively adjust respective timing offsets of digital signals relative to a clock output along with the digital signals to enable a latch receiving the digital signals to store the signals responsive to the clock. A phase command for each digit... | 01/02/2007 |
| 7149909 | Power management for an integrated graphics device In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The ... | 12/12/2006 |
| 7149431 | Self-seeded Fabry-Perot laser device for wavelength division multiplexing system Disclosed is a Fabry-Perot laser device connected with an optical transmission link. The device comprises an optical circulator for forming an optical waveguide loop and circulating light through the optical waveguide loop and for outputting light from the optical w... | 12/12/2006 |
| 7144152 | Apparatus for thermal management of multiple core microprocessors An apparatus for managing the temperature of an integrated circuit having a multiple core microprocessor is described. Specifically, thermal sensors are placed at potential hot spots throughout each microprocessor core. A thermal management unit monitors the thermal... | 12/05/2006 |
| 7137024 | System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding A memory system includes a memory hub controller that sends write data to a plurality of memory modules through a downstream data bus and receives read data from the memory modules through an upstream data bus. The memory hub controller includes a receiver coupled t... | 11/14/2006 |
| 7136323 | Apparatus and method for generating a variable-frequency clock Apparatus and method for generating a variable-frequency clock is disclosed. A control state machine defines various commands and generates corresponding control signals. A variable-frequency clock generator then outputs the variable-frequency clock that has a speci... | 11/14/2006 |
| 7133033 | Actuator for a switch An actuator for a switch, the actuator being movable between on and off positions against an adjustable resilient bias to provide a first signal when said actuator is in said on position and a second signal when said actuator is in said off position. ... | 11/07/2006 |
| 7126390 | Frequency conversion apparatus A frequency conversion apparatus has a high-frequency amplifier for amplifying an input high-frequency signal, a mixer for mixing the output signal of the high-frequency amplifier with a local oscillation signal, a filter for restricting the band of the output signa... | 10/24/2006 |
| 7109901 | Use of and gates with a write control circuit for trimming a bleeder resistor In a semiconductor integrated circuit, serially inputted trimming data are sequentially written to plural memory cells in accordance with selection signals for trimming a bleeder resistor, making it possible to dispense with a data register for storing the trimming ... | 09/19/2006 |
| 7106110 | Clock dithering system and method during frequency scaling A system and method of shifting a clock frequency of an integrated circuit device from a first frequency to a second frequency, including alternating between the first frequency and the second frequency according to a dithering pattern, the alternating occurring for... | 09/12/2006 |
| 7103342 | System and method for reducing the effects of clock harmonic frequencies A system and a method are provided for reducing the effects of spurious frequencies in a wireless communications device. The system comprises a processor having a reference frequency input and a clock having an output connected to the processor input. The clock supp... | 09/05/2006 |
| 7085975 | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly captured. A first group of the applied data signals is captured, and a group of expect data signals are generated ... | 08/01/2006 |
