Lawrence Welk, the bandleader who entertained millions of Americans over a generation of broadcasting his TV show, once received a patent: for a music-themed design of an ashtray.
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| Number | Title | Issue Date |
| 8179167 | Wide bandwidth fast hopping frequency synthesizer circuits and methods Embodiments of the present invention include methods for wide bandwidth synthesizer circuits and methods. In one embodiment, the present invention includes a frequency synthesizer comprising a multiplexer and a band group selector. The multiplexer is coupled to rece... | 05/15/2012 |
| 8149022 | Digital delay line based frequency synthesizer A frequency synthesizer is disclosed. The frequency synthesizer includes a period control word generator, a delta-sigma modulator, and a delay line unit. The period control word generator generates a period control word. The delta-sigma modulator receives the period... | 04/03/2012 |
| 8120389 | Digital to frequency synthesis using flying-adder with dithered command input To make Flying-Adder architecture even more powerful, a new concept, time-average-frequency, is incorporated into the clock generation circuitry. This is a fundamental breakthrough since it attacks the clock generation problem from its root: how is the clock signal ... | 02/21/2012 |
| 8115519 | Phase accumulator generating reference phase for phase coherent direct digital synthesis outputs A phase accumulator generates phase data for a direct digital synthesis (DDS) device based on a reference phase to provide analog sinusoidal outputs that are locked to the reference phase and thus phase coherent. The frequency of a sinusoidal DDS output may be contr... | 02/14/2012 |
| 8063669 | Frequency synthesizer having a plurality of independent output tones Described is an apparatus that includes a frequency source and a plurality of time domain direct digital synthesizers each having an input connected to an output of the frequency source and an output providing an output frequency signal. A particular time domain dir... | 11/22/2011 |
| 7999578 | Waveform generation device, waveform generation method, and computer readable medium Provided is a waveform generating apparatus that generates a signal having an arbitrary waveform, comprising a waveform memory that stores a plurality of pieces of waveform data that each include a sequence of signal values; a filtering section that (i) reads from t... | 08/16/2011 |
| 7990186 | Signal conditioning circuit with a shared oscillator A circuit for signal conditioning including a first stage with a digital/analog converter, a second stage with an I/Q-modulator, and at least one third stage with a mixer. Instead of a multiplicity of independent oscillators, a shared oscillator is provided for the ... | 08/02/2011 |
| 7969205 | Peak power reduction method A technique wherein when signals, the modulation schemes of which are different, are to be combined, performing the peak suppression using amounts of the respective modulation schemes can effectively reduce the PAPR of a resulting combined signal. A peak suppressing... | 06/28/2011 |
| 7952395 | Universal CMOS current-mode analog function synthesizer The universal CMOS current-mode analog function synthesizer is based on approximating the required function using its sixth-order Taylor series expansion. These approximations can be implemented by adding the weighted output currents of a number of basic building bl... | 05/31/2011 |
| 7911241 | Frequency synthesizer circuit comprising a phase locked loop A frequency synthesizer circuit that reduces undesired spurious sidebands while maintaining phase noise performance having a phase locked loop circuit comprising at least a phase detector, a controlled oscillator, a frequency divider coupled to the controlled oscill... | 03/22/2011 |
| 7888973 | Matrix time-to-digital conversion frequency synthesizer The present disclosure provides for a time to digital converter (TDC). The time to digital converter can include a reference ingress that receives a reference signal and passes the reference signal through multiple delay elements, a clock signal ingress that receive... | 02/15/2011 |
| 7888974 | Frequency synthesizer An object of the present invention provides a frequency synthesizer having a broad frequency entraining range which can finely set a frequency over a broad band by a novel principle. As a specific solving means, a sinusoidal signal of an output frequency of a... | 02/15/2011 |
| 7847602 | Digitally controlled frequency generator A digitally controlled frequency generator includes an oscillator module for generating a first clock signal having an oscillating frequency, a programmable control module operable so as to generate a control signal corresponding to a desired frequency, and a direct... | 12/07/2010 |
| 7825702 | Synthesizer module To provide a synthesizer module that can be used not only in a destination area but also in the whole world and that can be readily set in output frequency. In the synthesizer module, a calculation formula table of a nonvolatile memory stores a plurality of frequenc... | 11/02/2010 |
| 7825701 | Frequency synthesizer An object of the present invention provides a frequency synthesizer having a broad frequency entraining range which can finely set a frequency over a broad band by a novel principle. As s specific solving means, a sinusoidal signal of an output frequency of a... | 11/02/2010 |
| 7772893 | Digital frequency synthesizer and method thereof A digital frequency synthesizer and a method thereof are provided. In the digital frequency synthesizer, a plurality of multiphase signals (MPSs) is generated by a phase delay locked loop array, and a transition reference values is generated by a programmable transi... | 08/10/2010 |
| 7728634 | Flexible waveform generator with extended range capability A frequency synthesizer includes a first clock running at a frequency fCLK1, a second clock running at a frequency fCLK2, wherein frequency fCLK2 is higher than frequency fCLK1, the frequencies having a fixed ratio QF... | 06/01/2010 |
| 7714623 | Agile high resolution arbitrary waveform generator with jitterless frequency stepping Jitterless transition of the programmable clock waveform is generated employing a set of two coupled direct digital synthesis (DDS) circuits. The first phase accumulator in the first DDS circuit runs at least one cycle of a common reference clock for the DDS circuit... | 05/11/2010 |
| 7671635 | Frequency synthesizer, coupled divide-by-N circuit, current-reuse multiply-by-M circuit A frequency synthesizer is provided in the present invention. The frequency synthesizer includes a single phase-locked loop having a reference frequency signal input, a first output, a second output and a pair of divide-by-N circuits coupled with each other and elec... | 03/02/2010 |
| 7635997 | Circuit for and method of changing a frequency in a circuit The circuits and methods of the various embodiments of the present invention enable changing the frequency of a frequency synthesizer. According to one embodiment, a method of changing a frequency of a clock signal generated by a frequency synthesizer comprises the ... | 12/22/2009 |
| 7573303 | Digitally controlled system on-chip (SOC) clock generator A clock generator includes a clock circuit and a voltage-controlled oscillator in a phase-locked loop. The clock circuit monitors input clock signals and selects one of the input clock signals based on characteristics of the input clock signals. The voltage-controll... | 08/11/2009 |
| 7560960 | Frequency synthesizer using two phase locked loops The application discloses system and method embodiments related to a frequency synthesizer. Embodiments of a frequency synthesizer can have a low phase noise and a narrow channel spacing. Embodiments of a frequency synthesizer can use two phase locked loops. One emb... | 07/14/2009 |
| 7525351 | Fixed frequency clock output having a variable high frequency input clock and an unrelated fixed frequency reference signal A digital circuit generates very precise clock frequencies for applications that can tolerate a small degree of jitter but require exact long term frequencies, e.g. a video clock for a laser printer. Some subpixel jitter is acceptable, but the overall pixel rate rem... | 04/28/2009 |
| 7498852 | Phase error correction circuit for a high speed frequency synthesizer Circuits, methods, and apparatus for adjusting an NCO output in order to provide a signal that is phase-locked to a reference signal. This is particularly beneficial where the frequencies of the NCO output and reference signal are unrelated. One embodiment provides ... | 03/03/2009 |
| 7495481 | Synthesizer A synthesizer that has a phase detector 8 and a charge pump circuit 9 for injecting an electric charge, or pulling it out that corresponded to a frequency difference of an input, a low-pass filter 11 for converting this electric charge into a vo... | 02/24/2009 |
| 7443337 | Synthesizing arbitrary waveforms using convolution processors A method for generating a synthesized waveform from a desired arbitrary waveform via a convolution processor includes: providing a data stream input signal to the convolution processor including an extended duration impulse signal; computing one or more filter coeff... | 10/28/2008 |
| 7436166 | Direct digital synthesizer producing a signal representing an amplitude of a sine wave The invention is directed to a digital phase detector that comprises a splitter and phase shifter to receive a signal of a device under test and produce a first signal that is substantially identical to the received signal and a second signal that is phase shifted r... | 10/14/2008 |
| 7432750 | Methods and apparatus for frequency synthesis with feedback interpolation A frequency synthesis circuit includes a phase locked loop and an interpolator circuit. The phase locked loop circuit receives a reference clock and a feedback clock and generates an output clock with a frequency based on the reference clock and the feedback clock. ... | 10/07/2008 |
| 7425976 | Variable frequency generator A digital circuit generates very precise varying clock frequencies for applications that can tolerate a small degree of jitter but require exact longer term frequencies, e.g. a video clock for a laser printer. Some subpixel jitter is acceptable, but the overall pixe... | 09/16/2008 |
| 7414450 | System and method for adaptive power supply to reduce power consumption A system and method for adaptively providing a power supply voltage. The system includes an oscillator configured to receive an output voltage and generate a firs signal. The first signal is associated with a first frequency and a first period. Additionally, the sys... | 08/19/2008 |
| 7411527 | Noise shaping quantizer A noise shaping quantizer having a first noise shaping quantization unit for applying a first noise shaping operation on an input signal. The first noise shaping quantization unit includes a local quantizer that quantizes the input signal and outputs an output signa... | 08/12/2008 |
| 7388939 | Fractional-R frequency synthesizer A fractional-R synthesizer having a divider with rational increments and configurable in rational steps able to generate a plurality of frequencies in rational increments from a reference frequency. A voltage-controlled oscillator frequency (fVCO) is rela... | 06/17/2008 |
| 7382202 | Apparatus and method to provide a local oscillator signal from a digital representation An apparatus provides a local oscillator signal based on a selected channel of an RF input signal. For example, the apparatus can set a frequency of the local oscillator signal based on the selected channel. Digital circuitry can be used to generate the local oscill... | 06/03/2008 |
| 7368964 | Delay locked loop in semiconductor memory device and method for generating divided clock therein Provided are a delay locked loop (DLL) and a method for generating a divided clock therein. In the DLL, a width of a reference frequency for phase comparison can be changed depending on a magnitude of an operating frequency. In the DLL, a clock buffer receives a clo... | 05/06/2008 |
| 7365594 | Current driver, data driver, display device and current driving method A current driver includes a gate line having a first and second nodes, K driving transistors, a terminal and a voltage generation section. The terminal receives a first current. The voltage generation section generates a bias voltage according to a current value of ... | 04/29/2008 |
| 7363563 | Systems and methods for a built in test circuit for asynchronous testing of high-speed transceivers Methods and apparatus provide a transceiver, such as a serializer/deserializer device (SerDes), with enhanced built-in self test (BIST). A built-in self test circuit is provided that decouples a clock signal used for receiving data from a clock signal used in transm... | 04/22/2008 |
| 7362107 | Systems and methods for automatically eliminating imbalance between signals A calibrating system for automatically eliminating or reducing imbalance between a first signal and a second signal is disclosed. The calibrating system includes: a programmable delay module, receiving to the first and the second signals; a phase detecting module, c... | 04/22/2008 |
| 7355457 | Frequency synthesizer The invention relates to a frequency synthesizer. An object of the invention is to provide a frequency synthesizer whose high stable performance is realized at an inexpensive cost. The frequency synthesizer includes a frequency synthesizing section generating an out... | 04/08/2008 |
| 7349514 | Frequency/phase locked loop clock synthesizer using an all digital frequency detector and an analog phase detector A frequency synthesizer, for integration in a low voltage digital CMOS process, controls a VCO using a dual loop structure including an analog loop and a digital loop. The digital loop includes an all digital frequency detector, which controls a center frequency of ... | 03/25/2008 |
| 7343387 | Algorithm for configuring clocking system A system and method for configuring an automatic test system to produce a plurality of clocks from a reference clock includes a user interface and software. The user interface receives a plurality of inputs that specify desired frequencies of the plurality of clocks... | 03/11/2008 |