"The wireless music box has no imaginable commercial value. Who would pay for a message sent to nobody in particular?"
David Sarnoff, American radio pioneer ; 1921
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| Number | Title | Issue Date |
| 7443251 | Digital phase and frequency detector Disclosed are a digital phase-frequency detector and a method of operating a digital phase-frequency detector. The detector includes an input circuit, an output circuit and a reset circuit. In use, the input circuit receives first and second input signals during a p... | 10/28/2008 |
| 7337083 | Process for identification of the direction of rotation of two periodic electrical signals at the same frequency A process and apparatus for identification of the direction of rotation of two periodic electrical signals present on two electrical conductors, particularly of a three-phase power system. In this process, the signals are sampled from two conductors by two wires of ... | 02/26/2008 |
| 7309875 | Nanocrystal protective layer for crossbar molecular electronic devices A molecular device is provided. The molecular device comprises a junction formed by a pair of crossed electrodes where a first electrode is crossed by a second electrode at a non-zero angle and at least one connector species including at least one switchable moiety ... | 12/18/2007 |
| 7298178 | Clock-generator architecture for a programmable-logic-based system on a chip A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic bloc... | 11/20/2007 |
| 7288975 | Method and apparatus for fail-safe and restartable system clock generation A method and apparatus for fail-safe and restartable system clock generation provides recovery from failures due to incorrect clock generator settings or from marginal clock distribution components. Clock failure is detected at a point along the clock distribution p... | 10/30/2007 |
| 7242215 | Nanoscale latches and impedance-encoded logic for use in nanoscale state machines, nanoscale pipelines, and in other nanoscale electronic circuits Various embodiments of the present invention are directed to implementation and use of logic-state-storing, impedance-encoded nanoscale, impedance-encoded latches that store logic values as impedance states within nanoscale electronic circuits that employ impedance-... | 07/10/2007 |
| 7110387 | System and method for compensating timing error using pilot symbol in OFDM/CDMA communication system A timing error compensation system in an OFMD/CDMA communication system includes an analog-to-digital converter for converting an OFDM signal, comprised of a data symbol stream in which a pilot symbol is inserted at intervals of a prescribed number of data symbols, ... | 09/19/2006 |
| 7107028 | Apparatus, system, and method for up converting electromagnetic signals Methods, systems, and apparatuses for down-converting and up-converting an electromagnetic signal. In embodiments, the invention operates by receiving an electromagnetic signal and recursively operating on approximate half cycles of a carrier signal. The recursive o... | 09/12/2006 |
| 7102391 | Clock-generator architecture for a programmable-logic-based system on a chip A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic bloc... | 09/05/2006 |
| 7095254 | Method for producing a control signal which indicates a frequency error A method which provides a very simple way of forming a control signal if the frequencies differ too greatly from one another between a useful signal and a reference signal. A control signal is produced which indicates that the frequency error between the frequencies... | 08/22/2006 |
| 7003065 | PLL cycle slip detection A cycle slip detector interfaces with a phase/frequency detector (PFD), such as might be used in a phase-locked loop circuit (PLL), and indicates when cycle slips occur in the PFD. Typically, the PFD generates output control signals as a function of the phase differ... | 02/21/2006 |
| 6990597 | Clock generation circuit, data transfer control device, and electronic instrument A clock generation circuit capable of generating a high-frequency clock with a simple circuit configuration, together with a data transfer control device and an electronic instrument using the same. The clock generation circuit has: serially-connected inversion circ... | 01/24/2006 |
| 6954510 | Phase-locked loop lock detector circuit and method of lock detection There is provided a phase-locked loop lock detector circuit for detecting a lock or unlock state of a PLL circuit. A synchronization circuit synchronizes a lock window signal with a reference frequency signal. A rising edge detection circuit and a falling edge detec... | 10/11/2005 |
| 6838912 | Digital fractional phase detector A digital fractional phase detector is shown that uses a phase error detector for generating a phase error signal based on the phase difference between a reference clock signal and a feedback clock signal. A quantizer directly measures the pulse width of a phase err... | 01/04/2005 |
| 6806742 | Phase detector for low power applications A low-power phase detector with differential output may comprise a control signal generator. In one embodiment, two cyclic waveforms whose phase relationship is to be measured may be input to a control signal generator. The control signal generator may output a firs... | 10/19/2004 |
| 6415422 | Method and system for performing capacitance estimations on an integrated circuit design routed by a global routing tool A method for performing capacitance estimations on an integrated circuit design routed by a global routing tool is disclosed. Routing areas and pin locations of a net within an integrated circuit design are initially obtained from a global routing tool. C... | 07/02/2002 |
| 6351153 | Phase detector with high precision A phase detector is disclosed that detects the phase of two inputs with precision. A method and apparatus of phase detecting that subtracts out common errors due to temperature variations and supply voltage fluctuations. The phase detector and method pref... | 02/26/2002 |
| 6064235 | Shared path phase detector A shared path phase detector circuit for receiving a reference clock and an oscillator clock, the phase detector circuit providing an output signal for indicating a magnitude difference between a phase of the reference and oscillator clocks. The output si... | 05/16/2000 |
| 5818265 | Digital phase detector The digital phase detector detects a phase shift between a comparison clock pulse signal (VT) and a reference clock pulse signal (RT). It includes logic gates (STO,STA) for generating start and stop pulses from respective successive pulses of the comparis... | 10/06/1998 |
| 5663666 | Digital phase detector In the present embodiment, digital phase detection of digital telecommunications signals is based on heterodyning. The frequency of two signals are scaled to different nominal values that are separated by a typically small but finite difference. The two f... | 09/02/1997 |
| 5619148 | Digital variable in-lock range phase comparator A novel method and apparatus providing an all digital phase comparator of two binary signals which employs a type of cross correlation of two binary signals and provides a 2bit binary word uniquely representative of phase alignment. The method can be carr... | 04/08/1997 |
| 5578947 | Delayed detection type demodulator Within the differential detection demodulator, the received signal is first quantized by a limiter amplifier 10 and then subjected to frequency conversion by a frequency converter 50 including: an exclusive OR element 51; a running average generator 52 co... | 11/26/1996 |
| 5566129 | Semiconductor memory device with address transition detector A semiconductor memory device with an address transition detector comprises a flip-flop circuit (FF) having set and reset input terminals and a delay circuit (3). A pulse signal is input to a set input terminal (S) of the flip-flop circuit (FF) and an out... | 10/15/1996 |
| 5530382 | Delayed detection type demodulator Within the differential detection demodulator, the received signal is first quantized by a limiter amplifier 10 and then subjected to frequency conversion by a frequency converter 50 including: an exclusive OR element 51; a running average generator 52 co... | 06/25/1996 |
| 5410195 | Ripple-free phase detector using two sample-and-hold circuits A phase detector comprises a ramp voltage generator for receiving a reference pulse of a constant frequency and an input pulse and producing a ramp voltage proportional to the phase difference between these pulses. A first sample-and-hold circuit samples ... | 04/25/1995 |
| 5126602 | Digital phase detector in an NRZ bit synchronous system The object of the present invention is to provide a phase detector comprising three D-type flip-flops, which compares the transition phase of retiming clock pulses with the phase of the center of the unit bit interval of received data, produces the compar... | 06/30/1992 |
| 5105160 | Phase comparator using digital and analogue phase detectors A digital phase detector circuit has an up/down counter for counting clock pulses (CPS) to determine the number of clock pulses that occur in the time interval between opposite edges of a first signal (VSC) and one edge of a reference signal (PL) synchron... | 04/14/1992 |
| 4901026 | Phase detector circuit having latched output characteristic A phase detector circuit for providing an output indicative of the phase relationship between two input signals. The output of the phase detector responds rapidly to changes in the phase relationship between the input signals and avoids "cycling" when thi... | 02/13/1990 |
| 4806870 | Phase comparator and data separator A phase comparator for use in a phase-locked loop, responsive to CLOCK and DATA signals, for producing UP and DOWN commands exhibiting a difference in duration proportional to the phase difference between the CLOCK and DATA signals, for controlling the ch... | 02/21/1989 |
| 4803385 | Phase detecting circuit A phase detecting circuit for detecting a phase differential between a reference clock and a bit timing extracted from a demodulated signal, which is derived from a modulation wave modulated by a digital signal. The circuit successfully eliminates points ... | 02/07/1989 |
| 4754225 | Phase comparator insensitive to clock asymmetry A phase comparator generates a reference pulse equal in duration to one bit cell, and a variable pulse having a duration representative of the duration and time displacement of the leading edge of a data pulse from the center of the bit cell. The phase co... | 06/28/1988 |
| 4751468 | Tracking sample and hold phase detector A tracking sample and hold phase detector operating as an error sampled feedback loop which takes signal samples during successive periods of an input signal with a sampling gate, holds the signal sample in a storage gate, and feeds back the sample to the... | 06/14/1988 |
| 4686481 | Phase detector apparatus including charge pump means An improved phase detector apparatus which includes a charge pump. The charge pump includes a first integrating node and a second integrating node. The first and second integrating nodes generate node voltages which ramp downward and upward during a given... | 08/11/1987 |
| 4654600 | Phase detector A phase detector uses the junction of a coplanar waveguide and a slot line. The coplanar waveguide serves as an input terminal and is contiguous to the slot line which is shorted. A strobe pulse is applied to the shorted slot line via a snap-off diode, an... | 03/31/1987 |
| 4642489 | Sampled data amplitude linear phase detector A sampled data phase detector is created using a differential amplifier that is provided with a feedback capacitor connected between the output and the inverting input. A reference potential is coupled to the noninverting input. A coupling capacitor is co... | 02/10/1987 |
| 4568881 | Phase comparator and data separator A phase comparator and data separator is disclosed capable of establishing a detection window of the order of 100 percent of the clock cycle at a data recovery rate at least as great as 100 MHz. One of the preferred embodiments of the invention comprises ... | 02/04/1986 |
| 4523150 | Phase comparator using two capacitors alternately charged via constant current sources One of two capacitors in a phase comparator is discharged for a logic zero data input and is alternately charged with opposite polarities, depending on the state of a regenerated clock signal, for a logic one data input. The resultant charge of the capaci... | 06/11/1985 |
| 4435657 | Phase detector circuit Horizontal sync signal is applied as a reference pulse signal to a first input terminal of a phase detector and is also applied as a gating pulse to a gate circuit. Output of a frequency divider which divides the frequency of the output of a VCO is applie... | 03/06/1984 |
| 4403193 | Pulse detection circuit A pulse detection circuit, for detecting pulses contained in output signals derived from an encoder such as rotary encoder which converts any physical quantity like spatial position, displacement or length into an electric signal, is disclosed. The disclo... | 09/06/1983 |
| 4242602 | Phase comparator circuit with gated isolation circuit A phase comparator circuit suited for use in a PLL circuit and for integrated circuit implementation comprises a differential amplifier having a common current path to be turned on and off by a reference signal, means for applying a pedestal or ramp wave ... | 12/30/1980 |