Class 326/99 - HAVING LOGIC LEVELS CONVEYED BY SIGNAL FREQUENCY OR PHASE

Subclass of Class 326 - Electronic digital logic circuitry
Definition: Subject matter wherein the logic circuit receives or produces
No. of patents: 33
Last issue date: 04/29/2008

Number	Title	Issue Date
7365574	General purpose delay logic A logic circuit for delaying a signal input thereto by a number of clock cycles X is described. In one embodiment, the logic circuit comprises a demultiplexer (“DEMUX”) which includes an input for receiving the signal and N outputs; a register array comprising a...	04/29/2008
7352636	Circuit and method for generating boosted voltage in semiconductor memory device In a boosted voltage generating circuit of a semiconductor memory device, an active kicker drive signal generating circuit generates an active kicker drive signal having a first pulse duration in response to a row active command, and generates the active kicker driv...	04/01/2008
7248196	Analog-to-digital converters employing cascaded phase-reversing switches 2N−1 four-terminal phase-reversing switches are arranged in one or more columns of cascaded switches, wherein a frequency having a given relative phase φ is applied as an input of the top switch in a cascade. A particular configuration of 2N...	07/24/2007
7098696	Logic circuit and semiconductor integrated circuit The invention provides a logic circuit to identify time difference between signals having a variation in delay, and an integrated circuit which can evaluate variations in delay among internal signals. By using a logic circuit which outputs different number of pulse ...	08/29/2006
7057417	Voltage conversion circuit and semiconductor integrated circuit device provided with it By using a first delay circuit that delays by a predetermined time a reference pulse signal having a constant pulse width and a second delay circuit that delays by an arbitrary time the output signal of the first delay circuit, a voltage conversion circuit generates...	06/06/2006
6949956	General purpose delay logic A logic circuit for delaying a signal input thereto a specified number of clock cycles X, wherein X is between 1 and 2N is described. In one embodiment, the logic circuit comprises a demultiplexer (“DEMUX”) comprising an input for receiving the signal...	09/27/2005
6943586	Method and system to temporarily modify an output waveform Systems and methods are disclosed for controlling an associated circuit. A clock waveform that transitions between normally high and low levels over a cycle in a first operating mode is provided to the associated circuit. The clock waveform is modified to include an...	09/13/2005
6930521	Circuit for controlling the performance of an integrated circuit A system and method for utilizing a feedback-based delay stabilization and power optimization circuit. One embodiment of the present invention is directed to an electronic circuit comprising an indicator operable to generate an indicator signal that is proportional ...	08/16/2005
6842047	Electrical parallel processing frequency coded logic A method and apparatus for electrical parallel processing logic operations in which one and zero are represented by presence and absence, respectively, of a sinusoidal wavetrain. Different frequency information channels can be handled simultaneously and independentl...	01/11/2005
6803791	Equalizing receiver with data to clock skew compensation A receiver performs on data to clock skew compensation by compensating ISI between signals, the ISI being caused by a bandwidth limitation generated in case of chip-to-chip communications in a digital system. A problem of an attenuation of a high frequency signal ma...	10/12/2004
6753703	Resetable cascadable divide-by-two circuit A cascadable divide-by-two binary counter circuit (120) that has particular application for use as a synchronous divider circuit (50, 54) in a phase lock loop (26). The counter circuit (120) employs a D flip-flop (122) that receive...	06/22/2004
6744281	Method and system for controlling the duty cycle of a clock signal A system for controlling the duty cycle of a clock signal. The system includes a duty cycle adjustment circuit that receives an input clock signal and generates an output clock signal. The duty cycle adjustment circuit charges a capacitor when the input clock signal...	06/01/2004
6492840	Current mode logic gates for low-voltage high-speed applications A new family of current mode logic (CML) gates (14) which, in one embodiment includes OR/NOR and AND/NAND gates, as well as more complex logic functions. The circuit uses a complementary signal to drive the gate of a feedback transistor (19) which has the...	12/10/2002
6489802	Digital signal transition splitting method and apparatus A transition splitting apparatus and method reduce a maximum transition rate of a digital signal. The apparatus and method are particularly useful for digital signal processing in communications and for performing digital transition timing testing on a de...	12/03/2002
6456109	Jitter detecting circuit for detecting cycle-to-cycle jitter A jitter detecting circuit firstly compares a target signal with a reference clock signal to see whether or not a phase difference takes place between the target signal and the reference clock signal, and, thereafter, the phase difference in each clock cy...	09/24/2002
6374017	Phase dependent splitter/combiner 4-port coupler device A phase dependent splitter/combiner 4-port coupler device is composed of two duplicating stages and a cross-over stage and provides the phase dependent splitting and combining functionality of a 4-port coupler without the ambiguity of the coupling coeffic...	04/16/2002
6346830	Data input/output circuit and interface system using the same A data input/output circuit preferably used in a fast interface system such as Rambus™ interface or SyncLink™ interface for transmitting and/or receiving data in synchronization with a supplied clock. The data input/output circuit has a phase locked l...	02/12/2002
6201414	Pulse width modulation circuit A pulse width modulation circuit utilizes a clock divider to generate a plurality of clocks to be used by a plurality of delay blocks. Each delay block has plurality of delay elements each of which receives one the plurality of clocks. Each delay block re...	03/13/2001
5528174	Devices for implementing microwave phase logic Any one of several improved devices capable of implementing microwave phase logic (MPL) operating at gigabits per second rates comprises either at least one of means performing the function of a multigate microwave-monolithic-integrated-circuit (MMIC) fie...	06/18/1996
5528175	Devices for implementing microwave phase logic Any one of several improved devices capable of implementing microwave phase logic (MPL) operating at gigabits per second rates comprises either at least one of means performing the function of a multigate microwave-monolithic-integrated-circuit (MMIC) fie...	06/18/1996
5103114	Circuit technique for creating predetermined duty cycle A circuit for allowing a clock of any specified duty cycle to be created from a clock of the same frequency using standard digital delay lines. In particular, an EXOR function is implemented to generate a clock signal having a frequency which is twice the...	04/07/1992
5059836	Differential-time-constant bandpass filter using the analog properties of digital circuits An integrated circuit filter wherein two digital inverters are used, with cutoff frequencies which bracket the desired passband frequency. (The cutoff frequency of the two digital inverters is selected by changing their RC time constants.) The inverter wi...	10/22/1991
4926451	Timing controller for high-speed digital integrated circuit There is disclosed a digital integrated circuit device which has high-speed transistors of a selected type. A timing controller is incorporated in this device and performs timing control for an internal digital circuit. The timing controller includes a se...	05/15/1990
4902920	Extended range phase detector A linear three-state phase detector capable of accurately responding to simultaneous input signals has its linear range extended by uniquely sensing cycle slip and stepping a binary up-down counter. The cycle slip detector is capable of handling simultane...	02/20/1990
4706299	Frequency encoded logic devices Logic devices for frequency encoded trinary logic signals are simulated by standard binary circuits. The binary circuits include frequency sensing and frequency selecting devices at the inputs and outputs thereof for decoding the frequency encoded trinary...	11/10/1987
4651027	Current-to-frequency converter An analog current-to-frequency converter which produces output pulses whose repetition rate depends on the current value. Included in the converter is an operational amplifier having an inverting input to which is applied a negative input voltage whose ma...	03/17/1987
4638188	Phase modulated pulse logic for gallium arsenide A logic system preferably for gallium arsenide integrated circuits uses dynamic pulsed logic gates which switch on each clock pulse, with the logical state of an output or data line being indicated by the phase of the pulsed output, which may be shifted o...	01/20/1987
4634901	Sense amplifier for CMOS semiconductor memory devices having symmetrically balanced layout A sense amplifier circuit for a CMOS DRAM or the like uses cross-coupled P-channel load transistors and cross-coupled N-channel driver transistors. Both of the P-channel transistors are in an N-well in the center of a symmetrical layout on the chip. Each ...	01/06/1987
4585997	Method and apparatus for blanking noise present in an alternating electrical signal A noise blanking circuit for eliminating evidence of noise present in an incoming alternating electrical control signal, such as a shaft encoder or tachometer signal in a servo control circuit, is disclosed. The alternating electrical signal is input to a...	04/29/1986
4564774	Binary logic device having input and output alternating signals There is provided a logic device wherein an alternating input signal having a frequency which is one of two frequencies allotted to two input logical values, respectively, positive logic "1" and negative logic "0", is inputted to the device. An output log...	01/14/1986
4107556	Sense circuit employing complementary field effect transistors A sense circuit suitable for use with semiconductor memory arrays which, in contrast to sense circuits of similar type, exhibits no voltage offset in the latched condition between the input-output (I/O) nodes and the supply lines. The sense circuit includ...	08/15/1978
4045791	Apparatus for driving liquid crystal display device wherein the signal applied thereto is varied in accordance with the temperature of the device Apparatus driving liquid crystal display device including a liquid crystal layer provided with electrodes on its two opposite surfaces, comprising means for applying a first signal for designating the electrode position and a voltage signal having a highe...	08/30/1977
3986047	Ramp release and reset circuit for a three phase voltage regulator An improved ramp control circuit is provided for use in a three phase, SCR phase controlled, voltage regulator. Two, 180° out of phase timing pulses are generated in a pair of comparators for each phase of the three phase input to the system. The compara...	10/12/1976

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Class 326/99 - HAVING LOGIC LEVELS CONVEYED BY SIGNAL FREQUENCY OR PHASE