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| Number | Title | Issue Date |
| 7362146 | Large supply range differential line driver A differential transmission line driver with supplemental current sources that overcome switching anomalies and EMU issues when the logic state of the driver is switching. During a logic transition, a current source, that is directed to the output of the driver, may... | 04/22/2008 |
| 7348811 | Equalizing transceiver with reduced parasitic capacitance A signaling circuit having reduced parasitic capacitance. The signaling circuit includes a plurality of driver circuits each having an output coupled to a first output node, and a plurality of select circuits each having an output coupled to a control input of a cor... | 03/25/2008 |
| 7320064 | Reconfigurable computing architecture for space applications A reconfigurable computer includes a reconfigurable processing element configured to process raw payload data in accordance with a configuration that is applied to the reconfigurable processing element. The reconfigurable computer further includes a multi-port commu... | 01/15/2008 |
| 7230456 | Low current consumption detector circuit and applications A low current consumption detector circuit, and its applications are described herein. ... | 06/12/2007 |
| 7227390 | Apparatus and method for a driver with an adaptive drive strength for a class D amplifier A circuit for adaptively adjusting the drive strength of output power transistors in a class D amplifier is provided. The circuit includes a driver circuit and a low-voltage detect circuit. The low-voltage detect circuit is arranged to assert a low-voltage detect si... | 06/05/2007 |
| 7181650 | Fault tolerant data storage circuit A fault tolerant data storage circuit for an integrated circuit produces a specified initial output state with high probability even in the presence of abnormal start-up conditions affecting one or more signal inputs to the storage circuit. The storage circuit inclu... | 02/20/2007 |
| 7145366 | Electronic circuit with a differential pair of transistors and logic gate comprising such a circuit An electronic circuit includes at least one differential pair of transistors, a control transistor switch, a first current source and a second current source. The second current source is connected to a common emitter node of the pair of transistors in order to acce... | 12/05/2006 |
| 7142017 | High-voltage-tolerant feedback coupled I/O buffer An input/output buffer comprises an input/output pad operable to receive an input signal and transmit an output signal, an output driver coupled to the input/output pad, an input path comprising an input transistor coupled to the input/output pad operable to pass an... | 11/28/2006 |
| 7126389 | Method and apparatus for an output buffer with dynamic impedance control A method and apparatus for an output buffer with dynamic impedance control have been disclosed. ... | 10/24/2006 |
| 7075328 | Apparatus and method of error detection and correction in a radiation-hardened static random access memory field-programmable gate array The present system comprises a radiation tolerant programmable logic device having logic modules and routing resources coupling together the logic modules. Configuration data lines providing configuration data control the programming of the logic modules and the rou... | 07/11/2006 |
| 7076751 | Chip debugging using incremental recompilation While debugging, a user chooses an incremental recompile. Internal signals of interest are selected and output pins are optionally reserved. An incremental recompile of the compiled design includes compiling a routing from each internal signal to an output pin. The ... | 07/11/2006 |
| 7057180 | Detector for alpha particle or cosmic ray A detector circuit and method for detecting a silicon well voltage or current to indicate an alpha particle or cosmic ray strike of the silicon well. One significant application for the detection circuit of the present invention is for the redundancy repair latches ... | 06/06/2006 |
| 7036046 | PLD debugging hub User logic within a PLD is debugged by way of the hub. The PLD includes a serial interface (such as a JTAG port) that communicates with a host computer. Any number of client modules are within the PLD and provide instrumentation for the PLD. A module is a logic anal... | 04/25/2006 |
| 7036059 | Techniques for mitigating, detecting and correcting single event upset effects in systems using SRAM-based field programmable gate arrays SEU mitigation, detection, and correction techniques are disclosed. The mitigation techniques include: triple redundancy of a logic path is extended the length of the FPGA to avoid weak points susceptible to SEU effects; triple logic module and feedback redundancy p... | 04/25/2006 |
| 6973405 | Programmable interactive verification agent A verification agent can be used to verify hard and/or soft modules under test in an integrated circuit. The integrated circuit contains a processor and memory for storing code executable by the processor. The module under test performs predetermined operations. The... | 12/06/2005 |
| 6876231 | Driver circuit for use in pin electronics card A driver circuit for switching an output voltage (Vout) at an output terminal 3 by using diode bridges 1 and 2 includes a first current mirror circuit 10 for letting flow a first balance current I2e and letting flow a first tra... | 04/05/2005 |
| 6847232 | Interchangeable CML/LVDS data transmission circuit A system and method is described for a driver circuit used for high speed data transmission in LVDS and CML transceiver device applications. The transceivers are intended to receive a low voltage differential input signal and interchangeably drive a standard LVDS lo... | 01/25/2005 |
| 6819142 | Circuit for transforming a differential mode signal into a single ended signal with reduced standby current consumption An apparatus for converting a differential mode signal into a single ended signal with reduced power consumption. A preferred embodiment comprises a single ended converter (for example, a single ended converter 505) and an output transistor (for example, outp... | 11/16/2004 |
| 6815979 | Impedance control circuit for controlling multiple different impedances with single control circuit An impedance control circuit includes a reference voltage output circuit for outputting one of a plurality of reference voltages; a variable resistor; a comparator and a control circuit. The comparator includes a first input terminal supplied with a reference voltag... | 11/09/2004 |
| 6700413 | Symmetric current mode logic A symmetric current mode logic with symmetric input loads as well as identical input logic levels at the input terminals so as to prevent phase error due to level adjustment and to further avoid signal surges due to current steering by parallel switching.... | 03/02/2004 |
| 6184714 | Multiple-bit, current mode data bus A current mode data communication system is disclosed. The current mode data communication system has a transmitter to simultaneously transmit two digital data bits. The two digital data bits are combined to form a current mode signal. The current mode si... | 02/06/2001 |
| 6111433 | Differential output driver with monotonic output transitions Method and circuitry for differential output driver with monotonic output transitions. The switching sequence for the output driver transistors of the differential driver changes depending on the direction of the input signal transition. When the input ma... | 08/29/2000 |
| 6104211 | System for preventing radiation failures in programmable logic devices A radiation-tolerant logic circuit includes three similarly configured SRAM-based PLDs. These PLDs work in parallel to provide identical logic functions. To guard against data corruption that can result from radiation-induced upsets, the logic circuit inc... | 08/15/2000 |
| 6097220 | Method and circuit for recycling charge Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: two transistors coupled together in the integrated circuit so that upon the application of complementary voltage signals, electrical charge is substantially evenl... | 08/01/2000 |
| 5900756 | Bias circuit for transistor of a storage cell Disclosed is an integrated circuit comprising storage circuits, these circuits themselves comprising insulation transistors to which a determined positive bias voltage may be applied. This bias voltage is determined by means of a first bias circuit. The d... | 05/04/1999 |
| 5887150 | SCSI controller having output driver with slew rate control An integrated circuit provides for adjustable slew rate control for both rising and falling edges of an output provided to an SCSI bus. Slew rate is controlled by adaptively varying the charge and/or discharge rate of the gate electrode of an output drive... | 03/23/1999 |
| 5834859 | Battery backed configurable output buffer The present invention is a battery backed output buffer which provides a well-defined signal, even during battery power. The buffer includes a regular output buffer for providing output data during operation with a main power supply and for switching to a... | 11/10/1998 |
| 5811991 | Logic circuit and semiconductor device using it A logic circuit comprises an output line, a first switch having an end connected to the output line and another end connected to a power source potential, a second switch having an end connected to the output line and another end connected to a ground pot... | 09/22/1998 |
| 5789946 | Active pull down emitter coupled logic circuit An active pull-down emitter coupled logic circuit includes a high voltage line, a low voltage line, a first constant current circuit coupled to the low voltage line, first and second main current paths extending between the high voltage line and the first... | 08/04/1998 |
| 5592510 | Common mode early voltage compensation subcircuit for current driver In a driver circuit for a twisted pair cable, a compensator for preventing appreciable common mode current flow into or out of the twisted pair cable in response to the device receiving a wide range of common mode voltage bias levels. A wide range of exte... | 01/07/1997 |
| 5489861 | High power, edge controlled output buffer An output buffer circuit with edge-rate control capable of maintaining both rising and falling edge-rates within narrow specifications in the face of wide variations in load impedance. In particular, the output buffer of the present invention is intended ... | 02/06/1996 |
| 5424653 | Gradual on output buffer circuit including a reverse turn-off apparatus An output buffer circuit is provided which significantly reduces ground/Vcc bounce and glitches of signals provided to an integrated circuit. The circuit includes a plurality of transistors for providing a drive potential at the output of the device. The ... | 06/13/1995 |
| 5384498 | DC-coupled active pull-down ECL circuit with self-adjusting drive capability A DC-coupled active pull-down ECL circuit ("LS-APD") has a pull-down drive that self-adjusts to load conditions. A current source sinks emitter current from first and second push-pull transistors. The input signal is coupled to the base of the first trans... | 01/24/1995 |
| 5184034 | State-dependent discharge path circuit A circuit for use in connection with tristate output buffers in order to provide concurrently for fast discharge of the output pulldown transistor base and at the same time for building in protection against reverse breakdown in the pulldown transistor. T... | 02/02/1993 |
| 5153456 | TTL output buffer with temperature compensated Voh clamp circuit A VOH clamp circuit reduces propagation delay time TPHL and reduces ground bounce noise in TTL output buffer circuits. First and second band gap bias generators (BG1,BG2) coupled in series provide a substantially stable clamp referen... | 10/06/1992 |
| 5153464 | BiCMOS tri-state output buffer An improved tri-state output buffer of the type that includes an output stage comprising a pair of bipolar transistors in a totem-pole configuration. A CMOS predriver arrangement includes a circuit configuration for selectively adjusting the resistance be... | 10/06/1992 |
| 5132568 | Tri-state output circuit utilizing a BiCMOS inverter circuit A tri-state logic circuit of a BiCMOS having a power saving characteristic, a strong noise durability, a desirable driving characteristic and switching charaacteristic is disclosed. The circuit comprises PMOS transistors M1,M5 and NMOS transistors M2,M3,M... | 07/21/1992 |
| 5051623 | TTL tristate circuit for output pulldown transistor The lower output pulldown tristate circuit for a TTL tristate output buffer circuit includes the enable signal invertor buffer having an OE signal input and an OE signal output providing output enable OE signals, and a Miller killer transistor element hav... | 09/24/1991 |
| 5027010 | TTL output driver having an increased high output level A TTL output driver is provided which increases the high level of the output signal thereof. The first and second emitters of a first transistor are coupled to the collector and base of a second transistor, respectively, the emitter and collector of which... | 06/25/1991 |
| 4999520 | High speed TTL buffer circuit which is resistive to the influence of alpha-rays A semiconductor integrated circuit wherein an input circuit is formed by a phase split circuit consisting of a bipolar transistor which outputs an inverted output from the collector and non-inverted output from the emitter, the emitter follower output cir... | 03/12/1991 |
