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| Number | Title | Issue Date |
| 7425847 | Input buffer with optimal biasing and method thereof A method and circuit of a biased input buffer is described to maximize the quality in the output signals. The input buffer includes a first stage for receiving differential input signals and generating differential internal signals as biased in response to an averag... | 09/16/2008 |
| 7417463 | Wireline transmission circuit A wireline transmission circuit includes a first circuit that produces a first variable current, a second circuit that produces a first static current, a trans-impedance amplifier that outputs a first analog signal at a first output node in response to the first var... | 08/26/2008 |
| 7400173 | Differential receiver with wide input common mode range and low duty cycle distortion A transmission system, circuit and method are provided herein for converting differential signals into low duty cycle distortion, single-ended signals that are insensitive to variations in PVT and input common mode voltage. In one embodiment, the signal translation ... | 07/15/2008 |
| 7362146 | Large supply range differential line driver A differential transmission line driver with supplemental current sources that overcome switching anomalies and EMU issues when the logic state of the driver is switching. During a logic transition, a current source, that is directed to the output of the driver, may... | 04/22/2008 |
| 7348803 | Bi-directional bus buffer A bi-directional bus buffer for applications using the I2C and SMBus, or other bus systems operating on similar principles, able to extend the bus load limit by buffering both the SCL and SDA (clock and data) lines, allowing capacitive loads of up to the limit of 40... | 03/25/2008 |
| 7342419 | Bidirectional current-mode transceiver A bidirectional current-mode transceiver is provided for improving transmission rates on a transmission line in a manner of current signal transmission, and for reducing the swing of the voltage signal on the transmission line by using a termination resistor, thus i... | 03/11/2008 |
| 7312639 | Universal single-ended parallel bus A high speed data communication system uses a single-ended bus architecture with a reference signal extracted from a differential periodic signal that is transmitted along with single-ended data. By using a periodic signal such a clock signal with approximately 50% ... | 12/25/2007 |
| 7250790 | Circuit for providing a logic gate function and a latch function An electronic circuit for providing a logic gate function includes a differential signal input, a combining stage, a discriminating stage and a differential signal output. The discriminating stage includes four transistors each having first electrodes and second ele... | 07/31/2007 |
| 7224188 | Line driver with reduced interference A bus communication system contains a pair of communication conductors and a driver. The driver contains a plurality of pairs of controlled current source circuit, each pair comprising current source circuits of a first and second, mutually opposite polarity, and a ... | 05/29/2007 |
| 7224189 | AC/DC coupling input network with low-power common-mode correction for current-mode-logic drivers An input network is provided within an integrated circuit for interfacing with signals produced by an external CML driver apparatus. The input network includes an input for receiving the signals, and this input is coupled to a terminating impedance, a DC attenuator ... | 05/29/2007 |
| 7218136 | Transmission circuit, data transfer control device and electronic equipment To provide a transmission circuit which can adequately perform a fast data transmission even to a receiving circuit of a host controller or a device controller with a low sensitivity. A transmission circuit transmitting a signal through first and second signal lines... | 05/15/2007 |
| 7218150 | Semiconductor integrated circuit device and differential small-amplitude data transmission apparatus An output driving circuit has a first and second differential output nodes connected to a first and second external output terminals, respectively. A capacitance connection circuit is connected between the first and second differential output nodes. The capacitance ... | 05/15/2007 |
| 7212034 | Current mode signaling in electronic data processing circuit An electronic data processing circuit uses current mode signalling on a communication conductor, wherein a receiver supplies current to the communication conductor to try and keep a voltage on the conductor constant and measures the current that is needed to do so. ... | 05/01/2007 |
| 7205789 | Termination arrangement for high speed data rate multi-drop data bit connections A circuit for terminating devices attached to a signal line and driving a load includes a resistor R1 in series with the signal line circuit CR1 having a resistor in series with a switch wherein CR1 is in parallel with R1, a circuit CR... | 04/17/2007 |
| 7187208 | Complimentary metal oxide silicon low voltage positive emitter coupled logic buffer A low voltage positive emitter coupled logic (LV-PECL) buffer fabricated in the complimentary oxide metal silicon (CMOS) process. The LV-PECL buffer in CMOS is operable for a wide frequency range from DC to frequencies as high as 800 MHZ in 0.5 um process. Synchroni... | 03/06/2007 |
| 7183806 | Output circuit Since voltages of two input terminals of an output unit having an online download function are decided by voltages which are not correlative to each other, a value of an incoming current on the start-up becomes large. The present invention solves the problem of turn... | 02/27/2007 |
| 7180325 | Data input buffer in semiconductor device A data input buffer for use in a semiconductor device, including: a detection unit for receiving a reference voltage signal and an input data signal through a first input terminal and a second input terminal respectively in order to detect a voltage level of the inp... | 02/20/2007 |
| 7170438 | Decision feedback equalizer with bi-directional mode and lookup table In one embodiment, a decision feedback equalizer helps mitigate intersymbol interference in a bi-directional signaling environment. In the particular embodiment, the decision feedback equalizer includes a voltage-to-current converter to source a received differentia... | 01/30/2007 |
| 7154301 | Apparatus and method for a low jitter predriver for differential output drivers A method and apparatus for a low jitter predriver for differential output drivers. In one embodiment, the predriver comprises a pull-up circuit having at least one pull-up device of a first device type and a pull-down circuit having at least one pull-down device of ... | 12/26/2006 |
| 7135889 | Universal single-ended parallel bus A high speed data communication system uses a single-ended bus architecture with a reference signal extracted from a differential periodic signal that is transmitted along with single-ended data. By using a periodic signal such a clock signal with approximately 50% ... | 11/14/2006 |
| 7132857 | High speed receiver with wide input voltage range A receiver circuit (12) includes a first gate (24) that receives an input signal (VIN0, VIN1) and has an output (32, 34) for providing an output signal (VG0, VG1). A shifting circuit (20) is cou... | 11/07/2006 |
| 7119600 | Wide common mode high-speed differential receiver using thin and thick gate oxide MOSFETS in deep-submicron technology A high speed receiver circuit is disclosed with a high supply voltage and operable with other circuits operating at a low supply voltage. The receiver circuit comprises first and second differential input signals controlling first and second current switches. It als... | 10/10/2006 |
| 7113001 | Chip to chip interface A chip to chip interface comprises a driver configured to provide a first signal in response to a change in first data at one edge of a clock signal and a second signal in response to a change in second data at another edge of the clock signal. The chip to chip inte... | 09/26/2006 |
| 7101199 | Electrical connection box An electrical connection box includes a plurality of circuit components at least partially overlapped one above the other and substantially parallel with each other each circuit component having a substrate including a switching member and an electric power conducti... | 09/05/2006 |
| 7088137 | System, method and program product for extending range of a bidirectional data communication bus A communication system, method and program product are provided for establishing an extended bidirectional communication bus between a first device and a second device. The communication system includes decomposition logic for decomposing a single line, bidirectiona... | 08/08/2006 |
| 7088141 | Multi-threshold complementary metal-oxide semiconductor (MTCMOS) bus circuit and method for reducing bus power consumption via pulsed standby switching A multi-threshold complementary metal-oxide semiconductor (MTCMO) bus circuit reduces bus power consumption via a reduced circuit leakage standby and pulsed control of standby mode so that the advantages of MTCMOS repeater design are realized in dynamic operation. A... | 08/08/2006 |
| 7081842 | Electronic component value trimming systems Described is a system for trimming the value of an electronic component. The system comprises: at least one trimming component, each trimming component having an associated switch for selectively connecting that trimming component to the electronic component in resp... | 07/25/2006 |
| 7081774 | Circuit having source follower and semiconductor device having the circuit When a potential of a power supply line varies according to a flowing current, the gate-source voltage Vgs of a transistor also varies, leading to variations in the constant current between each source follower. In order to solve this problem, a potential Vb of the ... | 07/25/2006 |
| 7064581 | Bus interface and method for coupling a bus device to a bus A bus interface is described, in particular in motor vehicles, for connecting a bus device to a bus using a pair of complementary bus lines, including a first driver circuit whose input is connected to the bus device and whose output is connected to the first bus li... | 06/20/2006 |
| 7061274 | Self-programmable bidirectional buffer circuit and method The present invention is directed to programmable bidirectional buffers and methods for programming such buffers. One method of according to an aspect of the present invention is a method of configuring a bidirectional buffer including first and second signal nodes.... | 06/13/2006 |
| 7054387 | Feed-forward/feedback system and method for non-causal channel equalization A system and method are provided for feed-forward/feedback non-causal channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; using three thresholds, estimating a first bit in the data stream; us... | 05/30/2006 |
| 7049632 | Method and apparatus for optical probing of integrated circuit operation Optical transducers disposed on an integrated circuit correspond to test points thereon. The state of optical transducers perceived by an optical sensor is correlated to test points. Alignment of the optical sensor relative to the optical transducers is accomplished... | 05/23/2006 |
| 7030655 | Memory interface system The invention relates to a semiconductor memory device and, more particularly, to an interface system for a semiconductor memory device. The interface includes a transmitter capable of encoding first and second input signals as a plural-bit symbol signal responsive ... | 04/18/2006 |
| 7030656 | Low voltage differential signaling device with feedback compensation A low voltage different signaling (LVDS) includes an LVDS transmitter and an LVDS receiver. The LVDS transmitter includes a feedback compensation circuit, which adjusts and stabilizes the analog image signal to be transmitted to the LVDS receiver according to the vo... | 04/18/2006 |
| 7009426 | Data transmission/reception system In the process of transferring a clock signal and a plurality of data signals which are in synchronization with the clock signal, a driving pulse width of a driver switch is feedback-controlled by a clock transmission system (12), whereby the clock signal is ... | 03/07/2006 |
| 7005892 | Circuit technique for high speed low power data transfer bus A high speed low power data transfer bus circuit that reduces bus power consumption by imposing a limited, controlled voltage swing on the associated data bus. In one embodiment, an inverter is coupled with a pMOS pass transistor and an nMOS discharge transistor, an... | 02/28/2006 |
| 6998874 | Method and apparatus for the transmission of differential signals A method is described for transmitting signals on a pair of lines, whereby the signals pass alternately from a low level to a high level. The signals on one line of the pair transmit a complementary level of signals to the other line of the pair, whereby signal driv... | 02/14/2006 |
| 6995552 | Voltage modulator circuit to control light emission for non-invasive timing measurements An apparatus accurately measures the time difference between two signal edges by optically detecting the emission from a “beacon device” that is modulated as a function of time difference. Through the use of this modulation it is possible to perform timing measu... | 02/07/2006 |
| 6992508 | Versatile RSDS-LVDS-miniLVDS-BLVDS differential signal interface circuit An electronic circuit includes a selectively configurable differential signal interface and a selection control input for selecting one of a plurality of standard differential signal interfaces for configuration of the differential signal interface. The selection co... | 01/31/2006 |
| 6970010 | Apparatus and method for power efficient line driver A method is described that involves driving a first current through a line and a termination resistance so that a logical value on the line changes from a first logical value to a second logical value. The method also includes holding the second logical value on the... | 11/29/2005 |
